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150
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1 ; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
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2 ; RUN: llc -march=amdgcn -mcpu=bonaire -verify-machineinstrs < %s | FileCheck -check-prefix=CI -check-prefix=FUNC %s
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3
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4 declare i32 @llvm.amdgcn.workitem.id.x() #1
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5 declare double @llvm.fabs.f64(double) #1
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6
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7 ; SI-LABEL: {{^}}fp_to_uint_i32_f64:
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8 ; SI: v_cvt_u32_f64_e32
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9 define amdgpu_kernel void @fp_to_uint_i32_f64(i32 addrspace(1)* %out, double %in) {
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10 %cast = fptoui double %in to i32
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11 store i32 %cast, i32 addrspace(1)* %out, align 4
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12 ret void
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13 }
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14
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15 ; SI-LABEL: @fp_to_uint_v2i32_v2f64
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16 ; SI: v_cvt_u32_f64_e32
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17 ; SI: v_cvt_u32_f64_e32
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18 define amdgpu_kernel void @fp_to_uint_v2i32_v2f64(<2 x i32> addrspace(1)* %out, <2 x double> %in) {
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19 %cast = fptoui <2 x double> %in to <2 x i32>
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20 store <2 x i32> %cast, <2 x i32> addrspace(1)* %out, align 8
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21 ret void
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22 }
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23
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24 ; SI-LABEL: @fp_to_uint_v4i32_v4f64
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25 ; SI: v_cvt_u32_f64_e32
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26 ; SI: v_cvt_u32_f64_e32
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27 ; SI: v_cvt_u32_f64_e32
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28 ; SI: v_cvt_u32_f64_e32
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29 define amdgpu_kernel void @fp_to_uint_v4i32_v4f64(<4 x i32> addrspace(1)* %out, <4 x double> %in) {
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30 %cast = fptoui <4 x double> %in to <4 x i32>
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31 store <4 x i32> %cast, <4 x i32> addrspace(1)* %out, align 8
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32 ret void
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33 }
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34
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35 ; FUNC-LABEL: @fp_to_uint_i64_f64
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36 ; CI-DAG: buffer_load_dwordx2 [[VAL:v\[[0-9]+:[0-9]+\]]]
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37 ; CI-DAG: v_trunc_f64_e32 [[TRUNC:v\[[0-9]+:[0-9]+\]]], [[VAL]]
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38 ; CI-DAG: s_mov_b32 s[[K0_LO:[0-9]+]], 0{{$}}
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39 ; CI-DAG: s_mov_b32 s[[K0_HI:[0-9]+]], 0x3df00000
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40
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41 ; CI-DAG: v_mul_f64 [[MUL:v\[[0-9]+:[0-9]+\]]], [[VAL]], s{{\[}}[[K0_LO]]:[[K0_HI]]{{\]}}
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42 ; CI-DAG: v_floor_f64_e32 [[FLOOR:v\[[0-9]+:[0-9]+\]]], [[MUL]]
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43
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44 ; CI-DAG: s_mov_b32 s[[K1_HI:[0-9]+]], 0xc1f00000
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45
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46 ; CI-DAG: v_fma_f64 [[FMA:v\[[0-9]+:[0-9]+\]]], [[FLOOR]], s{{\[[0-9]+}}:[[K1_HI]]{{\]}}, [[TRUNC]]
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47 ; CI-DAG: v_cvt_u32_f64_e32 v[[LO:[0-9]+]], [[FMA]]
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48 ; CI-DAG: v_cvt_u32_f64_e32 v[[HI:[0-9]+]], [[FLOOR]]
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49 ; CI: buffer_store_dwordx2 v{{\[}}[[LO]]:[[HI]]{{\]}}
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50 define amdgpu_kernel void @fp_to_uint_i64_f64(i64 addrspace(1)* %out, double addrspace(1)* %in) {
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51 %tid = call i32 @llvm.amdgcn.workitem.id.x() nounwind readnone
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52 %gep = getelementptr double, double addrspace(1)* %in, i32 %tid
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53 %val = load double, double addrspace(1)* %gep, align 8
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54 %cast = fptoui double %val to i64
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55 store i64 %cast, i64 addrspace(1)* %out, align 4
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56 ret void
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57 }
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58
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59 ; SI-LABEL: @fp_to_uint_v2i64_v2f64
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60 define amdgpu_kernel void @fp_to_uint_v2i64_v2f64(<2 x i64> addrspace(1)* %out, <2 x double> %in) {
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61 %cast = fptoui <2 x double> %in to <2 x i64>
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62 store <2 x i64> %cast, <2 x i64> addrspace(1)* %out, align 16
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63 ret void
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64 }
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65
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66 ; SI-LABEL: @fp_to_uint_v4i64_v4f64
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67 define amdgpu_kernel void @fp_to_uint_v4i64_v4f64(<4 x i64> addrspace(1)* %out, <4 x double> %in) {
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68 %cast = fptoui <4 x double> %in to <4 x i64>
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69 store <4 x i64> %cast, <4 x i64> addrspace(1)* %out, align 32
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70 ret void
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71 }
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72
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73 ; FUNC-LABEL: {{^}}fp_to_uint_f64_to_i1:
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74 ; SI: v_cmp_eq_f64_e64 s{{\[[0-9]+:[0-9]+\]}}, 1.0, s{{\[[0-9]+:[0-9]+\]}}
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75 define amdgpu_kernel void @fp_to_uint_f64_to_i1(i1 addrspace(1)* %out, double %in) #0 {
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76 %conv = fptoui double %in to i1
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77 store i1 %conv, i1 addrspace(1)* %out
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78 ret void
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79 }
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80
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81 ; FUNC-LABEL: {{^}}fp_to_uint_fabs_f64_to_i1:
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82 ; SI: v_cmp_eq_f64_e64 s{{\[[0-9]+:[0-9]+\]}}, 1.0, |s{{\[[0-9]+:[0-9]+\]}}|
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83 define amdgpu_kernel void @fp_to_uint_fabs_f64_to_i1(i1 addrspace(1)* %out, double %in) #0 {
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84 %in.fabs = call double @llvm.fabs.f64(double %in)
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85 %conv = fptoui double %in.fabs to i1
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86 store i1 %conv, i1 addrspace(1)* %out
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87 ret void
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88 }
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89
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90 attributes #0 = { nounwind }
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91 attributes #1 = { nounwind readnone }
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