annotate llvm/test/CodeGen/AMDGPU/hazard-inlineasm.mir @ 150:1d019706d866

LLVM10
author anatofuz
date Thu, 13 Feb 2020 15:10:13 +0900
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children 2e18cbf3894f
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1 # RUN: llc -mcpu=gfx900 -march=amdgcn -verify-machineinstrs -run-pass post-RA-hazard-rec %s -o - | FileCheck %s
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3 # If an INLINEASM statement is preceded by a vmem store of more than 8 bytes *and*
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4 # the INLINEASM defs the vregs holding the data-to-be-stored by that preceding store,
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5 # then the hazard recognizer should insert a s_nop in between them.
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7 ...
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9 # GCN-LABEL: name: hazard-inlineasm
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10 # CHECK: FLAT_STORE_DWORDX4
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11 # CHECK-NEXT: S_NOP 0
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12 # CHECK-NEXT: INLINEASM
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14 ---
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15 name: hazard-inlineasm
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17 body: |
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18 bb.0:
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19 FLAT_STORE_DWORDX4 $vgpr49_vgpr50, $vgpr26_vgpr27_vgpr28_vgpr29, 0, 0, 0, 0, implicit $exec, implicit $flat_scr
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20 INLINEASM &"v_mad_u64_u32 $0, $1, $2, $3, $4", 0, 2621450, def $vgpr26_vgpr27, 2818058, def dead $sgpr14_sgpr15, 589833, $sgpr12, 327689, killed $vgpr51, 2621449, $vgpr46_vgpr47
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21 S_ENDPGM 0
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22 ...
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