annotate llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fcmp.ll @ 150:1d019706d866

LLVM10
author anatofuz
date Thu, 13 Feb 2020 15:10:13 +0900
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children c4bab56944e8
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150
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1 ; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,SI %s
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2 ; RUN: llc -march=amdgcn -mcpu=fiji -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,VI %s
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3
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4 declare i64 @llvm.amdgcn.fcmp.f32(float, float, i32) #0
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5 declare i64 @llvm.amdgcn.fcmp.f64(double, double, i32) #0
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6 declare float @llvm.fabs.f32(float) #0
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7
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8 declare i64 @llvm.amdgcn.fcmp.f16(half, half, i32) #0
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9 declare half @llvm.fabs.f16(half) #0
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10
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11 ; GCN-LABEL: {{^}}v_fcmp_f32_oeq_with_fabs:
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12 ; GCN: v_cmp_eq_f32_e64 {{s\[[0-9]+:[0-9]+\]}}, {{s[0-9]+}}, |{{v[0-9]+}}|
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13 define amdgpu_kernel void @v_fcmp_f32_oeq_with_fabs(i64 addrspace(1)* %out, float %src, float %a) {
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14 %temp = call float @llvm.fabs.f32(float %a)
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15 %result = call i64 @llvm.amdgcn.fcmp.f32(float %src, float %temp, i32 1)
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16 store i64 %result, i64 addrspace(1)* %out
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17 ret void
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18 }
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19
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20 ; GCN-LABEL: {{^}}v_fcmp_f32_oeq_both_operands_with_fabs:
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21 ; GCN: v_cmp_eq_f32_e64 {{s\[[0-9]+:[0-9]+\]}}, |{{s[0-9]+}}|, |{{v[0-9]+}}|
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22 define amdgpu_kernel void @v_fcmp_f32_oeq_both_operands_with_fabs(i64 addrspace(1)* %out, float %src, float %a) {
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23 %temp = call float @llvm.fabs.f32(float %a)
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24 %src_input = call float @llvm.fabs.f32(float %src)
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25 %result = call i64 @llvm.amdgcn.fcmp.f32(float %src_input, float %temp, i32 1)
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26 store i64 %result, i64 addrspace(1)* %out
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27 ret void
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28 }
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29
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30 ; GCN-LABEL: {{^}}v_fcmp_f32:
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31 ; GCN-NOT: v_cmp_eq_f32_e64
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32 define amdgpu_kernel void @v_fcmp_f32(i64 addrspace(1)* %out, float %src) {
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33 %result = call i64 @llvm.amdgcn.fcmp.f32(float %src, float 100.00, i32 -1)
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34 store i64 %result, i64 addrspace(1)* %out
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35 ret void
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36 }
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37
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38 ; GCN-LABEL: {{^}}v_fcmp_f32_oeq:
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39 ; GCN: v_cmp_eq_f32_e64
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40 define amdgpu_kernel void @v_fcmp_f32_oeq(i64 addrspace(1)* %out, float %src) {
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41 %result = call i64 @llvm.amdgcn.fcmp.f32(float %src, float 100.00, i32 1)
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42 store i64 %result, i64 addrspace(1)* %out
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43 ret void
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44 }
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45
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46 ; GCN-LABEL: {{^}}v_fcmp_f32_one:
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47 ; GCN: v_cmp_neq_f32_e64
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48 define amdgpu_kernel void @v_fcmp_f32_one(i64 addrspace(1)* %out, float %src) {
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49 %result = call i64 @llvm.amdgcn.fcmp.f32(float %src, float 100.00, i32 6)
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50 store i64 %result, i64 addrspace(1)* %out
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51 ret void
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52 }
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53
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54 ; GCN-LABEL: {{^}}v_fcmp_f32_ogt:
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55 ; GCN: v_cmp_gt_f32_e64
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56 define amdgpu_kernel void @v_fcmp_f32_ogt(i64 addrspace(1)* %out, float %src) {
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57 %result = call i64 @llvm.amdgcn.fcmp.f32(float %src, float 100.00, i32 2)
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58 store i64 %result, i64 addrspace(1)* %out
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59 ret void
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60 }
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61
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62 ; GCN-LABEL: {{^}}v_fcmp_f32_oge:
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63 ; GCN: v_cmp_ge_f32_e64
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64 define amdgpu_kernel void @v_fcmp_f32_oge(i64 addrspace(1)* %out, float %src) {
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65 %result = call i64 @llvm.amdgcn.fcmp.f32(float %src, float 100.00, i32 3)
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66 store i64 %result, i64 addrspace(1)* %out
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67 ret void
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68 }
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69
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70 ; GCN-LABEL: {{^}}v_fcmp_f32_olt:
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71 ; GCN: v_cmp_lt_f32_e64
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72 define amdgpu_kernel void @v_fcmp_f32_olt(i64 addrspace(1)* %out, float %src) {
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73 %result = call i64 @llvm.amdgcn.fcmp.f32(float %src, float 100.00, i32 4)
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74 store i64 %result, i64 addrspace(1)* %out
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75 ret void
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76 }
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77
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78 ; GCN-LABEL: {{^}}v_fcmp_f32_ole:
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79 ; GCN: v_cmp_le_f32_e64
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80 define amdgpu_kernel void @v_fcmp_f32_ole(i64 addrspace(1)* %out, float %src) {
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81 %result = call i64 @llvm.amdgcn.fcmp.f32(float %src, float 100.00, i32 5)
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82 store i64 %result, i64 addrspace(1)* %out
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83 ret void
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84 }
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85
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86
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87 ; GCN-LABEL: {{^}}v_fcmp_f32_ueq:
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88 ; GCN: v_cmp_nlg_f32_e64
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89 define amdgpu_kernel void @v_fcmp_f32_ueq(i64 addrspace(1)* %out, float %src) {
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90 %result = call i64 @llvm.amdgcn.fcmp.f32(float %src, float 100.00, i32 9)
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91 store i64 %result, i64 addrspace(1)* %out
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92 ret void
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93 }
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94
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95 ; GCN-LABEL: {{^}}v_fcmp_f32_une:
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96 ; GCN: v_cmp_neq_f32_e64
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97 define amdgpu_kernel void @v_fcmp_f32_une(i64 addrspace(1)* %out, float %src) {
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98 %result = call i64 @llvm.amdgcn.fcmp.f32(float %src, float 100.00, i32 14)
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99 store i64 %result, i64 addrspace(1)* %out
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100 ret void
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101 }
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102
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103 ; GCN-LABEL: {{^}}v_fcmp_f32_ugt:
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104 ; GCN: v_cmp_nle_f32_e64
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105 define amdgpu_kernel void @v_fcmp_f32_ugt(i64 addrspace(1)* %out, float %src) {
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106 %result = call i64 @llvm.amdgcn.fcmp.f32(float %src, float 100.00, i32 10)
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107 store i64 %result, i64 addrspace(1)* %out
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108 ret void
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109 }
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110
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111 ; GCN-LABEL: {{^}}v_fcmp_f32_uge:
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112 ; GCN: v_cmp_nlt_f32_e64
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113 define amdgpu_kernel void @v_fcmp_f32_uge(i64 addrspace(1)* %out, float %src) {
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114 %result = call i64 @llvm.amdgcn.fcmp.f32(float %src, float 100.00, i32 11)
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115 store i64 %result, i64 addrspace(1)* %out
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116 ret void
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117 }
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118
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119 ; GCN-LABEL: {{^}}v_fcmp_f32_ult:
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120 ; GCN: v_cmp_nge_f32_e64
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121 define amdgpu_kernel void @v_fcmp_f32_ult(i64 addrspace(1)* %out, float %src) {
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122 %result = call i64 @llvm.amdgcn.fcmp.f32(float %src, float 100.00, i32 12)
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123 store i64 %result, i64 addrspace(1)* %out
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124 ret void
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125 }
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126
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127 ; GCN-LABEL: {{^}}v_fcmp_f32_ule:
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128 ; GCN: v_cmp_ngt_f32_e64
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129 define amdgpu_kernel void @v_fcmp_f32_ule(i64 addrspace(1)* %out, float %src) {
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130 %result = call i64 @llvm.amdgcn.fcmp.f32(float %src, float 100.00, i32 13)
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131 store i64 %result, i64 addrspace(1)* %out
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132 ret void
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133 }
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134
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135 ; GCN-LABEL: {{^}}v_fcmp_f64_oeq:
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136 ; GCN: v_cmp_eq_f64_e64
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137 define amdgpu_kernel void @v_fcmp_f64_oeq(i64 addrspace(1)* %out, double %src) {
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138 %result = call i64 @llvm.amdgcn.fcmp.f64(double %src, double 100.00, i32 1)
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139 store i64 %result, i64 addrspace(1)* %out
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140 ret void
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141 }
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142
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143 ; GCN-LABEL: {{^}}v_fcmp_f64_one:
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144 ; GCN: v_cmp_neq_f64_e64
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145 define amdgpu_kernel void @v_fcmp_f64_one(i64 addrspace(1)* %out, double %src) {
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146 %result = call i64 @llvm.amdgcn.fcmp.f64(double %src, double 100.00, i32 6)
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147 store i64 %result, i64 addrspace(1)* %out
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148 ret void
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149 }
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150
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151 ; GCN-LABEL: {{^}}v_fcmp_f64_ogt:
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152 ; GCN: v_cmp_gt_f64_e64
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153 define amdgpu_kernel void @v_fcmp_f64_ogt(i64 addrspace(1)* %out, double %src) {
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154 %result = call i64 @llvm.amdgcn.fcmp.f64(double %src, double 100.00, i32 2)
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155 store i64 %result, i64 addrspace(1)* %out
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156 ret void
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157 }
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158
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159 ; GCN-LABEL: {{^}}v_fcmp_f64_oge:
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160 ; GCN: v_cmp_ge_f64_e64
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161 define amdgpu_kernel void @v_fcmp_f64_oge(i64 addrspace(1)* %out, double %src) {
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162 %result = call i64 @llvm.amdgcn.fcmp.f64(double %src, double 100.00, i32 3)
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163 store i64 %result, i64 addrspace(1)* %out
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164 ret void
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165 }
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166
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167 ; GCN-LABEL: {{^}}v_fcmp_f64_olt:
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168 ; GCN: v_cmp_lt_f64_e64
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169 define amdgpu_kernel void @v_fcmp_f64_olt(i64 addrspace(1)* %out, double %src) {
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170 %result = call i64 @llvm.amdgcn.fcmp.f64(double %src, double 100.00, i32 4)
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171 store i64 %result, i64 addrspace(1)* %out
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172 ret void
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173 }
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174
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175 ; GCN-LABEL: {{^}}v_fcmp_f64_ole:
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176 ; GCN: v_cmp_le_f64_e64
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177 define amdgpu_kernel void @v_fcmp_f64_ole(i64 addrspace(1)* %out, double %src) {
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178 %result = call i64 @llvm.amdgcn.fcmp.f64(double %src, double 100.00, i32 5)
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179 store i64 %result, i64 addrspace(1)* %out
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180 ret void
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181 }
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182
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183 ; GCN-LABEL: {{^}}v_fcmp_f64_ueq:
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184 ; GCN: v_cmp_nlg_f64_e64
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185 define amdgpu_kernel void @v_fcmp_f64_ueq(i64 addrspace(1)* %out, double %src) {
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186 %result = call i64 @llvm.amdgcn.fcmp.f64(double %src, double 100.00, i32 9)
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187 store i64 %result, i64 addrspace(1)* %out
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188 ret void
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189 }
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190
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191 ; GCN-LABEL: {{^}}v_fcmp_f64_une:
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192 ; GCN: v_cmp_neq_f64_e64
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193 define amdgpu_kernel void @v_fcmp_f64_une(i64 addrspace(1)* %out, double %src) {
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194 %result = call i64 @llvm.amdgcn.fcmp.f64(double %src, double 100.00, i32 14)
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195 store i64 %result, i64 addrspace(1)* %out
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196 ret void
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197 }
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198
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199 ; GCN-LABEL: {{^}}v_fcmp_f64_ugt:
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200 ; GCN: v_cmp_nle_f64_e64
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201 define amdgpu_kernel void @v_fcmp_f64_ugt(i64 addrspace(1)* %out, double %src) {
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202 %result = call i64 @llvm.amdgcn.fcmp.f64(double %src, double 100.00, i32 10)
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203 store i64 %result, i64 addrspace(1)* %out
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204 ret void
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205 }
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206
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207 ; GCN-LABEL: {{^}}v_fcmp_f64_uge:
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208 ; GCN: v_cmp_nlt_f64_e64
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209 define amdgpu_kernel void @v_fcmp_f64_uge(i64 addrspace(1)* %out, double %src) {
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210 %result = call i64 @llvm.amdgcn.fcmp.f64(double %src, double 100.00, i32 11)
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211 store i64 %result, i64 addrspace(1)* %out
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212 ret void
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213 }
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214
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215 ; GCN-LABEL: {{^}}v_fcmp_f64_ult:
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216 ; GCN: v_cmp_nge_f64_e64
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217 define amdgpu_kernel void @v_fcmp_f64_ult(i64 addrspace(1)* %out, double %src) {
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218 %result = call i64 @llvm.amdgcn.fcmp.f64(double %src, double 100.00, i32 12)
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219 store i64 %result, i64 addrspace(1)* %out
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220 ret void
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221 }
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222
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223 ; GCN-LABEL: {{^}}v_fcmp_f64_ule:
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224 ; GCN: v_cmp_ngt_f64_e64
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225 define amdgpu_kernel void @v_fcmp_f64_ule(i64 addrspace(1)* %out, double %src) {
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226 %result = call i64 @llvm.amdgcn.fcmp.f64(double %src, double 100.00, i32 13)
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227 store i64 %result, i64 addrspace(1)* %out
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228 ret void
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229 }
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230
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231 ; GCN-LABEL: {{^}}v_fcmp_f16_oeq_with_fabs:
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232 ; VI: v_cmp_eq_f16_e64 {{s\[[0-9]+:[0-9]+\]}}, {{s[0-9]+}}, |{{v[0-9]+}}|
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233
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234 ; SI: v_cvt_f32_f16_e32 [[CVT0:v[0-9]+]], s{{[0-9]+}}
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235 ; SI: v_cvt_f32_f16_e64 [[CVT1:v[0-9]+]], |s{{[0-9]+}}|
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236 ; SI: v_cmp_eq_f32_e64 s{{\[[0-9]+:[0-9]+\]}}, [[CVT0]], [[CVT1]]
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237 define amdgpu_kernel void @v_fcmp_f16_oeq_with_fabs(i64 addrspace(1)* %out, half %src, half %a) {
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238 %temp = call half @llvm.fabs.f16(half %a)
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239 %result = call i64 @llvm.amdgcn.fcmp.f16(half %src, half %temp, i32 1)
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240 store i64 %result, i64 addrspace(1)* %out
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241 ret void
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242 }
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243
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244 ; GCN-LABEL: {{^}}v_fcmp_f16_oeq_both_operands_with_fabs:
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245 ; VI: v_cmp_eq_f16_e64 {{s\[[0-9]+:[0-9]+\]}}, |{{s[0-9]+}}|, |{{v[0-9]+}}|
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246
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247 ; SI: v_cvt_f32_f16_e64 [[CVT0:v[0-9]+]], |s{{[0-9]+}}|
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248 ; SI: v_cvt_f32_f16_e64 [[CVT1:v[0-9]+]], |s{{[0-9]+}}|
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249 ; SI: v_cmp_eq_f32_e64 s{{\[[0-9]+:[0-9]+\]}}, [[CVT0]], [[CVT1]]
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250 define amdgpu_kernel void @v_fcmp_f16_oeq_both_operands_with_fabs(i64 addrspace(1)* %out, half %src, half %a) {
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251 %temp = call half @llvm.fabs.f16(half %a)
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252 %src_input = call half @llvm.fabs.f16(half %src)
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253 %result = call i64 @llvm.amdgcn.fcmp.f16(half %src_input, half %temp, i32 1)
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254 store i64 %result, i64 addrspace(1)* %out
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255 ret void
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256 }
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257
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258 ; GCN-LABEL: {{^}}v_fcmp_f16:
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259 ; GCN-NOT: v_cmp_eq_
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260 define amdgpu_kernel void @v_fcmp_f16(i64 addrspace(1)* %out, half %src) {
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261 %result = call i64 @llvm.amdgcn.fcmp.f16(half %src, half 100.00, i32 -1)
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262 store i64 %result, i64 addrspace(1)* %out
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263 ret void
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264 }
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265
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266 ; GCN-LABEL: {{^}}v_fcmp_f16_oeq:
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267 ; VI: v_cmp_eq_f16_e64
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268
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269 ; SI-DAG: s_mov_b32 [[K:s[0-9]+]], 0x42c80000
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270 ; SI-DAG: v_cvt_f32_f16_e32 [[CVT:v[0-9]+]], s{{[0-9]+}}
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271 ; SI: v_cmp_eq_f32_e64 s{{\[[0-9]+:[0-9]+\]}}, [[K]], [[CVT]]
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272 define amdgpu_kernel void @v_fcmp_f16_oeq(i64 addrspace(1)* %out, half %src) {
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273 %result = call i64 @llvm.amdgcn.fcmp.f16(half %src, half 100.00, i32 1)
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274 store i64 %result, i64 addrspace(1)* %out
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275 ret void
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276 }
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277
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278 ; GCN-LABEL: {{^}}v_fcmp_f16_one:
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279 ; VI: v_cmp_neq_f16_e64
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280
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281 ; SI-DAG: s_mov_b32 [[K:s[0-9]+]], 0x42c80000
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282 ; SI-DAG: v_cvt_f32_f16_e32 [[CVT:v[0-9]+]], s{{[0-9]+}}
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283 ; SI: v_cmp_neq_f32_e64 s{{\[[0-9]+:[0-9]+\]}}, [[K]], [[CVT]]
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284 define amdgpu_kernel void @v_fcmp_f16_one(i64 addrspace(1)* %out, half %src) {
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285 %result = call i64 @llvm.amdgcn.fcmp.f16(half %src, half 100.00, i32 6)
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286 store i64 %result, i64 addrspace(1)* %out
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287 ret void
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288 }
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289
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290 ; GCN-LABEL: {{^}}v_fcmp_f16_ogt:
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291 ; VI: v_cmp_gt_f16_e64
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292
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293 ; SI-DAG: s_mov_b32 [[K:s[0-9]+]], 0x42c80000
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294 ; SI-DAG: v_cvt_f32_f16_e32 [[CVT:v[0-9]+]], s{{[0-9]+}}
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295 ; SI: v_cmp_lt_f32_e64 s{{\[[0-9]+:[0-9]+\]}}, [[K]], [[CVT]]
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296 define amdgpu_kernel void @v_fcmp_f16_ogt(i64 addrspace(1)* %out, half %src) {
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297 %result = call i64 @llvm.amdgcn.fcmp.f16(half %src, half 100.00, i32 2)
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298 store i64 %result, i64 addrspace(1)* %out
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299 ret void
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300 }
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301
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302 ; GCN-LABEL: {{^}}v_fcmp_f16_oge:
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303 ; VI: v_cmp_ge_f16_e64
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304
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305 ; SI-DAG: s_mov_b32 [[K:s[0-9]+]], 0x42c80000
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306 ; SI-DAG: v_cvt_f32_f16_e32 [[CVT:v[0-9]+]], s{{[0-9]+}}
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307 ; SI: v_cmp_le_f32_e64 s{{\[[0-9]+:[0-9]+\]}}, [[K]], [[CVT]]
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308 define amdgpu_kernel void @v_fcmp_f16_oge(i64 addrspace(1)* %out, half %src) {
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309 %result = call i64 @llvm.amdgcn.fcmp.f16(half %src, half 100.00, i32 3)
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310 store i64 %result, i64 addrspace(1)* %out
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311 ret void
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312 }
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313
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314 ; GCN-LABEL: {{^}}v_fcmp_f16_olt:
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315 ; VI: v_cmp_lt_f16_e64
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316
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317 ; SI-DAG: s_mov_b32 [[K:s[0-9]+]], 0x42c80000
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318 ; SI-DAG: v_cvt_f32_f16_e32 [[CVT:v[0-9]+]], s{{[0-9]+}}
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319 ; SI: v_cmp_gt_f32_e64 s{{\[[0-9]+:[0-9]+\]}}, [[K]], [[CVT]]
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320 define amdgpu_kernel void @v_fcmp_f16_olt(i64 addrspace(1)* %out, half %src) {
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321 %result = call i64 @llvm.amdgcn.fcmp.f16(half %src, half 100.00, i32 4)
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322 store i64 %result, i64 addrspace(1)* %out
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323 ret void
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324 }
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325
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326 ; GCN-LABEL: {{^}}v_fcmp_f16_ole:
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327 ; VI: v_cmp_le_f16_e64
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328
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329 ; SI-DAG: s_mov_b32 [[K:s[0-9]+]], 0x42c80000
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330 ; SI-DAG: v_cvt_f32_f16_e32 [[CVT:v[0-9]+]], s{{[0-9]+}}
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331 ; SI: v_cmp_ge_f32_e64 s{{\[[0-9]+:[0-9]+\]}}, [[K]], [[CVT]]
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332 define amdgpu_kernel void @v_fcmp_f16_ole(i64 addrspace(1)* %out, half %src) {
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333 %result = call i64 @llvm.amdgcn.fcmp.f16(half %src, half 100.00, i32 5)
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334 store i64 %result, i64 addrspace(1)* %out
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335 ret void
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336 }
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337
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338 ; GCN-LABEL: {{^}}v_fcmp_f16_ueq:
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339 ; VI: v_cmp_nlg_f16_e64
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340
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341 ; SI-DAG: s_mov_b32 [[K:s[0-9]+]], 0x42c80000
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342 ; SI-DAG: v_cvt_f32_f16_e32 [[CVT:v[0-9]+]], s{{[0-9]+}}
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343 ; SI: v_cmp_nlg_f32_e64 s{{\[[0-9]+:[0-9]+\]}}, [[K]], [[CVT]]
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344 define amdgpu_kernel void @v_fcmp_f16_ueq(i64 addrspace(1)* %out, half %src) {
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345 %result = call i64 @llvm.amdgcn.fcmp.f16(half %src, half 100.00, i32 9)
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346 store i64 %result, i64 addrspace(1)* %out
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347 ret void
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348 }
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349
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350 ; GCN-LABEL: {{^}}v_fcmp_f16_une:
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351 ; VI: v_cmp_neq_f16_e64
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352
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353 ; SI-DAG: s_mov_b32 [[K:s[0-9]+]], 0x42c80000
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354 ; SI-DAG: v_cvt_f32_f16_e32 [[CVT:v[0-9]+]], s{{[0-9]+}}
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355 ; SI: v_cmp_neq_f32_e64 s{{\[[0-9]+:[0-9]+\]}}, [[K]], [[CVT]]
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356 define amdgpu_kernel void @v_fcmp_f16_une(i64 addrspace(1)* %out, half %src) {
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357 %result = call i64 @llvm.amdgcn.fcmp.f16(half %src, half 100.00, i32 14)
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358 store i64 %result, i64 addrspace(1)* %out
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359 ret void
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360 }
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361
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362 ; GCN-LABEL: {{^}}v_fcmp_f16_ugt:
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363 ; VI: v_cmp_nle_f16_e64
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364
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365 ; SI-DAG: s_mov_b32 [[K:s[0-9]+]], 0x42c80000
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parents:
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366 ; SI-DAG: v_cvt_f32_f16_e32 [[CVT:v[0-9]+]], s{{[0-9]+}}
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367 ; SI: v_cmp_nge_f32_e64 s{{\[[0-9]+:[0-9]+\]}}, [[K]], [[CVT]]
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368 define amdgpu_kernel void @v_fcmp_f16_ugt(i64 addrspace(1)* %out, half %src) {
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369 %result = call i64 @llvm.amdgcn.fcmp.f16(half %src, half 100.00, i32 10)
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370 store i64 %result, i64 addrspace(1)* %out
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371 ret void
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372 }
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373
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374 ; GCN-LABEL: {{^}}v_fcmp_f16_uge:
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375 ; VI: v_cmp_nlt_f16_e64
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376
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377 ; SI-DAG: s_mov_b32 [[K:s[0-9]+]], 0x42c80000
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parents:
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378 ; SI-DAG: v_cvt_f32_f16_e32 [[CVT:v[0-9]+]], s{{[0-9]+}}
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379 ; SI: v_cmp_ngt_f32_e64 s{{\[[0-9]+:[0-9]+\]}}, [[K]], [[CVT]]
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380 define amdgpu_kernel void @v_fcmp_f16_uge(i64 addrspace(1)* %out, half %src) {
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381 %result = call i64 @llvm.amdgcn.fcmp.f16(half %src, half 100.00, i32 11)
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382 store i64 %result, i64 addrspace(1)* %out
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parents:
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383 ret void
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parents:
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384 }
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parents:
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385
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386 ; GCN-LABEL: {{^}}v_fcmp_f16_ult:
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387 ; VI: v_cmp_nge_f16_e64
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388
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parents:
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389 ; SI-DAG: s_mov_b32 [[K:s[0-9]+]], 0x42c80000
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parents:
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390 ; SI-DAG: v_cvt_f32_f16_e32 [[CVT:v[0-9]+]], s{{[0-9]+}}
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parents:
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391 ; SI: v_cmp_nle_f32_e64 s{{\[[0-9]+:[0-9]+\]}}, [[K]], [[CVT]]
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392 define amdgpu_kernel void @v_fcmp_f16_ult(i64 addrspace(1)* %out, half %src) {
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393 %result = call i64 @llvm.amdgcn.fcmp.f16(half %src, half 100.00, i32 12)
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parents:
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394 store i64 %result, i64 addrspace(1)* %out
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parents:
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395 ret void
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parents:
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396 }
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parents:
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397
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398 ; GCN-LABEL: {{^}}v_fcmp_f16_ule:
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399 ; VI: v_cmp_ngt_f16_e64
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parents:
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400
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parents:
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401 ; SI-DAG: s_mov_b32 [[K:s[0-9]+]], 0x42c80000
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parents:
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402 ; SI-DAG: v_cvt_f32_f16_e32 [[CVT:v[0-9]+]], s{{[0-9]+}}
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parents:
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403 ; SI: v_cmp_nlt_f32_e64 s{{\[[0-9]+:[0-9]+\]}}, [[K]], [[CVT]]
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parents:
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404 define amdgpu_kernel void @v_fcmp_f16_ule(i64 addrspace(1)* %out, half %src) {
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405 %result = call i64 @llvm.amdgcn.fcmp.f16(half %src, half 100.00, i32 13)
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parents:
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406 store i64 %result, i64 addrspace(1)* %out
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parents:
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407 ret void
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parents:
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408 }
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parents:
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409
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410 attributes #0 = { nounwind readnone convergent }