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150
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1 ; RUN: llc -march=amdgcn -mcpu=verde -verify-machineinstrs < %s | FileCheck %s
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2 ; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck %s
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3
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4 ; This is used to crash in LiveIntervalAnalysis via SILoadStoreOptimizer
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5 ; while fixing up the merge of two ds_write instructions.
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6
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7 @tess_lds = external addrspace(3) global [8192 x i32]
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8
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9 ; CHECK-LABEL: {{^}}main:
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10 ; CHECK-DAG: ds_write_b32
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11 ; CHECK-DAG: ds_write_b32
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12 ; CHECK-DAG: v_mov_b32_e32 v1, v0
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13 ; CHECK: tbuffer_store_format_xyzw v[0:3],
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14 define amdgpu_vs void @main(i32 inreg %arg) {
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15 main_body:
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16 %tmp = load float, float addrspace(3)* undef, align 4
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17 %tmp1 = load float, float addrspace(3)* undef, align 4
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18 store float %tmp, float addrspace(3)* null, align 4
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19 %tmp2 = bitcast float %tmp to i32
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20 %tmp3 = add nuw nsw i32 0, 1
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21 %tmp4 = zext i32 %tmp3 to i64
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22 %tmp5 = getelementptr [8192 x i32], [8192 x i32] addrspace(3)* @tess_lds, i64 0, i64 %tmp4
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23 %tmp6 = bitcast i32 addrspace(3)* %tmp5 to float addrspace(3)*
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24 store float %tmp1, float addrspace(3)* %tmp6, align 4
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25 %tmp7 = bitcast float %tmp1 to i32
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26 %tmp8 = insertelement <4 x i32> undef, i32 %tmp2, i32 0
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27 %tmp9 = insertelement <4 x i32> %tmp8, i32 %tmp7, i32 1
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28 %tmp10 = insertelement <4 x i32> %tmp9, i32 undef, i32 2
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29 %tmp11 = insertelement <4 x i32> %tmp10, i32 undef, i32 3
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30 call void @llvm.amdgcn.tbuffer.store.v4i32(<4 x i32> %tmp11, <4 x i32> undef, i32 undef, i32 0, i32 %arg, i32 0, i32 14, i32 4, i1 1, i1 1)
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31 ret void
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32 }
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33
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34 ; Function Attrs: nounwind
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35 declare void @llvm.amdgcn.tbuffer.store.v4i32(<4 x i32>, <4 x i32>, i32, i32, i32, i32, i32, i32, i1, i1) #0
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36
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37 attributes #0 = { nounwind }
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