150
|
1 ; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -amdgpu-any-address-space-out-arguments -amdgpu-rewrite-out-arguments < %s | FileCheck %s
|
|
2
|
|
3 ; CHECK: %void_one_out_non_private_arg_i32_1_use = type { i32 }
|
|
4 ; CHECK: %bitcast_pointer_as1 = type { <3 x i32> }
|
|
5
|
|
6 ; CHECK-LABEL: define private %void_one_out_non_private_arg_i32_1_use @void_one_out_non_private_arg_i32_1_use.body(i32 addrspace(1)* %val) #0 {
|
|
7 ; CHECK-NEXT: ret %void_one_out_non_private_arg_i32_1_use zeroinitializer
|
|
8
|
|
9 ; CHECK-LABEL: define void @void_one_out_non_private_arg_i32_1_use(i32 addrspace(1)* %0) #1 {
|
|
10 ; CHECK-NEXT: %2 = call %void_one_out_non_private_arg_i32_1_use @void_one_out_non_private_arg_i32_1_use.body(i32 addrspace(1)* undef)
|
|
11 ; CHECK-NEXT: %3 = extractvalue %void_one_out_non_private_arg_i32_1_use %2, 0
|
|
12 ; CHECK-NEXT: store i32 %3, i32 addrspace(1)* %0, align 4
|
|
13 ; CHECK-NEXT: ret void
|
|
14 define void @void_one_out_non_private_arg_i32_1_use(i32 addrspace(1)* %val) #0 {
|
|
15 store i32 0, i32 addrspace(1)* %val
|
|
16 ret void
|
|
17 }
|
|
18
|
|
19 ; CHECK-LABEL: define private %bitcast_pointer_as1 @bitcast_pointer_as1.body(<3 x i32> addrspace(1)* %out) #0 {
|
|
20 ; CHECK-NEXT: %load = load volatile <4 x i32>, <4 x i32> addrspace(1)* undef
|
|
21 ; CHECK-NEXT: %bitcast = bitcast <3 x i32> addrspace(1)* %out to <4 x i32> addrspace(1)*
|
|
22 ; CHECK-NEXT: %1 = shufflevector <4 x i32> %load, <4 x i32> undef, <3 x i32> <i32 0, i32 1, i32 2>
|
|
23 ; CHECK-NEXT: %2 = insertvalue %bitcast_pointer_as1 undef, <3 x i32> %1, 0
|
|
24 ; CHECK-NEXT: ret %bitcast_pointer_as1 %2
|
|
25
|
|
26 ; CHECK-LABEL: define void @bitcast_pointer_as1(<3 x i32> addrspace(1)* %0) #1 {
|
|
27 ; CHECK-NEXT: %2 = call %bitcast_pointer_as1 @bitcast_pointer_as1.body(<3 x i32> addrspace(1)* undef)
|
|
28 define void @bitcast_pointer_as1(<3 x i32> addrspace(1)* %out) #0 {
|
|
29 %load = load volatile <4 x i32>, <4 x i32> addrspace(1)* undef
|
|
30 %bitcast = bitcast <3 x i32> addrspace(1)* %out to <4 x i32> addrspace(1)*
|
|
31 store <4 x i32> %load, <4 x i32> addrspace(1)* %bitcast
|
|
32 ret void
|
|
33 }
|
|
34
|
|
35 ; CHECK: attributes #0 = { nounwind }
|
|
36 ; CHECK: attributes #1 = { alwaysinline nounwind }
|
|
37 attributes #0 = { nounwind }
|