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150
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1 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=fiji -mattr=-flat-for-global -enable-ipra=0 -amdgpu-sroa=0 -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,VI,CIVI,MESA %s
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2 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=hawaii -enable-ipra=0 -amdgpu-sroa=0 -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,CI,CIVI,MESA %s
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3 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -mattr=-flat-for-global -enable-ipra=0 -amdgpu-sroa=0 -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,GFX9,MESA %s
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4 target datalayout = "A5"
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5
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6 ; FIXME: Why is this commuted only sometimes?
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7 ; GCN-LABEL: {{^}}i32_fastcc_i32_i32:
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8 ; GCN: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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9 ; CIVI-NEXT: v_add_{{i|u}}32_e32 v0, vcc, v0, v1
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10 ; GFX9-NEXT: v_add_u32_e32 v0, v0, v1
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11 ; GCN-NEXT: s_setpc_b64
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12 define fastcc i32 @i32_fastcc_i32_i32(i32 %arg0, i32 %arg1) #1 {
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13 %add0 = add i32 %arg0, %arg1
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14 ret i32 %add0
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15 }
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16
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17 ; GCN-LABEL: {{^}}i32_fastcc_i32_i32_stack_object:
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18 ; GCN: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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19 ; GCN-NEXT: v_mov_b32_e32 [[K:v[0-9]+]], 9
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20 ; CIVI-NEXT: v_add_{{i|u}}32_e32 v0, vcc, v0, v1
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21 ; GFX9-NEXT: v_add_u32_e32 v0, v0, v1
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22 ; GCN: buffer_store_dword [[K]], off, s[0:3], s32 offset:20
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23 ; GCN: s_waitcnt vmcnt(0)
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24 ; GCN: s_setpc_b64
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25 ; GCN: ; ScratchSize: 68
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26 define fastcc i32 @i32_fastcc_i32_i32_stack_object(i32 %arg0, i32 %arg1) #1 {
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27 %alloca = alloca [16 x i32], align 4, addrspace(5)
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28 %gep = getelementptr inbounds [16 x i32], [16 x i32] addrspace(5)* %alloca, i32 0, i32 5
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29 store volatile i32 9, i32 addrspace(5)* %gep
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30 %add0 = add i32 %arg0, %arg1
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31 ret i32 %add0
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32 }
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33
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34 ; GCN-LABEL: {{^}}sibling_call_i32_fastcc_i32_i32:
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35 define hidden fastcc i32 @sibling_call_i32_fastcc_i32_i32(i32 %a, i32 %b, i32 %c) #1 {
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36 entry:
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37 %ret = tail call fastcc i32 @i32_fastcc_i32_i32(i32 %a, i32 %b)
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38 ret i32 %ret
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39 }
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40
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41 ; GCN-LABEL: {{^}}sibling_call_i32_fastcc_i32_i32_stack_object:
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42 ; GCN: v_mov_b32_e32 [[NINE:v[0-9]+]], 9
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43 ; GCN: buffer_store_dword [[NINE]], off, s[0:3], s32 offset:20
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44 ; GCN: s_setpc_b64
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45 ; GCN: ; ScratchSize: 68
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46 define fastcc i32 @sibling_call_i32_fastcc_i32_i32_stack_object(i32 %a, i32 %b, i32 %c) #1 {
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47 entry:
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48 %alloca = alloca [16 x i32], align 4, addrspace(5)
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49 %gep = getelementptr inbounds [16 x i32], [16 x i32] addrspace(5)* %alloca, i32 0, i32 5
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50 store volatile i32 9, i32 addrspace(5)* %gep
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51 %ret = tail call fastcc i32 @i32_fastcc_i32_i32(i32 %a, i32 %b)
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52 ret i32 %ret
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53 }
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54
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55 ; GCN-LABEL: {{^}}sibling_call_i32_fastcc_i32_i32_callee_stack_object:
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56 ; GCN: v_mov_b32_e32 [[NINE:v[0-9]+]], 9
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57 ; GCN: buffer_store_dword [[NINE]], off, s[0:3], s32 offset:20
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58 ; GCN: s_setpc_b64
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59 ; GCN: ; ScratchSize: 136
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60 define fastcc i32 @sibling_call_i32_fastcc_i32_i32_callee_stack_object(i32 %a, i32 %b, i32 %c) #1 {
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61 entry:
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62 %alloca = alloca [16 x i32], align 4, addrspace(5)
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63 %gep = getelementptr inbounds [16 x i32], [16 x i32] addrspace(5)* %alloca, i32 0, i32 5
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64 store volatile i32 9, i32 addrspace(5)* %gep
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65 %ret = tail call fastcc i32 @i32_fastcc_i32_i32_stack_object(i32 %a, i32 %b)
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66 ret i32 %ret
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67 }
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68
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69 ; GCN-LABEL: {{^}}sibling_call_i32_fastcc_i32_i32_unused_result:
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70 define fastcc void @sibling_call_i32_fastcc_i32_i32_unused_result(i32 %a, i32 %b, i32 %c) #1 {
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71 entry:
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72 %ret = tail call fastcc i32 @i32_fastcc_i32_i32(i32 %a, i32 %b)
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73 ret void
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74 }
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75
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76 ; It doesn't make sense to do a tail from a kernel
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77 ; GCN-LABEL: {{^}}kernel_call_i32_fastcc_i32_i32_unused_result:
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78 ;define amdgpu_kernel void @kernel_call_i32_fastcc_i32_i32_unused_result(i32 %a, i32 %b, i32 %c) #1 {
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79 define amdgpu_kernel void @kernel_call_i32_fastcc_i32_i32_unused_result(i32 %a, i32 %b, i32 %c) #1 {
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80 entry:
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81 %ret = tail call fastcc i32 @i32_fastcc_i32_i32(i32 %a, i32 %b)
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82 ret void
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83 }
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84
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85 ; GCN-LABEL: {{^}}i32_fastcc_i32_byval_i32:
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86 ; GCN: s_waitcnt
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87 ; GCN-NEXT: buffer_load_dword v1, off, s[0:3], s32{{$}}
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88 ; GCN-NEXT: s_waitcnt vmcnt(0)
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89
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90 ; CIVI-NEXT: v_add_{{i|u}}32_e32 v0, vcc, v0, v1
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91 ; GFX9-NEXT: v_add_u32_e32 v0, v0, v1
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92
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93 ; GCN-NEXT: s_setpc_b64 s[30:31]
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94 define hidden fastcc i32 @i32_fastcc_i32_byval_i32(i32 %arg0, i32 addrspace(5)* byval align 4 %arg1) #1 {
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95 %arg1.load = load i32, i32 addrspace(5)* %arg1, align 4
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96 %add0 = add i32 %arg0, %arg1.load
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97 ret i32 %add0
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98 }
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99
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100 ; Tail call disallowed with byval in parent.
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101 ; GCN-LABEL: {{^}}sibling_call_i32_fastcc_i32_byval_i32_byval_parent:
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102 ; GCN-NOT: v_writelane_b32 v{{[0-9]+}}, s32
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103 ; GCN: buffer_store_dword v{{[0-9]+}}, off, s[0:3], s32{{$}}
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104 ; GCN: s_swappc_b64
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105 ; GCN-NOT: v_readlane_b32 s32
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106 ; GCN: s_setpc_b64
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107 define fastcc i32 @sibling_call_i32_fastcc_i32_byval_i32_byval_parent(i32 %a, i32 addrspace(5)* byval %b.byval, i32 %c) #1 {
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108 entry:
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109 %ret = tail call fastcc i32 @i32_fastcc_i32_byval_i32(i32 %a, i32 addrspace(5)* %b.byval)
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110 ret i32 %ret
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111 }
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112
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113 ; Tail call disallowed with byval in parent, not callee. The stack
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114 ; usage of incoming arguments must be <= the outgoing stack
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115 ; arguments.
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116
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117 ; GCN-LABEL: {{^}}sibling_call_i32_fastcc_i32_byval_i32:
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118 ; GCN-NOT: v0
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119 ; GCN-NOT: s32
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120 ; GCN: buffer_load_dword v1, off, s[0:3], s33 offset:16
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121 ; GCN: buffer_store_dword v1, off, s[0:3], s32{{$}}
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122 ; GCN-NEXT: s_setpc_b64
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123 define fastcc i32 @sibling_call_i32_fastcc_i32_byval_i32(i32 %a, [32 x i32] %large) #1 {
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124 entry:
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125 %ret = tail call fastcc i32 @i32_fastcc_i32_byval_i32(i32 %a, i32 addrspace(5)* inttoptr (i32 16 to i32 addrspace(5)*))
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126 ret i32 %ret
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127 }
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128
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129 ; GCN-LABEL: {{^}}i32_fastcc_i32_i32_a32i32:
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130 ; GCN: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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131 ; GCN-DAG: buffer_load_dword [[LOAD_0:v[0-9]+]], off, s[0:3], s32{{$}}
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132 ; GCN-DAG: buffer_load_dword [[LOAD_1:v[0-9]+]], off, s[0:3], s32 offset:4
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133
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134 ; CIVI-NEXT: v_add_{{i|u}}32_e32 v0, vcc, v0, v1
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135 ; CIVI: v_add_{{i|u}}32_e32 v0, vcc, v0, [[LOAD_0]]
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136 ; CIVI: v_add_{{i|u}}32_e32 v0, vcc, v0, [[LOAD_1]]
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137
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138
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139 ; GFX9-NEXT: v_add_u32_e32 v0, v0, v1
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140 ; GFX9: v_add3_u32 v0, v0, v3, v2
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141
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142 ; GCN-NEXT: s_setpc_b64
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143 define fastcc i32 @i32_fastcc_i32_i32_a32i32(i32 %arg0, i32 %arg1, [32 x i32] %large) #1 {
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144 %val_firststack = extractvalue [32 x i32] %large, 30
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145 %val_laststack = extractvalue [32 x i32] %large, 31
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146 %add0 = add i32 %arg0, %arg1
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147 %add1 = add i32 %add0, %val_firststack
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148 %add2 = add i32 %add1, %val_laststack
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149 ret i32 %add2
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150 }
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151
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152 ; FIXME: Why load and store same location for stack args?
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153 ; GCN-LABEL: {{^}}sibling_call_i32_fastcc_i32_i32_a32i32:
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154
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155 ; GCN-DAG: buffer_store_dword v32, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
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156 ; GCN-DAG: buffer_store_dword v33, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
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157
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158 ; GCN-DAG: buffer_load_dword [[LOAD_0:v[0-9]+]], off, s[0:3], s32{{$}}
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159 ; GCN-DAG: buffer_load_dword [[LOAD_1:v[0-9]+]], off, s[0:3], s32 offset:4
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160
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161 ; GCN-NOT: s32
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162
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163 ; GCN-DAG: buffer_store_dword [[LOAD_0]], off, s[0:3], s32{{$}}
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164 ; GCN-DAG: buffer_store_dword [[LOAD_1]], off, s[0:3], s32 offset:4
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165
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166 ; GCN-DAG: buffer_load_dword v32, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload
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167 ; GCN-DAG: buffer_load_dword v33, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
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168
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169 ; GCN-NOT: s32
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170 ; GCN: s_setpc_b64
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171 define fastcc i32 @sibling_call_i32_fastcc_i32_i32_a32i32(i32 %a, i32 %b, [32 x i32] %c) #1 {
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172 entry:
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173 %ret = tail call fastcc i32 @i32_fastcc_i32_i32_a32i32(i32 %a, i32 %b, [32 x i32] %c)
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174 ret i32 %ret
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175 }
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176
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177 ; GCN-LABEL: {{^}}sibling_call_i32_fastcc_i32_i32_a32i32_stack_object:
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178 ; GCN-DAG: v_mov_b32_e32 [[NINE:v[0-9]+]], 9
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179 ; GCN: buffer_store_dword [[NINE]], off, s[0:3], s32 offset:40
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180 ; GCN: s_setpc_b64
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181 define fastcc i32 @sibling_call_i32_fastcc_i32_i32_a32i32_stack_object(i32 %a, i32 %b, [32 x i32] %c) #1 {
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182 entry:
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183 %alloca = alloca [16 x i32], align 4, addrspace(5)
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184 %gep = getelementptr inbounds [16 x i32], [16 x i32] addrspace(5)* %alloca, i32 0, i32 5
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185 store volatile i32 9, i32 addrspace(5)* %gep
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186 %ret = tail call fastcc i32 @i32_fastcc_i32_i32_a32i32(i32 %a, i32 %b, [32 x i32] %c)
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187 ret i32 %ret
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188 }
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189
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190 ; If the callee requires more stack argument space than the caller,
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191 ; don't do a tail call.
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192 ; TODO: Do we really need this restriction?
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193
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194 ; GCN-LABEL: {{^}}no_sibling_call_callee_more_stack_space:
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195 ; GCN: s_swappc_b64
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196 ; GCN: s_setpc_b64
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197 define fastcc i32 @no_sibling_call_callee_more_stack_space(i32 %a, i32 %b) #1 {
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198 entry:
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199 %ret = tail call fastcc i32 @i32_fastcc_i32_i32_a32i32(i32 %a, i32 %b, [32 x i32] zeroinitializer)
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200 ret i32 %ret
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201 }
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202
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203 ; Have another non-tail in the function
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204 ; GCN-LABEL: {{^}}sibling_call_i32_fastcc_i32_i32_other_call:
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205 ; GCN: s_or_saveexec_b64 s{{\[[0-9]+:[0-9]+\]}}, -1
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206 ; GCN-NEXT: buffer_store_dword v34, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
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207 ; GCN-NEXT: s_mov_b64 exec
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208 ; GCN: s_mov_b32 s34, s32
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209 ; GCN-DAG: s_add_u32 s32, s32, 0x400
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210
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211 ; GCN-DAG: buffer_store_dword v32, off, s[0:3], s34 offset:4 ; 4-byte Folded Spill
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212 ; GCN-DAG: buffer_store_dword v33, off, s[0:3], s34 ; 4-byte Folded Spill
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213 ; GCN-DAG: v_writelane_b32 v34, s36, 0
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214 ; GCN-DAG: v_writelane_b32 v34, s37, 1
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215
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216 ; GCN-DAG: s_getpc_b64 s[4:5]
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217 ; GCN-DAG: s_add_u32 s4, s4, i32_fastcc_i32_i32@gotpcrel32@lo+4
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218 ; GCN-DAG: s_addc_u32 s5, s5, i32_fastcc_i32_i32@gotpcrel32@hi+4
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219
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220
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221 ; GCN: s_swappc_b64
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222
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223 ; GCN-DAG: v_readlane_b32 s36, v34, 0
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224 ; GCN-DAG: v_readlane_b32 s37, v34, 1
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225
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226 ; GCN: buffer_load_dword v33, off, s[0:3], s34 ; 4-byte Folded Reload
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227 ; GCN: buffer_load_dword v32, off, s[0:3], s34 offset:4 ; 4-byte Folded Reload
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228
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229 ; GCN: s_getpc_b64 s[4:5]
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230 ; GCN-NEXT: s_add_u32 s4, s4, sibling_call_i32_fastcc_i32_i32@rel32@lo+4
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231 ; GCN-NEXT: s_addc_u32 s5, s5, sibling_call_i32_fastcc_i32_i32@rel32@hi+4
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232
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233 ; GCN: s_sub_u32 s32, s32, 0x400
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234 ; GCN-NEXT: v_readlane_b32 s34,
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235 ; GCN-NEXT: s_or_saveexec_b64 s[6:7], -1
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236 ; GCN-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload
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237 ; GCN-NEXT: s_mov_b64 exec, s[6:7]
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238 ; GCN-NEXT: s_setpc_b64 s[4:5]
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239 define fastcc i32 @sibling_call_i32_fastcc_i32_i32_other_call(i32 %a, i32 %b, i32 %c) #1 {
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240 entry:
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241 %other.call = tail call fastcc i32 @i32_fastcc_i32_i32(i32 %a, i32 %b)
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242 %ret = tail call fastcc i32 @sibling_call_i32_fastcc_i32_i32(i32 %a, i32 %b, i32 %other.call)
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243 ret i32 %ret
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244 }
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245
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246 ; Have stack object in caller and stack passed arguments. SP should be
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247 ; in same place at function exit.
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248
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249 ; GCN-LABEL: {{^}}sibling_call_stack_objecti32_fastcc_i32_i32_a32i32:
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250 ; GCN-NOT: s33
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251 ; GCN: buffer_store_dword v{{[0-9]+}}, off, s[0:3], s32 offset:
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252
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253 ; GCN-NOT: s33
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254
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255 ; GCN: buffer_load_dword v{{[0-9]+}}, off, s[0:3], s32 offset:
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256 ; GCN: s_setpc_b64 s[4:5]
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257 define fastcc i32 @sibling_call_stack_objecti32_fastcc_i32_i32_a32i32(i32 %a, i32 %b, [32 x i32] %c) #1 {
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258 entry:
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259 %alloca = alloca [16 x i32], align 4, addrspace(5)
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260 %gep = getelementptr inbounds [16 x i32], [16 x i32] addrspace(5)* %alloca, i32 0, i32 5
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261 store volatile i32 9, i32 addrspace(5)* %gep
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262 %ret = tail call fastcc i32 @i32_fastcc_i32_i32_a32i32(i32 %a, i32 %b, [32 x i32] %c)
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263 ret i32 %ret
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264 }
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265
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266 ; GCN-LABEL: {{^}}sibling_call_stack_objecti32_fastcc_i32_i32_a32i32_larger_arg_area:
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267 ; GCN-NOT: s33
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268 ; GCN: buffer_store_dword v{{[0-9]+}}, off, s[0:3], s32 offset:44
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269
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270 ; GCN-NOT: s33
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271 ; GCN: s_setpc_b64 s[4:5]
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272 define fastcc i32 @sibling_call_stack_objecti32_fastcc_i32_i32_a32i32_larger_arg_area(i32 %a, i32 %b, [36 x i32] %c) #1 {
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273 entry:
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274 %alloca = alloca [16 x i32], align 4, addrspace(5)
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275 %gep = getelementptr inbounds [16 x i32], [16 x i32] addrspace(5)* %alloca, i32 0, i32 5
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276 store volatile i32 9, i32 addrspace(5)* %gep
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277 %ret = tail call fastcc i32 @i32_fastcc_i32_i32_a32i32(i32 %a, i32 %b, [32 x i32] zeroinitializer)
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278 ret i32 %ret
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279 }
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280
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281 attributes #0 = { nounwind }
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282 attributes #1 = { nounwind noinline }
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