150
|
1 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
|
|
2 ; RUN: opt < %s -aggressive-instcombine -S | FileCheck %s
|
|
3 ; RUN: opt < %s -passes=aggressive-instcombine -S | FileCheck %s
|
|
4
|
|
5 define dso_local i16 @cmp_select_sext_const(i8 %a) {
|
|
6 ; CHECK-LABEL: @cmp_select_sext_const(
|
|
7 ; CHECK-NEXT: entry:
|
|
8 ; CHECK-NEXT: [[CONV:%.*]] = sext i8 [[A:%.*]] to i32
|
|
9 ; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[CONV]], 109
|
|
10 ; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 109, i32 [[CONV]]
|
|
11 ; CHECK-NEXT: [[CONV4:%.*]] = trunc i32 [[COND]] to i16
|
|
12 ; CHECK-NEXT: ret i16 [[CONV4]]
|
|
13 ;
|
|
14 entry:
|
|
15 %conv = sext i8 %a to i32
|
|
16 %cmp = icmp slt i32 %conv, 109
|
|
17 %cond = select i1 %cmp, i32 109, i32 %conv
|
|
18 %conv4 = trunc i32 %cond to i16
|
|
19 ret i16 %conv4
|
|
20 }
|
|
21
|
|
22 define dso_local i16 @cmp_select_sext(i8 %a, i8 %b) {
|
|
23 ; CHECK-LABEL: @cmp_select_sext(
|
|
24 ; CHECK-NEXT: entry:
|
|
25 ; CHECK-NEXT: [[CONV:%.*]] = sext i8 [[A:%.*]] to i32
|
|
26 ; CHECK-NEXT: [[CONV2:%.*]] = sext i8 [[B:%.*]] to i32
|
|
27 ; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[CONV]], [[CONV2]]
|
|
28 ; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[CONV2]], i32 [[CONV]]
|
|
29 ; CHECK-NEXT: [[CONV4:%.*]] = trunc i32 [[COND]] to i16
|
|
30 ; CHECK-NEXT: ret i16 [[CONV4]]
|
|
31 ;
|
|
32 entry:
|
|
33 %conv = sext i8 %a to i32
|
|
34 %conv2 = sext i8 %b to i32
|
|
35 %cmp = icmp slt i32 %conv, %conv2
|
|
36 %cond = select i1 %cmp, i32 %conv2, i32 %conv
|
|
37 %conv4 = trunc i32 %cond to i16
|
|
38 ret i16 %conv4
|
|
39 }
|
|
40
|
|
41 define dso_local i16 @cmp_select_zext(i8 %a, i8 %b) {
|
|
42 ; CHECK-LABEL: @cmp_select_zext(
|
|
43 ; CHECK-NEXT: entry:
|
|
44 ; CHECK-NEXT: [[CONV:%.*]] = zext i8 [[A:%.*]] to i32
|
|
45 ; CHECK-NEXT: [[CONV2:%.*]] = zext i8 [[B:%.*]] to i32
|
|
46 ; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[CONV]], [[CONV2]]
|
|
47 ; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[CONV2]], i32 [[CONV]]
|
|
48 ; CHECK-NEXT: [[CONV4:%.*]] = trunc i32 [[COND]] to i16
|
|
49 ; CHECK-NEXT: ret i16 [[CONV4]]
|
|
50 ;
|
|
51 entry:
|
|
52 %conv = zext i8 %a to i32
|
|
53 %conv2 = zext i8 %b to i32
|
|
54 %cmp = icmp slt i32 %conv, %conv2
|
|
55 %cond = select i1 %cmp, i32 %conv2, i32 %conv
|
|
56 %conv4 = trunc i32 %cond to i16
|
|
57 ret i16 %conv4
|
|
58 }
|
|
59
|
|
60 define dso_local i16 @cmp_select_zext_sext(i8 %a, i8 %b) {
|
|
61 ; CHECK-LABEL: @cmp_select_zext_sext(
|
|
62 ; CHECK-NEXT: entry:
|
|
63 ; CHECK-NEXT: [[CONV:%.*]] = zext i8 [[A:%.*]] to i32
|
|
64 ; CHECK-NEXT: [[CONV2:%.*]] = sext i8 [[B:%.*]] to i32
|
|
65 ; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[CONV]], [[CONV2]]
|
|
66 ; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[CONV2]], i32 [[CONV]]
|
|
67 ; CHECK-NEXT: [[CONV4:%.*]] = trunc i32 [[COND]] to i16
|
|
68 ; CHECK-NEXT: ret i16 [[CONV4]]
|
|
69 ;
|
|
70 entry:
|
|
71 %conv = zext i8 %a to i32
|
|
72 %conv2 = sext i8 %b to i32
|
|
73 %cmp = icmp slt i32 %conv, %conv2
|
|
74 %cond = select i1 %cmp, i32 %conv2, i32 %conv
|
|
75 %conv4 = trunc i32 %cond to i16
|
|
76 ret i16 %conv4
|
|
77 }
|
|
78
|
|
79 define dso_local i16 @cmp_select_zext_sext_diffOrigTy(i8 %a, i16 %b) {
|
|
80 ; CHECK-LABEL: @cmp_select_zext_sext_diffOrigTy(
|
|
81 ; CHECK-NEXT: entry:
|
|
82 ; CHECK-NEXT: [[CONV:%.*]] = zext i8 [[A:%.*]] to i32
|
|
83 ; CHECK-NEXT: [[CONV2:%.*]] = sext i16 [[B:%.*]] to i32
|
|
84 ; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[CONV]], [[CONV2]]
|
|
85 ; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[CONV2]], i32 [[CONV]]
|
|
86 ; CHECK-NEXT: [[CONV4:%.*]] = trunc i32 [[COND]] to i16
|
|
87 ; CHECK-NEXT: ret i16 [[CONV4]]
|
|
88 ;
|
|
89 entry:
|
|
90 %conv = zext i8 %a to i32
|
|
91 %conv2 = sext i16 %b to i32
|
|
92 %cmp = icmp slt i32 %conv, %conv2
|
|
93 %cond = select i1 %cmp, i32 %conv2, i32 %conv
|
|
94 %conv4 = trunc i32 %cond to i16
|
|
95 ret i16 %conv4
|
|
96 }
|
|
97
|
|
98 define dso_local i16 @my_abs_sext(i8 %a) {
|
|
99 ; CHECK-LABEL: @my_abs_sext(
|
|
100 ; CHECK-NEXT: entry:
|
|
101 ; CHECK-NEXT: [[CONV:%.*]] = sext i8 [[A:%.*]] to i32
|
|
102 ; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[CONV]], 0
|
|
103 ; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[CONV]]
|
|
104 ; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[CONV]]
|
|
105 ; CHECK-NEXT: [[CONV4:%.*]] = trunc i32 [[COND]] to i16
|
|
106 ; CHECK-NEXT: ret i16 [[CONV4]]
|
|
107 ;
|
|
108 entry:
|
|
109 %conv = sext i8 %a to i32
|
|
110 %cmp = icmp slt i32 %conv, 0
|
|
111 %sub = sub nsw i32 0, %conv
|
|
112 %cond = select i1 %cmp, i32 %sub, i32 %conv
|
|
113 %conv4 = trunc i32 %cond to i16
|
|
114 ret i16 %conv4
|
|
115 }
|
|
116
|
|
117 define dso_local i16 @my_abs_zext(i8 %a) {
|
|
118 ; CHECK-LABEL: @my_abs_zext(
|
|
119 ; CHECK-NEXT: entry:
|
|
120 ; CHECK-NEXT: [[CONV:%.*]] = zext i8 [[A:%.*]] to i32
|
|
121 ; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[CONV]], 0
|
|
122 ; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 0, [[CONV]]
|
|
123 ; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[CONV]]
|
|
124 ; CHECK-NEXT: [[CONV4:%.*]] = trunc i32 [[COND]] to i16
|
|
125 ; CHECK-NEXT: ret i16 [[CONV4]]
|
|
126 ;
|
|
127 entry:
|
|
128 %conv = zext i8 %a to i32
|
|
129 %cmp = icmp slt i32 %conv, 0
|
|
130 %sub = sub nsw i32 0, %conv
|
|
131 %cond = select i1 %cmp, i32 %sub, i32 %conv
|
|
132 %conv4 = trunc i32 %cond to i16
|
|
133 ret i16 %conv4
|
|
134 }
|
|
135
|
|
136 define dso_local i16 @select_sext(i8 %a, i1 %cond) {
|
|
137 ; CHECK-LABEL: @select_sext(
|
|
138 ; CHECK-NEXT: entry:
|
|
139 ; CHECK-NEXT: [[CONV:%.*]] = sext i8 [[A:%.*]] to i16
|
|
140 ; CHECK-NEXT: [[SUB:%.*]] = sub i16 0, [[CONV]]
|
|
141 ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[COND:%.*]], i16 [[SUB]], i16 [[CONV]]
|
|
142 ; CHECK-NEXT: ret i16 [[SEL]]
|
|
143 ;
|
|
144 entry:
|
|
145 %conv = sext i8 %a to i32
|
|
146 %sub = sub nsw i32 0, %conv
|
|
147 %sel = select i1 %cond, i32 %sub, i32 %conv
|
|
148 %conv4 = trunc i32 %sel to i16
|
|
149 ret i16 %conv4
|
|
150 }
|
|
151
|
|
152 define dso_local i16 @select_zext(i8 %a, i1 %cond) {
|
|
153 ; CHECK-LABEL: @select_zext(
|
|
154 ; CHECK-NEXT: entry:
|
|
155 ; CHECK-NEXT: [[CONV:%.*]] = zext i8 [[A:%.*]] to i16
|
|
156 ; CHECK-NEXT: [[SUB:%.*]] = sub i16 0, [[CONV]]
|
|
157 ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[COND:%.*]], i16 [[SUB]], i16 [[CONV]]
|
|
158 ; CHECK-NEXT: ret i16 [[SEL]]
|
|
159 ;
|
|
160 entry:
|
|
161 %conv = zext i8 %a to i32
|
|
162 %sub = sub nsw i32 0, %conv
|
|
163 %sel = select i1 %cond, i32 %sub, i32 %conv
|
|
164 %conv4 = trunc i32 %sel to i16
|
|
165 ret i16 %conv4
|
|
166 }
|
|
167
|
|
168 define i16 @cmp_select_signed_const_i16Const_noTransformation(i8 %a) {
|
|
169 ; CHECK-LABEL: @cmp_select_signed_const_i16Const_noTransformation(
|
|
170 ; CHECK-NEXT: [[CONV:%.*]] = sext i8 [[A:%.*]] to i32
|
|
171 ; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[CONV]], 32768
|
|
172 ; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 32768, i32 [[CONV]]
|
|
173 ; CHECK-NEXT: [[CONV4:%.*]] = trunc i32 [[COND]] to i16
|
|
174 ; CHECK-NEXT: ret i16 [[CONV4]]
|
|
175 ;
|
|
176 %conv = sext i8 %a to i32
|
|
177 %cmp = icmp slt i32 %conv, 32768
|
|
178 %cond = select i1 %cmp, i32 32768, i32 %conv
|
|
179 %conv4 = trunc i32 %cond to i16
|
|
180 ret i16 %conv4
|
|
181 }
|
|
182
|
|
183 define i16 @cmp_select_unsigned_const_i16Const(i8 %a) {
|
|
184 ; CHECK-LABEL: @cmp_select_unsigned_const_i16Const(
|
|
185 ; CHECK-NEXT: [[CONV:%.*]] = zext i8 [[A:%.*]] to i32
|
|
186 ; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[CONV]], 32768
|
|
187 ; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 32768, i32 [[CONV]]
|
|
188 ; CHECK-NEXT: [[CONV4:%.*]] = trunc i32 [[COND]] to i16
|
|
189 ; CHECK-NEXT: ret i16 [[CONV4]]
|
|
190 ;
|
|
191 %conv = zext i8 %a to i32
|
|
192 %cmp = icmp ult i32 %conv, 32768
|
|
193 %cond = select i1 %cmp, i32 32768, i32 %conv
|
|
194 %conv4 = trunc i32 %cond to i16
|
|
195 ret i16 %conv4
|
|
196 }
|
|
197
|
|
198 define i16 @cmp_select_unsigned_const_i16Const_noTransformation(i8 %a) {
|
|
199 ; CHECK-LABEL: @cmp_select_unsigned_const_i16Const_noTransformation(
|
|
200 ; CHECK-NEXT: [[CONV:%.*]] = zext i8 [[A:%.*]] to i32
|
|
201 ; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[CONV]], 65536
|
|
202 ; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 65536, i32 [[CONV]]
|
|
203 ; CHECK-NEXT: [[CONV4:%.*]] = trunc i32 [[COND]] to i16
|
|
204 ; CHECK-NEXT: ret i16 [[CONV4]]
|
|
205 ;
|
|
206 %conv = zext i8 %a to i32
|
|
207 %cmp = icmp ult i32 %conv, 65536
|
|
208 %cond = select i1 %cmp, i32 65536, i32 %conv
|
|
209 %conv4 = trunc i32 %cond to i16
|
|
210 ret i16 %conv4
|
|
211 }
|
|
212
|