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annotate llvm/docs/AMDGPU/gfx940_fx_operand.rst @ 252:1f2b6ac9f198 llvm-original

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LLVM16-1
author Shinji KONO <kono@ie.u-ryukyu.ac.jp>
date Fri, 18 Aug 2023 09:04:13 +0900
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2 **************************************************
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3 * *
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4 * Automatically generated file, do not edit! *
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5 * *
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6 **************************************************
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8 .. _amdgpu_synid_gfx940_fx_operand:
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10 FX Operand
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11 ==========
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1f2b6ac9f198 LLVM16-1
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13 This is a *f32* or *f16* operand depending on instruction modifiers:
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15 * Operand size is controlled by :ref:`m_op_sel_hi<amdgpu_synid_mad_mix_op_sel_hi>`.
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1f2b6ac9f198 LLVM16-1
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16 * Location of the 16-bit operand is controlled by :ref:`m_op_sel<amdgpu_synid_mad_mix_op_sel>`.