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252
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1 ; RUN: sed 's/CODE_OBJECT_VERSION/200/g' %s | llc -mtriple=amdgcn-amd-amdhsa -mcpu=kaveri -verify-machineinstrs | FileCheck -check-prefixes=GCN,HSA %s
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2 ; RUN: sed 's/CODE_OBJECT_VERSION/500/g' %s | llc -mtriple=amdgcn-amd-amdhsa -mcpu=kaveri -verify-machineinstrs | FileCheck -check-prefixes=GCN,COV5 %s
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3 ; RUN: sed 's/CODE_OBJECT_VERSION/400/g' %s | llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -verify-machineinstrs | FileCheck -check-prefixes=GCN,MESA %s
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150
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4
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5 ; GCN-LABEL: {{^}}kernel_implicitarg_ptr_empty:
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236
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6 ; HSA: enable_sgpr_kernarg_segment_ptr = 1
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7 ; HSA: kernarg_segment_byte_size = 56
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8 ; HSA: kernarg_segment_alignment = 4
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150
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9
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236
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10 ; MESA: enable_sgpr_kernarg_segment_ptr = 1
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150
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11 ; MESA: kernarg_segment_byte_size = 16
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236
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12 ; MESA: kernarg_segment_alignment = 4
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|
150
|
13
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14 ; HSA: s_load_dword s0, s[4:5], 0x0
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236
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15
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16 ; COV5: .amdhsa_kernarg_size 256
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150
|
17 define amdgpu_kernel void @kernel_implicitarg_ptr_empty() #0 {
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252
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18 %implicitarg.ptr = call ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()
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19 %load = load volatile i32, ptr addrspace(4) %implicitarg.ptr
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150
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20 ret void
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21 }
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22
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236
|
23 ; GCN-LABEL: {{^}}kernel_implicitarg_ptr_empty_0implicit:
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24 ; HSA: enable_sgpr_kernarg_segment_ptr = 0
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25 ; HSA: kernarg_segment_byte_size = 0
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26 ; HSA: kernarg_segment_alignment = 4
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27
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28 ; MESA: enable_sgpr_kernarg_segment_ptr = 1
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29 ; MESA: kernarg_segment_byte_size = 16
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30 ; MESA: kernarg_segment_alignment = 4
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31
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32 ; HSA: s_mov_b64 [[NULL:s\[[0-9]+:[0-9]+\]]], 0{{$}}
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33 ; HSA: s_load_dword s0, [[NULL]], 0x0
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34
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35 ; MESA: s_load_dword s0, s[4:5], 0x0
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150
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36
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236
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37 ; COV5: .amdhsa_kernarg_size 0
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38 define amdgpu_kernel void @kernel_implicitarg_ptr_empty_0implicit() #3 {
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252
|
39 %implicitarg.ptr = call ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()
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40 %load = load volatile i32, ptr addrspace(4) %implicitarg.ptr
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236
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41 ret void
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42 }
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43
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44 ; GCN-LABEL: {{^}}opencl_kernel_implicitarg_ptr_empty:
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45
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46 ; HSA: enable_sgpr_kernarg_segment_ptr = 1
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150
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47 ; HSA: kernarg_segment_byte_size = 48
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236
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48 ; HSA: kernarg_segment_alignment = 4
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49
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50 ; MESA: enable_sgpr_kernarg_segment_ptr = 1
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150
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51 ; MESA: kernarg_segment_byte_size = 16
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|
236
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52 ; MESA: kernarg_segment_alignment = 4
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|
150
|
53
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54 ; HSA: s_load_dword s0, s[4:5], 0x0
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236
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55
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56 ; COV5: .amdhsa_kernarg_size 48
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150
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57 define amdgpu_kernel void @opencl_kernel_implicitarg_ptr_empty() #1 {
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252
|
58 %implicitarg.ptr = call ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()
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59 %load = load volatile i32, ptr addrspace(4) %implicitarg.ptr
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150
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60 ret void
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61 }
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62
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63 ; GCN-LABEL: {{^}}kernel_implicitarg_ptr:
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64
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236
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65 ; HSA: enable_sgpr_kernarg_segment_ptr = 1
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66 ; HSA: kernarg_segment_byte_size = 168
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67 ; HSA: kernarg_segment_alignment = 4
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68
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69 ; MESA: enable_sgpr_kernarg_segment_ptr = 1
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|
150
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70 ; MESA: kernarg_segment_byte_size = 128
|
|
236
|
71 ; MESA: kernarg_segment_alignment = 4
|
|
150
|
72
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73 ; HSA: s_load_dword s0, s[4:5], 0x1c
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|
236
|
74
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75 ; COV5: .amdhsa_kernarg_size 368
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150
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76 define amdgpu_kernel void @kernel_implicitarg_ptr([112 x i8]) #0 {
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252
|
77 %implicitarg.ptr = call ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()
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78 %load = load volatile i32, ptr addrspace(4) %implicitarg.ptr
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|
150
|
79 ret void
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|
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80 }
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81
|
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82 ; GCN-LABEL: {{^}}opencl_kernel_implicitarg_ptr:
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83
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236
|
84 ; HSA: enable_sgpr_kernarg_segment_ptr = 1
|
|
150
|
85 ; HSA: kernarg_segment_byte_size = 160
|
|
236
|
86 ; HSA: kernarg_segment_alignment = 4
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|
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87
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|
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88 ; MESA: enable_sgpr_kernarg_segment_ptr = 1
|
|
150
|
89 ; MESA: kernarg_segment_byte_size = 128
|
|
236
|
90 ; MESA: kernarg_segment_alignment = 4
|
|
150
|
91
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92 ; HSA: s_load_dword s0, s[4:5], 0x1c
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|
236
|
93
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94 ; COV5: .amdhsa_kernarg_size 160
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|
150
|
95 define amdgpu_kernel void @opencl_kernel_implicitarg_ptr([112 x i8]) #1 {
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252
|
96 %implicitarg.ptr = call ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()
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97 %load = load volatile i32, ptr addrspace(4) %implicitarg.ptr
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|
150
|
98 ret void
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|
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99 }
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100
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101 ; GCN-LABEL: {{^}}func_implicitarg_ptr:
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102 ; GCN: s_waitcnt
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236
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103 ; GCN: s_load_dword s{{[0-9]+}}, s[8:9], 0x0
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150
|
104 ; GCN-NEXT: s_waitcnt
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105 ; GCN-NEXT: s_setpc_b64
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106 define void @func_implicitarg_ptr() #0 {
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252
|
107 %implicitarg.ptr = call ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()
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108 %load = load volatile i32, ptr addrspace(4) %implicitarg.ptr
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|
150
|
109 ret void
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|
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110 }
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111
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|
|
112 ; GCN-LABEL: {{^}}opencl_func_implicitarg_ptr:
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113 ; GCN: s_waitcnt
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|
236
|
114 ; GCN: s_load_dword s{{[0-9]+}}, s[8:9], 0x0
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|
150
|
115 ; GCN-NEXT: s_waitcnt
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116 ; GCN-NEXT: s_setpc_b64
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|
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117 define void @opencl_func_implicitarg_ptr() #0 {
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|
252
|
118 %implicitarg.ptr = call ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()
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119 %load = load volatile i32, ptr addrspace(4) %implicitarg.ptr
|
|
150
|
120 ret void
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|
|
121 }
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122
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|
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123 ; GCN-LABEL: {{^}}kernel_call_implicitarg_ptr_func_empty:
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|
236
|
124 ; HSA: enable_sgpr_kernarg_segment_ptr = 1
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125 ; HSA: kernarg_segment_byte_size = 56
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126 ; HSA: kernarg_segment_alignment = 4
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127
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|
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128 ; MESA: enable_sgpr_kernarg_segment_ptr = 1
|
|
150
|
129 ; MESA: kernarg_segment_byte_size = 16
|
|
236
|
130 ; MESA: kernarg_segment_alignment = 4
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|
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131
|
|
|
132 ; GCN: s_mov_b64 s[8:9], s[4:5]
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|
150
|
133 ; GCN: s_swappc_b64
|
|
236
|
134
|
|
|
135 ; COV5: .amdhsa_kernarg_size 256
|
|
150
|
136 define amdgpu_kernel void @kernel_call_implicitarg_ptr_func_empty() #0 {
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137 call void @func_implicitarg_ptr()
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|
|
138 ret void
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|
|
139 }
|
|
|
140
|
|
236
|
141 ; GCN-LABEL: {{^}}kernel_call_implicitarg_ptr_func_empty_implicit0:
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142 ; HSA: enable_sgpr_kernarg_segment_ptr = 0
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|
|
143 ; HSA: kernarg_segment_byte_size = 0
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|
|
144 ; HSA: kernarg_segment_alignment = 4
|
|
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145
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|
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146 ; MESA: enable_sgpr_kernarg_segment_ptr = 1
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|
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147 ; MESA: kernarg_segment_byte_size = 16
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|
|
148 ; MESA: kernarg_segment_alignment = 4
|
|
|
149
|
|
|
150 ; HSA: s_mov_b64 s[8:9], 0{{$}}
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|
|
151 ; MESA: s_mov_b64 s[8:9], s[4:5]{{$}}
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|
|
152 ; GCN: s_swappc_b64
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|
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153
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|
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154 ; COV5: .amdhsa_kernarg_size 0
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|
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155 define amdgpu_kernel void @kernel_call_implicitarg_ptr_func_empty_implicit0() #3 {
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|
|
156 call void @func_implicitarg_ptr()
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|
|
157 ret void
|
|
|
158 }
|
|
|
159
|
|
150
|
160 ; GCN-LABEL: {{^}}opencl_kernel_call_implicitarg_ptr_func_empty:
|
|
236
|
161 ; HSA: enable_sgpr_kernarg_segment_ptr = 1
|
|
150
|
162 ; HSA: kernarg_segment_byte_size = 48
|
|
236
|
163 ; HSA: kernarg_segment_alignment = 4
|
|
|
164 ; MESA: enable_sgpr_kernarg_segment_ptr = 1
|
|
150
|
165 ; MESA: kernarg_segment_byte_size = 16
|
|
236
|
166 ; GCN: s_mov_b64 s[8:9], s[4:5]
|
|
150
|
167 ; GCN-NOT: s4
|
|
|
168 ; GCN-NOT: s5
|
|
|
169 ; GCN: s_swappc_b64
|
|
236
|
170
|
|
|
171 ; COV5: .amdhsa_kernarg_size 48
|
|
150
|
172 define amdgpu_kernel void @opencl_kernel_call_implicitarg_ptr_func_empty() #1 {
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|
|
173 call void @func_implicitarg_ptr()
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|
|
174 ret void
|
|
|
175 }
|
|
|
176
|
|
|
177 ; GCN-LABEL: {{^}}kernel_call_implicitarg_ptr_func:
|
|
236
|
178 ; HSA: enable_sgpr_kernarg_segment_ptr = 1
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|
|
179 ; HSA: kernarg_segment_byte_size = 168
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|
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180 ; HSA: kernarg_segment_alignment = 4
|
|
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181
|
|
|
182 ; MESA: enable_sgpr_kernarg_segment_ptr = 1
|
|
150
|
183 ; MESA: kernarg_segment_byte_size = 128
|
|
236
|
184 ; MESA: kernarg_segment_alignment = 4
|
|
150
|
185
|
|
236
|
186 ; HSA: s_add_u32 s8, s4, 0x70
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|
|
187 ; MESA: s_add_u32 s8, s4, 0x70
|
|
150
|
188
|
|
236
|
189 ; GCN: s_addc_u32 s9, s5, 0{{$}}
|
|
150
|
190 ; GCN: s_swappc_b64
|
|
236
|
191
|
|
|
192 ; COV5: .amdhsa_kernarg_size 368
|
|
150
|
193 define amdgpu_kernel void @kernel_call_implicitarg_ptr_func([112 x i8]) #0 {
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|
|
194 call void @func_implicitarg_ptr()
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|
|
195 ret void
|
|
|
196 }
|
|
|
197
|
|
|
198 ; GCN-LABEL: {{^}}opencl_kernel_call_implicitarg_ptr_func:
|
|
236
|
199 ; HSA: enable_sgpr_kernarg_segment_ptr = 1
|
|
150
|
200 ; HSA: kernarg_segment_byte_size = 160
|
|
236
|
201 ; HSA: kernarg_segment_alignment = 4
|
|
|
202 ; MESA: enable_sgpr_kernarg_segment_ptr = 1
|
|
150
|
203 ; MESA: kernarg_segment_byte_size = 128
|
|
236
|
204 ; MESA: kernarg_segment_alignment = 4
|
|
150
|
205
|
|
236
|
206 ; GCN: s_add_u32 s8, s4, 0x70
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|
|
207 ; GCN: s_addc_u32 s9, s5, 0{{$}}
|
|
150
|
208 ; GCN: s_swappc_b64
|
|
236
|
209
|
|
|
210 ; COV5: .amdhsa_kernarg_size 160
|
|
150
|
211 define amdgpu_kernel void @opencl_kernel_call_implicitarg_ptr_func([112 x i8]) #1 {
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|
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212 call void @func_implicitarg_ptr()
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|
|
213 ret void
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|
|
214 }
|
|
|
215
|
|
|
216 ; GCN-LABEL: {{^}}func_call_implicitarg_ptr_func:
|
|
236
|
217 ; GCN-NOT: s8
|
|
|
218 ; GCN-NOT: s9
|
|
|
219 ; GCN-NOT: s[8:9]
|
|
|
220 ; GCN: s_swappc_b64
|
|
|
221 ; GCN: s_setpc_b64 s[30:31]
|
|
150
|
222 define void @func_call_implicitarg_ptr_func() #0 {
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|
|
223 call void @func_implicitarg_ptr()
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|
|
224 ret void
|
|
|
225 }
|
|
|
226
|
|
|
227 ; GCN-LABEL: {{^}}opencl_func_call_implicitarg_ptr_func:
|
|
236
|
228 ; GCN-NOT: s8
|
|
|
229 ; GCN-NOT: s9
|
|
|
230 ; GCN-NOT: s[8:9]
|
|
|
231 ; GCN: s_swappc_b64
|
|
|
232 ; GCN: s_setpc_b64 s[30:31]
|
|
150
|
233 define void @opencl_func_call_implicitarg_ptr_func() #0 {
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|
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234 call void @func_implicitarg_ptr()
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|
|
235 ret void
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|
|
236 }
|
|
|
237
|
|
|
238 ; GCN-LABEL: {{^}}func_kernarg_implicitarg_ptr:
|
|
|
239 ; GCN: s_waitcnt
|
|
173
|
240 ; GCN-DAG: s_mov_b64 [[NULL:s\[[0-9]+:[0-9]+\]]], 0
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|
|
241 ; GCN-DAG: s_load_dword s{{[0-9]+}}, [[NULL]], 0x0
|
|
236
|
242 ; GCN: s_load_dword s{{[0-9]+}}, s[8:9], 0x0
|
|
173
|
243 ; GCN: s_waitcnt lgkmcnt(0)
|
|
150
|
244 define void @func_kernarg_implicitarg_ptr() #0 {
|
|
252
|
245 %kernarg.segment.ptr = call ptr addrspace(4) @llvm.amdgcn.kernarg.segment.ptr()
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|
|
246 %implicitarg.ptr = call ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()
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|
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247 %load0 = load volatile i32, ptr addrspace(4) %kernarg.segment.ptr
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|
|
248 %load1 = load volatile i32, ptr addrspace(4) %implicitarg.ptr
|
|
150
|
249 ret void
|
|
|
250 }
|
|
|
251
|
|
|
252 ; GCN-LABEL: {{^}}opencl_func_kernarg_implicitarg_ptr:
|
|
|
253 ; GCN: s_waitcnt
|
|
173
|
254 ; GCN-DAG: s_mov_b64 [[NULL:s\[[0-9]+:[0-9]+\]]], 0
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|
|
255 ; GCN-DAG: s_load_dword s{{[0-9]+}}, [[NULL]], 0x0
|
|
236
|
256 ; GCN: s_load_dword s{{[0-9]+}}, s[8:9], 0x0
|
|
173
|
257 ; GCN: s_waitcnt lgkmcnt(0)
|
|
150
|
258 define void @opencl_func_kernarg_implicitarg_ptr() #0 {
|
|
252
|
259 %kernarg.segment.ptr = call ptr addrspace(4) @llvm.amdgcn.kernarg.segment.ptr()
|
|
|
260 %implicitarg.ptr = call ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()
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|
|
261 %load0 = load volatile i32, ptr addrspace(4) %kernarg.segment.ptr
|
|
|
262 %load1 = load volatile i32, ptr addrspace(4) %implicitarg.ptr
|
|
150
|
263 ret void
|
|
|
264 }
|
|
|
265
|
|
|
266 ; GCN-LABEL: {{^}}kernel_call_kernarg_implicitarg_ptr_func:
|
|
236
|
267 ; GCN: s_add_u32 s8, s4, 0x70
|
|
|
268 ; GCN: s_addc_u32 s9, s5, 0
|
|
150
|
269 ; GCN: s_swappc_b64
|
|
|
270 define amdgpu_kernel void @kernel_call_kernarg_implicitarg_ptr_func([112 x i8]) #0 {
|
|
|
271 call void @func_kernarg_implicitarg_ptr()
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|
|
272 ret void
|
|
|
273 }
|
|
|
274
|
|
|
275 ; GCN-LABEL: {{^}}kernel_implicitarg_no_struct_align_padding:
|
|
|
276 ; HSA: kernarg_segment_byte_size = 120
|
|
236
|
277 ; HSA: kernarg_segment_alignment = 6
|
|
150
|
278 ; MESA: kernarg_segment_byte_size = 84
|
|
236
|
279 ; MESA: kernarg_segment_alignment = 6
|
|
|
280
|
|
|
281 ; COV5: .amdhsa_kernarg_size 120
|
|
150
|
282 define amdgpu_kernel void @kernel_implicitarg_no_struct_align_padding(<16 x i32>, i32) #1 {
|
|
252
|
283 %implicitarg.ptr = call ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()
|
|
|
284 %load = load volatile i32, ptr addrspace(4) %implicitarg.ptr
|
|
150
|
285 ret void
|
|
|
286 }
|
|
|
287
|
|
236
|
288 ; HSA-LABEL: Kernels:
|
|
|
289 ; HSA-LABEL: - Name: kernel_implicitarg_ptr_empty
|
|
|
290 ; HSA: CodeProps:
|
|
|
291 ; HSA: KernargSegmentSize: 56
|
|
|
292 ; HSA: KernargSegmentAlign: 8
|
|
|
293
|
|
|
294 ; HSA-LABEL: - Name: kernel_implicitarg_ptr_empty_0implicit
|
|
|
295 ; HSA: KernargSegmentSize: 0
|
|
|
296 ; HSA: KernargSegmentAlign: 4
|
|
|
297
|
|
|
298 ; HSA-LABEL: - Name: opencl_kernel_implicitarg_ptr_empty
|
|
|
299 ; HSA: KernargSegmentSize: 48
|
|
|
300 ; HSA: KernargSegmentAlign: 8
|
|
|
301
|
|
|
302 ; HSA-LABEL: - Name: kernel_implicitarg_ptr
|
|
|
303 ; HSA: KernargSegmentSize: 168
|
|
|
304 ; HSA: KernargSegmentAlign: 8
|
|
|
305
|
|
|
306 ; HSA-LABEL: - Name: opencl_kernel_implicitarg_ptr
|
|
|
307 ; HSA: KernargSegmentSize: 160
|
|
|
308 ; HSA: KernargSegmentAlign: 8
|
|
|
309
|
|
|
310 ; HSA-LABEL: - Name: kernel_call_implicitarg_ptr_func_empty
|
|
|
311 ; HSA: KernargSegmentSize: 56
|
|
|
312 ; HSA: KernargSegmentAlign: 8
|
|
|
313
|
|
|
314 ; HSA-LABEL: - Name: kernel_call_implicitarg_ptr_func_empty_implicit0
|
|
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315 ; HSA: KernargSegmentSize: 0
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316 ; HSA: KernargSegmentAlign: 4
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317
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318 ; HSA-LABEL: - Name: opencl_kernel_call_implicitarg_ptr_func_empty
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319 ; HSA: KernargSegmentSize: 48
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320 ; HSA: KernargSegmentAlign: 8
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321
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322 ; HSA-LABEL: - Name: kernel_call_implicitarg_ptr_func
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323 ; HSA: KernargSegmentSize: 168
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324 ; HSA: KernargSegmentAlign: 8
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325
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326 ; HSA-LABEL: - Name: opencl_kernel_call_implicitarg_ptr_func
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327 ; HSA: KernargSegmentSize: 160
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328 ; HSA: KernargSegmentAlign: 8
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329
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330 ; HSA-LABEL: - Name: kernel_call_kernarg_implicitarg_ptr_func
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331 ; HSA: KernargSegmentSize: 168
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332 ; HSA: KernargSegmentAlign: 8
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333
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334 ; HSA-LABEL: - Name: kernel_implicitarg_no_struct_align_padding
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335 ; HSA: KernargSegmentSize: 120
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336 ; HSA: KernargSegmentAlign: 64
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337
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338 ; COV5-LABEL: amdhsa.kernels:
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339 ; COV5: .kernarg_segment_align: 8
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340 ; COV5-NEXT: .kernarg_segment_size: 256
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341 ; COV5-LABEL: .name: kernel_implicitarg_ptr_empty
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342
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343 ; COV5: .kernarg_segment_align: 4
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344 ; COV5-NEXT: .kernarg_segment_size: 0
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345 ; COV5-LABEL: .name: kernel_implicitarg_ptr_empty_0implicit
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346
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347 ; COV5: .kernarg_segment_align: 8
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348 ; COV5-NEXT: .kernarg_segment_size: 48
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349 ; COV5-LABEL: .name: opencl_kernel_implicitarg_ptr_empty
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350
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351 ; COV5: .kernarg_segment_align: 8
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352 ; COV5-NEXT: .kernarg_segment_size: 368
|
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353 ; COV5-LABEL: .name: kernel_implicitarg_ptr
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354
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355 ; COV5: .kernarg_segment_align: 8
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356 ; COV5-NEXT: .kernarg_segment_size: 160
|
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357 ; COV5-LABEL: .name: opencl_kernel_implicitarg_ptr
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358
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359 ; COV5: .kernarg_segment_align: 8
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360 ; COV5-NEXT: .kernarg_segment_size: 256
|
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|
361 ; COV5-LABEL: .name: kernel_call_implicitarg_ptr_func_empty
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362
|
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363 ; COV5: .kernarg_segment_align: 4
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364 ; COV5-NEXT: .kernarg_segment_size: 0
|
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|
365 ; COV5-LABEL: .name: kernel_call_implicitarg_ptr_func_empty_implicit0
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366
|
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367 ; COV5: .kernarg_segment_align: 8
|
|
|
368 ; COV5-NEXT: .kernarg_segment_size: 48
|
|
|
369 ; COV5-LABEL: .name: opencl_kernel_call_implicitarg_ptr_func_empty
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370
|
|
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371 ; COV5: .kernarg_segment_align: 8
|
|
|
372 ; COV5-NEXT: .kernarg_segment_size: 368
|
|
|
373 ; COV5-LABEL: .name: kernel_call_implicitarg_ptr_func
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|
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374
|
|
|
375 ; COV5: .kernarg_segment_align: 8
|
|
|
376 ; COV5-NEXT: .kernarg_segment_size: 160
|
|
|
377 ; COV5-LABEL: .name: opencl_kernel_call_implicitarg_ptr_func
|
|
|
378
|
|
|
379 ; COV5: .kernarg_segment_align: 8
|
|
|
380 ; COV5-NEXT: .kernarg_segment_size: 368
|
|
|
381 ; COV5-LABEL: .name: kernel_call_kernarg_implicitarg_ptr_func
|
|
|
382
|
|
|
383 ; COV5: .kernarg_segment_align: 64
|
|
|
384 ; COV5-NEXT: .kernarg_segment_size: 120
|
|
|
385 ; COV5-LABEL: .name: kernel_implicitarg_no_struct_align_padding
|
|
|
386
|
|
252
|
387 declare ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr() #2
|
|
|
388 declare ptr addrspace(4) @llvm.amdgcn.kernarg.segment.ptr() #2
|
|
150
|
389
|
|
|
390 attributes #0 = { nounwind noinline }
|
|
|
391 attributes #1 = { nounwind noinline "amdgpu-implicitarg-num-bytes"="48" }
|
|
|
392 attributes #2 = { nounwind readnone speculatable }
|
|
236
|
393 attributes #3 = { nounwind noinline "amdgpu-implicitarg-num-bytes"="0" }
|
|
252
|
394
|
|
|
395 !llvm.module.flags = !{!0}
|
|
|
396 !0 = !{i32 1, !"amdgpu_code_object_version", i32 CODE_OBJECT_VERSION}
|
