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annotate llvm/test/CodeGen/AMDGPU/merge-out-of-order-ldst.ll @ 252:1f2b6ac9f198 llvm-original

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LLVM16-1
author Shinji KONO <kono@ie.u-ryukyu.ac.jp>
date Fri, 18 Aug 2023 09:04:13 +0900
parents 0572611fdcc8
children
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1 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
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2
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3 @L = external local_unnamed_addr addrspace(3) global [9 x double], align 16
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4 @Ldisp = external local_unnamed_addr addrspace(3) global [96 x double], align 16
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5
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6 ; Stores are reordered during loads merge. This case used to assert while
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7 ; scanning for a paired instruction because it used to expect paired one
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8 ; to follow a base one.
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9
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10 ; GCN-LABEL: {{^}}out_of_order_merge:
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11 ; GCN-COUNT2: ds_read2_b64
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12 ; GCN-COUNT3: ds_write_b64
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13 define amdgpu_kernel void @out_of_order_merge() {
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14 entry:
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15 %gep2 = getelementptr inbounds [96 x double], ptr addrspace(3) @Ldisp, i32 0, i32 1
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16 %tmp12 = load <2 x double>, ptr addrspace(3) getelementptr inbounds ([9 x double], ptr addrspace(3) @L, i32 0, i32 1), align 8
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17 %tmp14 = extractelement <2 x double> %tmp12, i32 0
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18 %tmp15 = extractelement <2 x double> %tmp12, i32 1
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19 %add50.i = fadd double %tmp14, %tmp15
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20 store double %add50.i, ptr addrspace(3) @Ldisp, align 8
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21 %tmp16 = load double, ptr addrspace(3) getelementptr inbounds ([9 x double], ptr addrspace(3) @L, i32 1, i32 0), align 8
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22 store double %tmp16, ptr addrspace(3) %gep2, align 8
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23 %tmp17 = load <2 x double>, ptr addrspace(3) getelementptr inbounds ([9 x double], ptr addrspace(3) @L, i32 2, i32 1), align 8
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24 %tmp19 = extractelement <2 x double> %tmp17, i32 1
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25 store double %tmp19, ptr addrspace(3) undef, align 8
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26 ret void
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27 }