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annotate polly/test/ScheduleOptimizer/mat_mul_pattern_data_layout.ll @ 252:1f2b6ac9f198 llvm-original

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LLVM16-1
author Shinji KONO <kono@ie.u-ryukyu.ac.jp>
date Fri, 18 Aug 2023 09:04:13 +0900
parents 5f17cb93ff66
children
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1 ; RUN: opt %loadPolly -polly-opt-isl -polly-pattern-matching-based-opts=true \
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2 ; RUN: -polly-target-throughput-vector-fma=1 \
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3 ; RUN: -polly-target-latency-vector-fma=8 \
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4 ; RUN: -polly-target-1st-cache-level-associativity=8 \
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5 ; RUN: -polly-target-2nd-cache-level-associativity=8 \
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6 ; RUN: -polly-target-1st-cache-level-size=32768 \
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7 ; RUN: -polly-target-2nd-cache-level-size=262144 \
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8 ; RUN: -polly-optimized-scops \
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9 ; RUN: -polly-target-vector-register-bitwidth=256 \
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5f17cb93ff66 LLVM13 (2021/7/18)
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
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10 ; RUN: -disable-output < %s
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11 ;
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12 ; /* C := alpha*A*B + beta*C */
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13 ; for (i = 0; i < _PB_NI; i++)
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14 ; for (j = 0; j < _PB_NJ; j++)
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15 ; {
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16 ; C[i][j] *= beta;
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17 ; for (k = 0; k < _PB_NK; ++k)
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18 ; C[i][j] += alpha * A[i][k] * B[k][j];
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19 ; }
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20 ;
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21 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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22 target triple = "x86_64-unknown-unknown"
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23
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1f2b6ac9f198 LLVM16-1
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
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24 define internal void @kernel_gemm(i32 %arg, i32 %arg1, i32 %arg2, double %arg3, double %arg4, ptr %arg5, ptr %arg6, ptr %arg7) #0 {
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25 bb:
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26 br label %bb8
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27
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28 bb8: ; preds = %bb29, %bb
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29 %tmp = phi i64 [ 0, %bb ], [ %tmp30, %bb29 ]
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30 br label %bb9
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31
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32 bb9: ; preds = %bb26, %bb8
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33 %tmp10 = phi i64 [ 0, %bb8 ], [ %tmp27, %bb26 ]
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1f2b6ac9f198 LLVM16-1
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34 %tmp11 = getelementptr inbounds [1056 x double], ptr %arg5, i64 %tmp, i64 %tmp10
1f2b6ac9f198 LLVM16-1
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
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35 %tmp12 = load double, ptr %tmp11, align 8
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36 %tmp13 = fmul double %tmp12, %arg4
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37 store double %tmp13, ptr %tmp11, align 8
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38 br label %Copy_0
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39
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40 Copy_0: ; preds = %Copy_0, %bb9
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41 %tmp15 = phi i64 [ 0, %bb9 ], [ %tmp24, %Copy_0 ]
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1f2b6ac9f198 LLVM16-1
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42 %tmp16 = getelementptr inbounds [1024 x double], ptr %arg6, i64 %tmp, i64 %tmp15
1f2b6ac9f198 LLVM16-1
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43 %tmp17 = load double, ptr %tmp16, align 8
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44 %tmp18 = fmul double %tmp17, %arg3
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1f2b6ac9f198 LLVM16-1
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45 %tmp19 = getelementptr inbounds [1056 x double], ptr %arg7, i64 %tmp15, i64 %tmp10
1f2b6ac9f198 LLVM16-1
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46 %tmp20 = load double, ptr %tmp19, align 8
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47 %tmp21 = fmul double %tmp18, %tmp20
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1f2b6ac9f198 LLVM16-1
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48 %tmp22 = load double, ptr %tmp11, align 8
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49 %tmp23 = fadd double %tmp22, %tmp21
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50 store double %tmp23, ptr %tmp11, align 8
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51 %tmp24 = add nuw nsw i64 %tmp15, 1
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52 %tmp25 = icmp ne i64 %tmp24, 1024
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53 br i1 %tmp25, label %Copy_0, label %bb26
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54
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55 bb26: ; preds = %Copy_0
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56 %tmp27 = add nuw nsw i64 %tmp10, 1
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57 %tmp28 = icmp ne i64 %tmp27, 1056
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58 br i1 %tmp28, label %bb9, label %bb29
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59
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60 bb29: ; preds = %bb26
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61 %tmp30 = add nuw nsw i64 %tmp, 1
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62 %tmp31 = icmp ne i64 %tmp30, 1056
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63 br i1 %tmp31, label %bb8, label %bb32
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64
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65 bb32: ; preds = %bb29
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66 ret void
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67 }
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68
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69 attributes #0 = { nounwind uwtable "target-cpu"="x86-64" "target-features"="+aes,+avx,+cmov,+cx16,+fxsr,+mmx,+pclmul,+popcnt,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave,+xsaveopt" }