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236
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1 ; RUN: opt %loadPolly -polly-print-scops -disable-output < %s | FileCheck %s
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150
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2 ;
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3 ; void consequences(int *A, int bool_cond, int lhs, int rhs) {
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4 ;
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5 ; BC: *A = 0;
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6 ; if (bool_cond)
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7 ; S_BC: *A = 0;
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8 ; M_BC: *A = 0;
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9 ;
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10 ; NEG_BC: *A = 0;
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11 ; if (!bool_cond)
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12 ; S_NEG_BC: *A = 0;
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13 ; M_NEG_BC: *A = 0;
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14 ;
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15 ; SLT: *A = 0;
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16 ; if (lhs < rhs)
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17 ; S_SLT: *A = 0;
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18 ; M_SLT: *A = 0;
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19 ;
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20 ; SLE: *A = 0;
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21 ; if (lhs <= rhs)
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22 ; S_SLE: *A = 0;
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23 ; M_SLE: *A = 0;
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24 ;
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25 ; SGT: *A = 0;
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26 ; if (lhs > rhs)
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27 ; S_SGT: *A = 0;
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28 ; M_SGT: *A = 0;
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29 ;
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30 ; SGE: *A = 0;
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31 ; if (lhs >= rhs)
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32 ; S_SGE: *A = 0;
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33 ; M_SGE: *A = 0;
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34 ;
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35 ; EQ: *A = 0;
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36 ; if (lhs == rhs)
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37 ; S_EQ: *A = 0;
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38 ; M_EQ: *A = 0;
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39 ;
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40 ; NEQ: *A = 0;
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41 ; if (lhs != rhs)
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42 ; S_NEQ: *A = 0;
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43 ; M_NEQ: *A = 0;
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44 ;
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45 ; }
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46 ; CHECK: Statements {
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47 ; CHECK-NEXT: Stmt_BC
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48 ; CHECK-NEXT: Domain :=
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49 ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_BC[] };
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50 ; CHECK-NEXT: Schedule :=
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51 ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_BC[] -> [0] };
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52 ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
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53 ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_BC[] -> MemRef_A[0] };
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54 ; CHECK-NEXT: Stmt_S_BC
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55 ; CHECK-NEXT: Domain :=
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56 ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_BC[] : bool_cond < 0 or bool_cond > 0 };
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57 ; CHECK-NEXT: Schedule :=
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58 ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_BC[] -> [1] : bool_cond < 0 or bool_cond > 0 };
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59 ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
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60 ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_BC[] -> MemRef_A[0] };
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61 ; CHECK-NEXT: Stmt_M_BC
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62 ; CHECK-NEXT: Domain :=
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63 ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_BC[] };
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64 ; CHECK-NEXT: Schedule :=
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65 ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_BC[] -> [2] };
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66 ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
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67 ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_BC[] -> MemRef_A[0] };
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68 ; CHECK-NEXT: Stmt_NEG_BC
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69 ; CHECK-NEXT: Domain :=
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70 ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_NEG_BC[] };
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71 ; CHECK-NEXT: Schedule :=
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72 ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_NEG_BC[] -> [3] };
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73 ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
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74 ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_NEG_BC[] -> MemRef_A[0] };
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75 ; CHECK-NEXT: Stmt_S_NEG_BC
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76 ; CHECK-NEXT: Domain :=
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77 ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_NEG_BC[] : bool_cond = 0 };
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78 ; CHECK-NEXT: Schedule :=
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79 ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_NEG_BC[] -> [4] };
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80 ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
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81 ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_NEG_BC[] -> MemRef_A[0] };
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82 ; CHECK-NEXT: Stmt_M_NEG_BC
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83 ; CHECK-NEXT: Domain :=
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84 ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_NEG_BC[] };
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85 ; CHECK-NEXT: Schedule :=
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86 ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_NEG_BC[] -> [5] };
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87 ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
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88 ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_NEG_BC[] -> MemRef_A[0] };
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89 ; CHECK-NEXT: Stmt_SLT
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90 ; CHECK-NEXT: Domain :=
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91 ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_SLT[] };
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92 ; CHECK-NEXT: Schedule :=
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93 ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_SLT[] -> [6] };
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94 ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
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95 ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_SLT[] -> MemRef_A[0] };
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96 ; CHECK-NEXT: Stmt_S_SLT
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97 ; CHECK-NEXT: Domain :=
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98 ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_SLT[] : rhs > lhs };
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99 ; CHECK-NEXT: Schedule :=
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100 ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_SLT[] -> [7] };
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101 ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
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102 ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_SLT[] -> MemRef_A[0] };
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103 ; CHECK-NEXT: Stmt_M_SLT
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104 ; CHECK-NEXT: Domain :=
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105 ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_SLT[] };
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106 ; CHECK-NEXT: Schedule :=
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107 ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_SLT[] -> [8] };
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108 ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
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109 ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_SLT[] -> MemRef_A[0] };
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110 ; CHECK-NEXT: Stmt_SLE
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111 ; CHECK-NEXT: Domain :=
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112 ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_SLE[] };
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113 ; CHECK-NEXT: Schedule :=
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114 ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_SLE[] -> [9] };
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115 ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
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116 ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_SLE[] -> MemRef_A[0] };
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117 ; CHECK-NEXT: Stmt_S_SLE
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118 ; CHECK-NEXT: Domain :=
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119 ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_SLE[] : rhs >= lhs };
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120 ; CHECK-NEXT: Schedule :=
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121 ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_SLE[] -> [10] };
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122 ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
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123 ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_SLE[] -> MemRef_A[0] };
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124 ; CHECK-NEXT: Stmt_M_SLE
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125 ; CHECK-NEXT: Domain :=
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126 ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_SLE[] };
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127 ; CHECK-NEXT: Schedule :=
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128 ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_SLE[] -> [11] };
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129 ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
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130 ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_SLE[] -> MemRef_A[0] };
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131 ; CHECK-NEXT: Stmt_SGT
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132 ; CHECK-NEXT: Domain :=
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133 ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_SGT[] };
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134 ; CHECK-NEXT: Schedule :=
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135 ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_SGT[] -> [12] };
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136 ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
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137 ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_SGT[] -> MemRef_A[0] };
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138 ; CHECK-NEXT: Stmt_S_SGT
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139 ; CHECK-NEXT: Domain :=
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140 ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_SGT[] : rhs < lhs };
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141 ; CHECK-NEXT: Schedule :=
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142 ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_SGT[] -> [13] };
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143 ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
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144 ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_SGT[] -> MemRef_A[0] };
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145 ; CHECK-NEXT: Stmt_M_SGT
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146 ; CHECK-NEXT: Domain :=
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147 ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_SGT[] };
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148 ; CHECK-NEXT: Schedule :=
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149 ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_SGT[] -> [14] };
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150 ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
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151 ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_SGT[] -> MemRef_A[0] };
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152 ; CHECK-NEXT: Stmt_SGE
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153 ; CHECK-NEXT: Domain :=
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154 ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_SGE[] };
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155 ; CHECK-NEXT: Schedule :=
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156 ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_SGE[] -> [15] };
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157 ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
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158 ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_SGE[] -> MemRef_A[0] };
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159 ; CHECK-NEXT: Stmt_S_SGE
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160 ; CHECK-NEXT: Domain :=
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161 ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_SGE[] : rhs <= lhs };
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162 ; CHECK-NEXT: Schedule :=
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163 ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_SGE[] -> [16] };
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164 ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
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165 ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_SGE[] -> MemRef_A[0] };
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166 ; CHECK-NEXT: Stmt_M_SGE
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167 ; CHECK-NEXT: Domain :=
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168 ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_SGE[] };
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169 ; CHECK-NEXT: Schedule :=
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170 ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_SGE[] -> [17] };
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171 ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
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172 ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_SGE[] -> MemRef_A[0] };
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173 ; CHECK-NEXT: Stmt_EQ
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174 ; CHECK-NEXT: Domain :=
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175 ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_EQ[] };
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176 ; CHECK-NEXT: Schedule :=
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177 ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_EQ[] -> [18] };
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178 ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
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179 ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_EQ[] -> MemRef_A[0] };
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180 ; CHECK-NEXT: Stmt_S_EQ
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181 ; CHECK-NEXT: Domain :=
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182 ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_EQ[] : rhs = lhs };
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183 ; CHECK-NEXT: Schedule :=
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184 ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_EQ[] -> [19] };
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185 ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
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186 ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_EQ[] -> MemRef_A[0] };
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187 ; CHECK-NEXT: Stmt_M_EQ
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188 ; CHECK-NEXT: Domain :=
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189 ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_EQ[] };
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190 ; CHECK-NEXT: Schedule :=
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191 ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_EQ[] -> [20] };
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192 ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
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193 ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_EQ[] -> MemRef_A[0] };
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194 ; CHECK-NEXT: Stmt_NEQ
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195 ; CHECK-NEXT: Domain :=
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196 ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_NEQ[] };
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197 ; CHECK-NEXT: Schedule :=
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198 ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_NEQ[] -> [21] };
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199 ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
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200 ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_NEQ[] -> MemRef_A[0] };
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201 ; CHECK-NEXT: Stmt_S_NEQ
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202 ; CHECK-NEXT: Domain :=
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203 ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_NEQ[] : rhs > lhs or rhs < lhs };
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204 ; CHECK-NEXT: Schedule :=
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205 ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_NEQ[] -> [22] : rhs > lhs or rhs < lhs };
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206 ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
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207 ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_S_NEQ[] -> MemRef_A[0] };
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208 ; CHECK-NEXT: Stmt_M_NEQ
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209 ; CHECK-NEXT: Domain :=
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210 ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_NEQ[] };
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211 ; CHECK-NEXT: Schedule :=
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212 ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_NEQ[] -> [23] };
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213 ; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
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214 ; CHECK-NEXT: [bool_cond, lhs, rhs] -> { Stmt_M_NEQ[] -> MemRef_A[0] };
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215 ; CHECK-NEXT: }
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216 ;
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217 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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218
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252
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219 define void @consequences(ptr %A, i32 %bool_cond, i32 %lhs, i32 %rhs) {
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150
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220 entry:
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221 br label %BC
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222
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223 BC: ; preds = %entry
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252
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224 store i32 0, ptr %A, align 4
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150
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225 %tobool = icmp eq i32 %bool_cond, 0
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226 br i1 %tobool, label %M_BC, label %S_BC
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227
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228 S_BC: ; preds = %if.then
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252
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229 store i32 0, ptr %A, align 4
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150
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230 br label %M_BC
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231
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232 M_BC: ; preds = %BC, %S_BC
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252
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233 store i32 0, ptr %A, align 4
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150
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234 br label %NEG_BC
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235
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236 NEG_BC: ; preds = %if.end
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252
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237 store i32 0, ptr %A, align 4
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150
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238 %tobool1 = icmp eq i32 %bool_cond, 0
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239 br i1 %tobool1, label %S_NEG_BC, label %M_NEG_BC
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240
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241 S_NEG_BC: ; preds = %if.then.2
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252
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242 store i32 0, ptr %A, align 4
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150
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243 br label %M_NEG_BC
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244
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245 M_NEG_BC: ; preds = %NEG_BC, %S_NEG_BC
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252
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246 store i32 0, ptr %A, align 4
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150
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247 br label %SLT
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248
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249 SLT: ; preds = %if.end.3
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252
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250 store i32 0, ptr %A, align 4
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150
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251 %cmp = icmp slt i32 %lhs, %rhs
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252 br i1 %cmp, label %S_SLT, label %M_SLT
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253
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254 S_SLT: ; preds = %if.then.4
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252
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255 store i32 0, ptr %A, align 4
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150
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256 br label %M_SLT
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257
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258 M_SLT: ; preds = %S_SLT, %SLT
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252
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259 store i32 0, ptr %A, align 4
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150
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260 br label %SLE
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261
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262 SLE: ; preds = %if.end.5
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252
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263 store i32 0, ptr %A, align 4
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150
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264 %cmp6 = icmp sgt i32 %lhs, %rhs
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265 br i1 %cmp6, label %M_SLE, label %S_SLE
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266
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267 S_SLE: ; preds = %if.then.7
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252
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268 store i32 0, ptr %A, align 4
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150
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269 br label %M_SLE
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270
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271 M_SLE: ; preds = %SLE, %S_SLE
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252
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272 store i32 0, ptr %A, align 4
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150
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273 br label %SGT
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274
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275 SGT: ; preds = %if.end.8
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252
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276 store i32 0, ptr %A, align 4
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150
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277 %cmp9 = icmp sgt i32 %lhs, %rhs
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278 br i1 %cmp9, label %S_SGT, label %M_SGT
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279
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280 S_SGT: ; preds = %if.then.10
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252
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281 store i32 0, ptr %A, align 4
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150
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282 br label %M_SGT
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283
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284 M_SGT: ; preds = %S_SGT, %SGT
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252
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285 store i32 0, ptr %A, align 4
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150
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286 br label %SGE
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287
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288 SGE: ; preds = %if.end.11
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252
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289 store i32 0, ptr %A, align 4
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150
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290 %cmp12 = icmp slt i32 %lhs, %rhs
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291 br i1 %cmp12, label %M_SGE, label %S_SGE
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292
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293 S_SGE: ; preds = %if.then.13
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252
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294 store i32 0, ptr %A, align 4
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150
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295 br label %M_SGE
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296
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297 M_SGE: ; preds = %SGE, %S_SGE
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252
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298 store i32 0, ptr %A, align 4
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150
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299 br label %EQ
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300
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301 EQ: ; preds = %if.end.14
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252
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302 store i32 0, ptr %A, align 4
|
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150
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303 %cmp15 = icmp eq i32 %lhs, %rhs
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|
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304 br i1 %cmp15, label %S_EQ, label %M_EQ
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305
|
|
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306 S_EQ: ; preds = %if.then.16
|
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252
|
307 store i32 0, ptr %A, align 4
|
|
150
|
308 br label %M_EQ
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|
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309
|
|
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310 M_EQ: ; preds = %S_EQ, %EQ
|
|
252
|
311 store i32 0, ptr %A, align 4
|
|
150
|
312 br label %NEQ
|
|
|
313
|
|
|
314 NEQ: ; preds = %if.end.17
|
|
252
|
315 store i32 0, ptr %A, align 4
|
|
150
|
316 %cmp18 = icmp eq i32 %lhs, %rhs
|
|
|
317 br i1 %cmp18, label %M_NEQ, label %S_NEQ
|
|
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318
|
|
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319 S_NEQ: ; preds = %if.then.19
|
|
252
|
320 store i32 0, ptr %A, align 4
|
|
150
|
321 br label %M_NEQ
|
|
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322
|
|
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323 M_NEQ: ; preds = %NEQ, %S_NEQ
|
|
252
|
324 store i32 0, ptr %A, align 4
|
|
150
|
325 br label %exit
|
|
|
326
|
|
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327 exit:
|
|
|
328 ret void
|
|
|
329 }
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