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1 //===--- NVPTX.h - Declare NVPTX target feature support ---------*- C++ -*-===//
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2 //
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3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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4 // See https://llvm.org/LICENSE.txt for license information.
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5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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6 //
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7 //===----------------------------------------------------------------------===//
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8 //
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9 // This file declares NVPTX TargetInfo objects.
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10 //
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11 //===----------------------------------------------------------------------===//
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12
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13 #ifndef LLVM_CLANG_LIB_BASIC_TARGETS_NVPTX_H
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14 #define LLVM_CLANG_LIB_BASIC_TARGETS_NVPTX_H
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15
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16 #include "clang/Basic/Cuda.h"
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17 #include "clang/Basic/TargetInfo.h"
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18 #include "clang/Basic/TargetOptions.h"
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19 #include "llvm/ADT/Triple.h"
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20 #include "llvm/Support/Compiler.h"
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21
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22 namespace clang {
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23 namespace targets {
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24
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25 static const unsigned NVPTXAddrSpaceMap[] = {
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26 0, // Default
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27 1, // opencl_global
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28 3, // opencl_local
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29 4, // opencl_constant
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30 0, // opencl_private
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31 // FIXME: generic has to be added to the target
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32 0, // opencl_generic
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207
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33 1, // opencl_global_device
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34 1, // opencl_global_host
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150
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35 1, // cuda_device
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36 4, // cuda_constant
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37 3, // cuda_shared
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207
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38 1, // sycl_global
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39 1, // sycl_global_device
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40 1, // sycl_global_host
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41 3, // sycl_local
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42 0, // sycl_private
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150
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43 0, // ptr32_sptr
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44 0, // ptr32_uptr
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45 0 // ptr64
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46 };
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47
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48 /// The DWARF address class. Taken from
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49 /// https://docs.nvidia.com/cuda/archive/10.0/ptx-writers-guide-to-interoperability/index.html#cuda-specific-dwarf
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50 static const int NVPTXDWARFAddrSpaceMap[] = {
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51 -1, // Default, opencl_private or opencl_generic - not defined
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52 5, // opencl_global
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53 -1,
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54 8, // opencl_local or cuda_shared
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55 4, // opencl_constant or cuda_constant
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56 };
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57
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58 class LLVM_LIBRARY_VISIBILITY NVPTXTargetInfo : public TargetInfo {
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59 static const char *const GCCRegNames[];
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60 static const Builtin::Info BuiltinInfo[];
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61 CudaArch GPU;
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62 uint32_t PTXVersion;
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63 std::unique_ptr<TargetInfo> HostTarget;
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64
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65 public:
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66 NVPTXTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts,
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67 unsigned TargetPointerWidth);
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68
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69 void getTargetDefines(const LangOptions &Opts,
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70 MacroBuilder &Builder) const override;
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71
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72 ArrayRef<Builtin::Info> getTargetBuiltins() const override;
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73
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74 bool
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75 initFeatureMap(llvm::StringMap<bool> &Features, DiagnosticsEngine &Diags,
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76 StringRef CPU,
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77 const std::vector<std::string> &FeaturesVec) const override {
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78 Features[CudaArchToString(GPU)] = true;
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79 Features["ptx" + std::to_string(PTXVersion)] = true;
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80 return TargetInfo::initFeatureMap(Features, Diags, CPU, FeaturesVec);
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81 }
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82
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83 bool hasFeature(StringRef Feature) const override;
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84
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85 ArrayRef<const char *> getGCCRegNames() const override;
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86
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87 ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override {
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88 // No aliases.
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89 return None;
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90 }
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91
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92 bool validateAsmConstraint(const char *&Name,
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93 TargetInfo::ConstraintInfo &Info) const override {
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94 switch (*Name) {
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95 default:
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96 return false;
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97 case 'c':
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98 case 'h':
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99 case 'r':
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100 case 'l':
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101 case 'f':
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102 case 'd':
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103 Info.setAllowsRegister();
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104 return true;
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105 }
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106 }
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107
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108 const char *getClobbers() const override {
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109 // FIXME: Is this really right?
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110 return "";
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111 }
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112
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113 BuiltinVaListKind getBuiltinVaListKind() const override {
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114 // FIXME: implement
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115 return TargetInfo::CharPtrBuiltinVaList;
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116 }
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117
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118 bool isValidCPUName(StringRef Name) const override {
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119 return StringToCudaArch(Name) != CudaArch::UNKNOWN;
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120 }
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121
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122 void fillValidCPUList(SmallVectorImpl<StringRef> &Values) const override {
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123 for (int i = static_cast<int>(CudaArch::SM_20);
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124 i < static_cast<int>(CudaArch::LAST); ++i)
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125 Values.emplace_back(CudaArchToString(static_cast<CudaArch>(i)));
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126 }
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127
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128 bool setCPU(const std::string &Name) override {
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129 GPU = StringToCudaArch(Name);
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130 return GPU != CudaArch::UNKNOWN;
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131 }
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132
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133 void setSupportedOpenCLOpts() override {
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134 auto &Opts = getSupportedOpenCLOpts();
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207
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135 Opts["cl_clang_storage_class_specifiers"] = true;
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136 Opts["__cl_clang_function_pointers"] = true;
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137 Opts["__cl_clang_variadic_functions"] = true;
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138 Opts["__cl_clang_non_portable_kernel_param_types"] = true;
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139 Opts["__cl_clang_bitfields"] = true;
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150
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140
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207
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141 Opts["cl_khr_fp64"] = true;
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142 Opts["__opencl_c_fp64"] = true;
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143 Opts["cl_khr_byte_addressable_store"] = true;
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144 Opts["cl_khr_global_int32_base_atomics"] = true;
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145 Opts["cl_khr_global_int32_extended_atomics"] = true;
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146 Opts["cl_khr_local_int32_base_atomics"] = true;
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147 Opts["cl_khr_local_int32_extended_atomics"] = true;
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150
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148 }
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149
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150 /// \returns If a target requires an address within a target specific address
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151 /// space \p AddressSpace to be converted in order to be used, then return the
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152 /// corresponding target specific DWARF address space.
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153 ///
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154 /// \returns Otherwise return None and no conversion will be emitted in the
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155 /// DWARF.
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156 Optional<unsigned>
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157 getDWARFAddressSpace(unsigned AddressSpace) const override {
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158 if (AddressSpace >= llvm::array_lengthof(NVPTXDWARFAddrSpaceMap) ||
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159 NVPTXDWARFAddrSpaceMap[AddressSpace] < 0)
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160 return llvm::None;
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161 return NVPTXDWARFAddrSpaceMap[AddressSpace];
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162 }
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163
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164 CallingConvCheckResult checkCallingConvention(CallingConv CC) const override {
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165 // CUDA compilations support all of the host's calling conventions.
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166 //
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167 // TODO: We should warn if you apply a non-default CC to anything other than
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168 // a host function.
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169 if (HostTarget)
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170 return HostTarget->checkCallingConvention(CC);
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171 return CCCR_Warning;
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172 }
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173
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173
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174 bool hasExtIntType() const override { return true; }
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150
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175 };
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176 } // namespace targets
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177 } // namespace clang
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178 #endif // LLVM_CLANG_LIB_BASIC_TARGETS_NVPTX_H
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