173
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1 // RUN: %clang_cc1 -triple thumbv8-linux-gnueabihf -target-cpu cortex-a57 \
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2 // RUN: -ffreestanding -disable-O0-optnone -emit-llvm %s -o - | \
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3 // RUN: opt -S -mem2reg | FileCheck -check-prefixes=COMMON,COMMONIR,UNCONSTRAINED %s
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4 // RUN: %clang_cc1 -triple arm64-linux-gnueabihf -target-feature +neon \
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5 // RUN: -ffreestanding -disable-O0-optnone -emit-llvm %s -o - | \
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6 // RUN: opt -S -mem2reg | FileCheck -check-prefixes=COMMON,COMMONIR,UNCONSTRAINED %s
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7
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8 // RUN: %clang_cc1 -triple thumbv8-linux-gnueabihf -target-cpu cortex-a57 \
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9 // RUN: -ffp-exception-behavior=strict \
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207
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10 // RUN: -fexperimental-strict-floating-point \
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173
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11 // RUN: -ffreestanding -disable-O0-optnone -emit-llvm %s -o - | \
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12 // RUN: opt -S -mem2reg | FileCheck -check-prefixes=COMMON,COMMONIR,CONSTRAINED %s
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13 // RUN: %clang_cc1 -triple arm64-linux-gnueabihf -target-feature +neon \
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14 // RUN: -ffp-exception-behavior=strict \
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207
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15 // RUN: -fexperimental-strict-floating-point \
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173
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16 // RUN: -ffreestanding -disable-O0-optnone -emit-llvm %s -o - | \
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17 // RUN: opt -S -mem2reg | FileCheck -check-prefixes=COMMON,COMMONIR,CONSTRAINED %s
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18
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19 // RUN: %clang_cc1 -triple thumbv8-linux-gnueabihf -target-cpu cortex-a57 \
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20 // RUN: -ffreestanding -disable-O0-optnone -emit-llvm %s -o - | \
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21 // RUN: opt -S -mem2reg | llc -o=- - | FileCheck -check-prefixes=COMMON,CHECK-ASM32 %s
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22 // RUN: %clang_cc1 -triple arm64-linux-gnueabihf -target-feature +neon \
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23 // RUN: -ffreestanding -disable-O0-optnone -emit-llvm %s -o - | \
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24 // RUN: opt -S -mem2reg | llc -o=- - | FileCheck -check-prefixes=COMMON,CHECK-ASM64 %s
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25
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26 // RUN: %clang_cc1 -triple thumbv8-linux-gnueabihf -target-cpu cortex-a57 \
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27 // RUN: -ffp-exception-behavior=strict \
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207
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28 // RUN: -fexperimental-strict-floating-point \
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173
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29 // RUN: -ffreestanding -disable-O0-optnone -emit-llvm %s -o - | \
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30 // RUN: opt -S -mem2reg | llc -o=- - | FileCheck -check-prefixes=COMMON,CHECK-ASM32 %s
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31 // RUN: %clang_cc1 -triple arm64-linux-gnueabihf -target-feature +neon \
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32 // RUN: -ffp-exception-behavior=strict \
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207
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33 // RUN: -fexperimental-strict-floating-point \
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173
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34 // RUN: -ffreestanding -disable-O0-optnone -emit-llvm %s -o - | \
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35 // RUN: opt -S -mem2reg | llc -o=- - | FileCheck -check-prefixes=COMMON,CHECK-ASM64 %s
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36
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37 // REQUIRES: arm-registered-target,aarch64-registered-target
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38
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39 #include <arm_neon.h>
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40
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41 // COMMON-LABEL: test_vrndi_f32
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42 // COMMONIR: [[TMP0:%.*]] = bitcast <2 x float> %a to <8 x i8>
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43 // UNCONSTRAINED: [[VRNDI1_I:%.*]] = call <2 x float> @llvm.nearbyint.v2f32(<2 x float> %a)
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44 // CONSTRAINED: [[VRNDI1_I:%.*]] = call <2 x float> @llvm.experimental.constrained.nearbyint.v2f32(<2 x float> %a, metadata !"round.tonearest", metadata !"fpexcept.strict")
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45 // CHECK-ASM32: vrintr.f32 s{{[0-9]+}}, s{{[0-9]+}}
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46 // CHECK-ASM32: vrintr.f32 s{{[0-9]+}}, s{{[0-9]+}}
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47 // CHECK-ASM64: frinti v{{[0-9]+}}.2s, v{{[0-9]+}}.2s
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48 // COMMONIR: ret <2 x float> [[VRNDI1_I]]
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49 float32x2_t test_vrndi_f32(float32x2_t a) {
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50 return vrndi_f32(a);
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51 }
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52
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53 // COMMON-LABEL: test_vrndiq_f32
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54 // COMMONIR: [[TMP0:%.*]] = bitcast <4 x float> %a to <16 x i8>
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55 // UNCONSTRAINED: [[VRNDI1_I:%.*]] = call <4 x float> @llvm.nearbyint.v4f32(<4 x float> %a)
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56 // CONSTRAINED: [[VRNDI1_I:%.*]] = call <4 x float> @llvm.experimental.constrained.nearbyint.v4f32(<4 x float> %a, metadata !"round.tonearest", metadata !"fpexcept.strict")
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57 // CHECK-ASM32: vrintr.f32 s{{[0-9]+}}, s{{[0-9]+}}
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58 // CHECK-ASM32: vrintr.f32 s{{[0-9]+}}, s{{[0-9]+}}
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59 // CHECK-ASM32: vrintr.f32 s{{[0-9]+}}, s{{[0-9]+}}
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60 // CHECK-ASM32: vrintr.f32 s{{[0-9]+}}, s{{[0-9]+}}
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61 // CHECK-ASM64: frinti v{{[0-9]+}}.4s, v{{[0-9]+}}.4s
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62 // COMMONIR: ret <4 x float> [[VRNDI1_I]]
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63 float32x4_t test_vrndiq_f32(float32x4_t a) {
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64 return vrndiq_f32(a);
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65 }
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