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annotate llvm/test/CodeGen/AMDGPU/global-variable-relocs.ll @ 207:2e18cbf3894f

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LLVM12
author Shinji KONO <kono@ie.u-ryukyu.ac.jp>
date Tue, 08 Jun 2021 06:07:14 +0900
parents 1d019706d866
children c4bab56944e8
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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150
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1 ; RUN: llc -mtriple=amdgcn--amdhsa -mcpu=fiji < %s | FileCheck %s
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2
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3 @private = private addrspace(1) global [256 x i32] zeroinitializer
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4 @internal = internal addrspace(1) global [256 x i32] zeroinitializer
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5 @available_externally = available_externally addrspace(1) global [256 x i32] zeroinitializer
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6 @linkonce = linkonce addrspace(1) global [256 x i32] zeroinitializer
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7 @weak= weak addrspace(1) global [256 x i32] zeroinitializer
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8 @common = common addrspace(1) global [256 x i32] zeroinitializer
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9 @extern_weak = extern_weak addrspace(1) global [256 x i32]
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10 @linkonce_odr = linkonce_odr addrspace(1) global [256 x i32] zeroinitializer
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11 @weak_odr = weak_odr addrspace(1) global [256 x i32] zeroinitializer
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12 @external = external addrspace(1) global [256 x i32]
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13 @external_w_init = addrspace(1) global [256 x i32] zeroinitializer
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14
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15 ; CHECK-LABEL: private_test:
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16 ; CHECK: s_getpc_b64 s{{\[}}[[PC_LO:[0-9]+]]:[[PC_HI:[0-9]+]]{{\]}}
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17 ; CHECK: s_add_u32 s[[ADDR_LO:[0-9]+]], s[[PC_LO]], private@rel32@lo+8
207
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents: 150
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18 ; CHECK: s_addc_u32 s[[ADDR_HI:[0-9]+]], s[[PC_HI]], private@rel32@hi+16
150
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19 ; CHECK-DAG: v_mov_b32_e32 v[[V_LO:[0-9]+]], s[[ADDR_LO]]
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20 ; CHECK-DAG: v_mov_b32_e32 v[[V_HI:[0-9]+]], s[[ADDR_HI]]
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21 ; CHECK: flat_load_dword v{{[0-9]+}}, v{{\[}}[[V_LO]]:[[V_HI]]{{\]}}
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22 define amdgpu_kernel void @private_test(i32 addrspace(1)* %out) {
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23 %ptr = getelementptr [256 x i32], [256 x i32] addrspace(1)* @private, i32 0, i32 1
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24 %val = load i32, i32 addrspace(1)* %ptr
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25 store i32 %val, i32 addrspace(1)* %out
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26 ret void
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27 }
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28
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29 ; CHECK-LABEL: internal_test:
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30 ; CHECK: s_getpc_b64 s{{\[}}[[PC_LO:[0-9]+]]:[[PC_HI:[0-9]+]]{{\]}}
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31 ; CHECK: s_add_u32 s[[ADDR_LO:[0-9]+]], s[[PC_LO]], internal@rel32@lo+8
207
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents: 150
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32 ; CHECK: s_addc_u32 s[[ADDR_HI:[0-9]+]], s[[PC_HI]], internal@rel32@hi+16
150
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33 ; CHECK-DAG: v_mov_b32_e32 v[[V_LO:[0-9]+]], s[[ADDR_LO]]
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34 ; CHECK-DAG: v_mov_b32_e32 v[[V_HI:[0-9]+]], s[[ADDR_HI]]
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35 ; CHECK: flat_load_dword v{{[0-9]+}}, v{{\[}}[[V_LO]]:[[V_HI]]{{\]}}
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36 define amdgpu_kernel void @internal_test(i32 addrspace(1)* %out) {
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37 %ptr = getelementptr [256 x i32], [256 x i32] addrspace(1)* @internal, i32 0, i32 1
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38 %val = load i32, i32 addrspace(1)* %ptr
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39 store i32 %val, i32 addrspace(1)* %out
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40 ret void
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41 }
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42
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43 ; CHECK-LABEL: available_externally_test:
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44 ; CHECK: s_getpc_b64 s{{\[}}[[PC_LO:[0-9]+]]:[[PC_HI:[0-9]+]]{{\]}}
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45 ; CHECK: s_add_u32 s[[GOTADDR_LO:[0-9]+]], s[[PC_LO]], available_externally@gotpcrel32@lo+4
207
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents: 150
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46 ; CHECK: s_addc_u32 s[[GOTADDR_HI:[0-9]+]], s[[PC_HI]], available_externally@gotpcrel32@hi+12
150
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47 ; CHECK: s_load_dwordx2 s{{\[}}[[ADDR_LO:[0-9]+]]:[[ADDR_HI:[0-9]+]]{{\]}}, s{{\[}}[[GOTADDR_LO]]:[[GOTADDR_HI]]{{\]}}, 0x0
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48 ; CHECK: s_add_u32 s[[GEP_LO:[0-9]+]], s[[ADDR_LO]], 4
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49 ; CHECK: s_addc_u32 s[[GEP_HI:[0-9]+]], s[[ADDR_HI]], 0
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50 ; CHECK-DAG: v_mov_b32_e32 v[[V_LO:[0-9]+]], s[[GEP_LO]]
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51 ; CHECK-DAG: v_mov_b32_e32 v[[V_HI:[0-9]+]], s[[GEP_HI]]
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52 ; CHECK: flat_load_dword v{{[0-9]+}}, v{{\[}}[[V_LO]]:[[V_HI]]{{\]}}
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53 define amdgpu_kernel void @available_externally_test(i32 addrspace(1)* %out) {
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54 %ptr = getelementptr [256 x i32], [256 x i32] addrspace(1)* @available_externally, i32 0, i32 1
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55 %val = load i32, i32 addrspace(1)* %ptr
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56 store i32 %val, i32 addrspace(1)* %out
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57 ret void
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58 }
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59
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60 ; CHECK-LABEL: linkonce_test:
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61 ; CHECK: s_getpc_b64 s{{\[}}[[PC_LO:[0-9]+]]:[[PC_HI:[0-9]+]]{{\]}}
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62 ; CHECK: s_add_u32 s[[GOTADDR_LO:[0-9]+]], s[[PC_LO]], linkonce@gotpcrel32@lo+4
207
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents: 150
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63 ; CHECK: s_addc_u32 s[[GOTADDR_HI:[0-9]+]], s[[PC_HI]], linkonce@gotpcrel32@hi+12
150
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64 ; CHECK: s_load_dwordx2 s{{\[}}[[ADDR_LO:[0-9]+]]:[[ADDR_HI:[0-9]+]]{{\]}}, s{{\[}}[[GOTADDR_LO]]:[[GOTADDR_HI]]{{\]}}, 0x0
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65 ; CHECK: s_add_u32 s[[GEP_LO:[0-9]+]], s[[ADDR_LO]], 4
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66 ; CHECK: s_addc_u32 s[[GEP_HI:[0-9]+]], s[[ADDR_HI]], 0
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67 ; CHECK-DAG: v_mov_b32_e32 v[[V_LO:[0-9]+]], s[[GEP_LO]]
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68 ; CHECK-DAG: v_mov_b32_e32 v[[V_HI:[0-9]+]], s[[GEP_HI]]
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69 ; CHECK: flat_load_dword v{{[0-9]+}}, v{{\[}}[[V_LO]]:[[V_HI]]{{\]}}
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70 define amdgpu_kernel void @linkonce_test(i32 addrspace(1)* %out) {
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71 %ptr = getelementptr [256 x i32], [256 x i32] addrspace(1)* @linkonce, i32 0, i32 1
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72 %val = load i32, i32 addrspace(1)* %ptr
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73 store i32 %val, i32 addrspace(1)* %out
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74 ret void
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75 }
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76
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77 ; CHECK-LABEL: weak_test:
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78 ; CHECK: s_getpc_b64 s{{\[}}[[PC_LO:[0-9]+]]:[[PC_HI:[0-9]+]]{{\]}}
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79 ; CHECK: s_add_u32 s[[GOTADDR_LO:[0-9]+]], s[[PC_LO]], weak@gotpcrel32@lo+4
207
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents: 150
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80 ; CHECK: s_addc_u32 s[[GOTADDR_HI:[0-9]+]], s[[PC_HI]], weak@gotpcrel32@hi+12
150
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81 ; CHECK: s_load_dwordx2 s{{\[}}[[ADDR_LO:[0-9]+]]:[[ADDR_HI:[0-9]+]]{{\]}}, s{{\[}}[[GOTADDR_LO]]:[[GOTADDR_HI]]{{\]}}, 0x0
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82 ; CHECK: s_add_u32 s[[GEP_LO:[0-9]+]], s[[ADDR_LO]], 4
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83 ; CHECK: s_addc_u32 s[[GEP_HI:[0-9]+]], s[[ADDR_HI]], 0
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84 ; CHECK-DAG: v_mov_b32_e32 v[[V_LO:[0-9]+]], s[[GEP_LO]]
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85 ; CHECK-DAG: v_mov_b32_e32 v[[V_HI:[0-9]+]], s[[GEP_HI]]
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86 ; CHECK: flat_load_dword v{{[0-9]+}}, v{{\[}}[[V_LO]]:[[V_HI]]{{\]}}
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87 define amdgpu_kernel void @weak_test(i32 addrspace(1)* %out) {
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88 %ptr = getelementptr [256 x i32], [256 x i32] addrspace(1)* @weak, i32 0, i32 1
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89 %val = load i32, i32 addrspace(1)* %ptr
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90 store i32 %val, i32 addrspace(1)* %out
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91 ret void
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92 }
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93
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94 ; CHECK-LABEL: common_test:
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95 ; CHECK: s_getpc_b64 s{{\[}}[[PC_LO:[0-9]+]]:[[PC_HI:[0-9]+]]{{\]}}
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96 ; CHECK: s_add_u32 s[[GOTADDR_LO:[0-9]+]], s[[PC_LO]], common@gotpcrel32@lo+4
207
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents: 150
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97 ; CHECK: s_addc_u32 s[[GOTADDR_HI:[0-9]+]], s[[PC_HI]], common@gotpcrel32@hi+12
150
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98 ; CHECK: s_load_dwordx2 s{{\[}}[[ADDR_LO:[0-9]+]]:[[ADDR_HI:[0-9]+]]{{\]}}, s{{\[}}[[GOTADDR_LO]]:[[GOTADDR_HI]]{{\]}}, 0x0
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99 ; CHECK: s_add_u32 s[[GEP_LO:[0-9]+]], s[[ADDR_LO]], 4
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100 ; CHECK: s_addc_u32 s[[GEP_HI:[0-9]+]], s[[ADDR_HI]], 0
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101 ; CHECK-DAG: v_mov_b32_e32 v[[V_LO:[0-9]+]], s[[GEP_LO]]
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102 ; CHECK-DAG: v_mov_b32_e32 v[[V_HI:[0-9]+]], s[[GEP_HI]]
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103 ; CHECK: flat_load_dword v{{[0-9]+}}, v{{\[}}[[V_LO]]:[[V_HI]]{{\]}}
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104 define amdgpu_kernel void @common_test(i32 addrspace(1)* %out) {
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105 %ptr = getelementptr [256 x i32], [256 x i32] addrspace(1)* @common, i32 0, i32 1
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106 %val = load i32, i32 addrspace(1)* %ptr
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107 store i32 %val, i32 addrspace(1)* %out
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108 ret void
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109 }
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110
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111 ; CHECK-LABEL: extern_weak_test:
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112 ; CHECK: s_getpc_b64 s{{\[}}[[PC_LO:[0-9]+]]:[[PC_HI:[0-9]+]]{{\]}}
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113 ; CHECK: s_add_u32 s[[GOTADDR_LO:[0-9]+]], s[[PC_LO]], extern_weak@gotpcrel32@lo+4
207
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents: 150
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114 ; CHECK: s_addc_u32 s[[GOTADDR_HI:[0-9]+]], s[[PC_HI]], extern_weak@gotpcrel32@hi+12
150
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115 ; CHECK: s_load_dwordx2 s{{\[}}[[ADDR_LO:[0-9]+]]:[[ADDR_HI:[0-9]+]]{{\]}}, s{{\[}}[[GOTADDR_LO]]:[[GOTADDR_HI]]{{\]}}, 0x0
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116 ; CHECK: s_add_u32 s[[GEP_LO:[0-9]+]], s[[ADDR_LO]], 4
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117 ; CHECK: s_addc_u32 s[[GEP_HI:[0-9]+]], s[[ADDR_HI]], 0
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118 ; CHECK-DAG: v_mov_b32_e32 v[[V_LO:[0-9]+]], s[[GEP_LO]]
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119 ; CHECK-DAG: v_mov_b32_e32 v[[V_HI:[0-9]+]], s[[GEP_HI]]
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120 ; CHECK: flat_load_dword v{{[0-9]+}}, v{{\[}}[[V_LO]]:[[V_HI]]{{\]}}
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121 define amdgpu_kernel void @extern_weak_test(i32 addrspace(1)* %out) {
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122 %ptr = getelementptr [256 x i32], [256 x i32] addrspace(1)* @extern_weak, i32 0, i32 1
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123 %val = load i32, i32 addrspace(1)* %ptr
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124 store i32 %val, i32 addrspace(1)* %out
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125 ret void
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126 }
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127
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128 ; CHECK-LABEL: linkonce_odr_test:
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129 ; CHECK: s_getpc_b64 s{{\[}}[[PC_LO:[0-9]+]]:[[PC_HI:[0-9]+]]{{\]}}
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130 ; CHECK: s_add_u32 s[[GOTADDR_LO:[0-9]+]], s[[PC_LO]], linkonce_odr@gotpcrel32@lo+4
207
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents: 150
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131 ; CHECK: s_addc_u32 s[[GOTADDR_HI:[0-9]+]], s[[PC_HI]], linkonce_odr@gotpcrel32@hi+12
150
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132 ; CHECK: s_load_dwordx2 s{{\[}}[[ADDR_LO:[0-9]+]]:[[ADDR_HI:[0-9]+]]{{\]}}, s{{\[}}[[GOTADDR_LO]]:[[GOTADDR_HI]]{{\]}}, 0x0
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133 ; CHECK: s_add_u32 s[[GEP_LO:[0-9]+]], s[[ADDR_LO]], 4
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134 ; CHECK: s_addc_u32 s[[GEP_HI:[0-9]+]], s[[ADDR_HI]], 0
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135 ; CHECK-DAG: v_mov_b32_e32 v[[V_LO:[0-9]+]], s[[GEP_LO]]
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136 ; CHECK-DAG: v_mov_b32_e32 v[[V_HI:[0-9]+]], s[[GEP_HI]]
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137 ; CHECK: flat_load_dword v{{[0-9]+}}, v{{\[}}[[V_LO]]:[[V_HI]]{{\]}}
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138 define amdgpu_kernel void @linkonce_odr_test(i32 addrspace(1)* %out) {
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139 %ptr = getelementptr [256 x i32], [256 x i32] addrspace(1)* @linkonce_odr, i32 0, i32 1
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140 %val = load i32, i32 addrspace(1)* %ptr
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141 store i32 %val, i32 addrspace(1)* %out
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142 ret void
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143 }
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144
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145 ; CHECK-LABEL: weak_odr_test:
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146 ; CHECK: s_getpc_b64 s{{\[}}[[PC_LO:[0-9]+]]:[[PC_HI:[0-9]+]]{{\]}}
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147 ; CHECK: s_add_u32 s[[GOTADDR_LO:[0-9]+]], s[[PC_LO]], weak_odr@gotpcrel32@lo+4
207
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents: 150
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148 ; CHECK: s_addc_u32 s[[GOTADDR_HI:[0-9]+]], s[[PC_HI]], weak_odr@gotpcrel32@hi+12
150
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149 ; CHECK: s_load_dwordx2 s{{\[}}[[ADDR_LO:[0-9]+]]:[[ADDR_HI:[0-9]+]]{{\]}}, s{{\[}}[[GOTADDR_LO]]:[[GOTADDR_HI]]{{\]}}, 0x0
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150 ; CHECK: s_add_u32 s[[GEP_LO:[0-9]+]], s[[ADDR_LO]], 4
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151 ; CHECK: s_addc_u32 s[[GEP_HI:[0-9]+]], s[[ADDR_HI]], 0
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152 ; CHECK-DAG: v_mov_b32_e32 v[[V_LO:[0-9]+]], s[[GEP_LO]]
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153 ; CHECK-DAG: v_mov_b32_e32 v[[V_HI:[0-9]+]], s[[GEP_HI]]
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154 ; CHECK: flat_load_dword v{{[0-9]+}}, v{{\[}}[[V_LO]]:[[V_HI]]{{\]}}
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155 define amdgpu_kernel void @weak_odr_test(i32 addrspace(1)* %out) {
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156 %ptr = getelementptr [256 x i32], [256 x i32] addrspace(1)* @weak_odr, i32 0, i32 1
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157 %val = load i32, i32 addrspace(1)* %ptr
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158 store i32 %val, i32 addrspace(1)* %out
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159 ret void
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160 }
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161
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162 ; CHECK-LABEL: external_test:
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163 ; CHECK: s_getpc_b64 s{{\[}}[[PC_LO:[0-9]+]]:[[PC_HI:[0-9]+]]{{\]}}
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164 ; CHECK: s_add_u32 s[[GOTADDR_LO:[0-9]+]], s[[PC_LO]], external@gotpcrel32@lo+4
207
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents: 150
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165 ; CHECK: s_addc_u32 s[[GOTADDR_HI:[0-9]+]], s[[PC_HI]], external@gotpcrel32@hi+12
150
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166 ; CHECK: s_load_dwordx2 s{{\[}}[[ADDR_LO:[0-9]+]]:[[ADDR_HI:[0-9]+]]{{\]}}, s{{\[}}[[GOTADDR_LO]]:[[GOTADDR_HI]]{{\]}}, 0x0
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167 ; CHECK: s_add_u32 s[[GEP_LO:[0-9]+]], s[[ADDR_LO]], 4
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168 ; CHECK: s_addc_u32 s[[GEP_HI:[0-9]+]], s[[ADDR_HI]], 0
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169 ; CHECK-DAG: v_mov_b32_e32 v[[V_LO:[0-9]+]], s[[GEP_LO]]
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170 ; CHECK-DAG: v_mov_b32_e32 v[[V_HI:[0-9]+]], s[[GEP_HI]]
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171 ; CHECK: flat_load_dword v{{[0-9]+}}, v{{\[}}[[V_LO]]:[[V_HI]]{{\]}}
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172 define amdgpu_kernel void @external_test(i32 addrspace(1)* %out) {
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173 %ptr = getelementptr [256 x i32], [256 x i32] addrspace(1)* @external, i32 0, i32 1
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174 %val = load i32, i32 addrspace(1)* %ptr
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175 store i32 %val, i32 addrspace(1)* %out
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176 ret void
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177 }
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178
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179 ; CHECK-LABEL: external_w_init_test:
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180 ; CHECK: s_getpc_b64 s{{\[}}[[PC_LO:[0-9]+]]:[[PC_HI:[0-9]+]]{{\]}}
anatofuz
parents:
diff changeset
181 ; CHECK: s_add_u32 s[[GOTADDR_LO:[0-9]+]], s[[PC_LO]], external_w_init@gotpcrel32@lo+4
207
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents: 150
diff changeset
182 ; CHECK: s_addc_u32 s[[GOTADDR_HI:[0-9]+]], s[[PC_HI]], external_w_init@gotpcrel32@hi+12
150
anatofuz
parents:
diff changeset
183 ; CHECK: s_load_dwordx2 s{{\[}}[[ADDR_LO:[0-9]+]]:[[ADDR_HI:[0-9]+]]{{\]}}, s{{\[}}[[GOTADDR_LO]]:[[GOTADDR_HI]]{{\]}}, 0x0
anatofuz
parents:
diff changeset
184 ; CHECK: s_add_u32 s[[GEP_LO:[0-9]+]], s[[ADDR_LO]], 4
anatofuz
parents:
diff changeset
185 ; CHECK: s_addc_u32 s[[GEP_HI:[0-9]+]], s[[ADDR_HI]], 0
anatofuz
parents:
diff changeset
186 ; CHECK-DAG: v_mov_b32_e32 v[[V_LO:[0-9]+]], s[[GEP_LO]]
anatofuz
parents:
diff changeset
187 ; CHECK-DAG: v_mov_b32_e32 v[[V_HI:[0-9]+]], s[[GEP_HI]]
anatofuz
parents:
diff changeset
188 ; CHECK: flat_load_dword v{{[0-9]+}}, v{{\[}}[[V_LO]]:[[V_HI]]{{\]}}
anatofuz
parents:
diff changeset
189 define amdgpu_kernel void @external_w_init_test(i32 addrspace(1)* %out) {
anatofuz
parents:
diff changeset
190 %ptr = getelementptr [256 x i32], [256 x i32] addrspace(1)* @external_w_init, i32 0, i32 1
anatofuz
parents:
diff changeset
191 %val = load i32, i32 addrspace(1)* %ptr
anatofuz
parents:
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192 store i32 %val, i32 addrspace(1)* %out
anatofuz
parents:
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193 ret void
anatofuz
parents:
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194 }
anatofuz
parents:
diff changeset
195
anatofuz
parents:
diff changeset
196 ; CHECK: .local private
anatofuz
parents:
diff changeset
197 ; CHECK: .local internal
anatofuz
parents:
diff changeset
198 ; CHECK: .weak linkonce
anatofuz
parents:
diff changeset
199 ; CHECK: .weak weak
anatofuz
parents:
diff changeset
200 ; CHECK: .weak linkonce_odr
anatofuz
parents:
diff changeset
201 ; CHECK: .weak weak_odr
anatofuz
parents:
diff changeset
202 ; CHECK-NOT: external{{$}}
anatofuz
parents:
diff changeset
203 ; CHECK: .globl external_w_init