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annotate llvm/test/CodeGen/AMDGPU/llvm.amdgcn.queue.ptr.ll @ 207:2e18cbf3894f

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LLVM12
author Shinji KONO <kono@ie.u-ryukyu.ac.jp>
date Tue, 08 Jun 2021 06:07:14 +0900
parents 1d019706d866
children 1f2b6ac9f198
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207
Shinji KONO <kono@ie.u-ryukyu.ac.jp>
parents: 150
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1 ; RUN: llc -mtriple=amdgcn--amdhsa -mcpu=kaveri --amdhsa-code-object-version=2 -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
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2 ; RUN: not llc -mtriple=amdgcn-unknown-unknown -mcpu=kaveri -verify-machineinstrs < %s 2>&1 | FileCheck -check-prefix=ERROR %s
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3
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4 ; ERROR: in function test{{.*}}: unsupported hsa intrinsic without hsa target
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5
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6 ; GCN-LABEL: {{^}}test:
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7 ; GCN: enable_sgpr_queue_ptr = 1
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8 ; GCN: s_load_dword s{{[0-9]+}}, s[4:5], 0x0
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9 define amdgpu_kernel void @test(i32 addrspace(1)* %out) {
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10 %queue_ptr = call noalias i8 addrspace(4)* @llvm.amdgcn.queue.ptr() #0
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11 %header_ptr = bitcast i8 addrspace(4)* %queue_ptr to i32 addrspace(4)*
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12 %value = load i32, i32 addrspace(4)* %header_ptr
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13 store i32 %value, i32 addrspace(1)* %out
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14 ret void
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15 }
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16
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17 declare noalias i8 addrspace(4)* @llvm.amdgcn.queue.ptr() #0
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18
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19 attributes #0 = { nounwind readnone }