annotate llvm/test/CodeGen/AMDGPU/llvm.amdgcn.workitem.id.ll @ 207:2e18cbf3894f

LLVM12
author Shinji KONO <kono@ie.u-ryukyu.ac.jp>
date Tue, 08 Jun 2021 06:07:14 +0900
parents 0572611fdcc8
children c4bab56944e8
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1 ; RUN: llc -march=amdgcn -mtriple=amdgcn-unknown-amdhsa --amdhsa-code-object-version=2 -mcpu=kaveri -verify-machineinstrs < %s | FileCheck --check-prefixes=ALL,CO-V2 %s
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2 ; RUN: llc -march=amdgcn -mtriple=amdgcn-unknown-amdhsa --amdhsa-code-object-version=2 -mcpu=carrizo -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck --check-prefixes=ALL,CO-V2 %s
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3 ; RUN: llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs < %s | FileCheck --check-prefixes=ALL,MESA %s
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4 ; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck --check-prefixes=ALL,MESA %s
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5 ; RUN: llc -mtriple=amdgcn-unknown-mesa3d -mcpu=tahiti -verify-machineinstrs < %s | FileCheck -check-prefixes=ALL,CO-V2 %s
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6 ; RUN: llc -mtriple=amdgcn-unknown-mesa3d -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefixes=ALL,CO-V2 %s
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7 ; RUN: llc -march=amdgcn -mtriple=amdgcn-unknown-amdhsa -mcpu=gfx90a -verify-machineinstrs < %s | FileCheck -check-prefixes=ALL,PACKED-TID %s
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8
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9 declare i32 @llvm.amdgcn.workitem.id.x() #0
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10 declare i32 @llvm.amdgcn.workitem.id.y() #0
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11 declare i32 @llvm.amdgcn.workitem.id.z() #0
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12
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13 ; MESA: .section .AMDGPU.config
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14 ; MESA: .long 47180
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15 ; MESA-NEXT: .long 132{{$}}
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16
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17 ; ALL-LABEL: {{^}}test_workitem_id_x:
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18 ; CO-V2: enable_vgpr_workitem_id = 0
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19
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20 ; ALL-NOT: v0
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21 ; ALL: {{buffer|flat|global}}_store_dword {{.*}}v0
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23 ; PACKED-TID: .amdhsa_system_vgpr_workitem_id 0
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24 define amdgpu_kernel void @test_workitem_id_x(i32 addrspace(1)* %out) #1 {
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25 %id = call i32 @llvm.amdgcn.workitem.id.x()
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26 store i32 %id, i32 addrspace(1)* %out
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27 ret void
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28 }
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29
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30 ; MESA: .section .AMDGPU.config
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31 ; MESA: .long 47180
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32 ; MESA-NEXT: .long 2180{{$}}
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33
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34 ; ALL-LABEL: {{^}}test_workitem_id_y:
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35 ; CO-V2: enable_vgpr_workitem_id = 1
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36 ; CO-V2-NOT: v1
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37 ; CO-V2: {{buffer|flat}}_store_dword {{.*}}v1
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39 ; PACKED-TID: v_bfe_u32 [[ID:v[0-9]+]], v0, 10, 10
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40 ; PACKED-TID: {{buffer|flat|global}}_store_dword {{.*}}[[ID]]
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41 ; PACKED-TID: .amdhsa_system_vgpr_workitem_id 1
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42 define amdgpu_kernel void @test_workitem_id_y(i32 addrspace(1)* %out) #1 {
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43 %id = call i32 @llvm.amdgcn.workitem.id.y()
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44 store i32 %id, i32 addrspace(1)* %out
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45 ret void
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46 }
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47
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48 ; MESA: .section .AMDGPU.config
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49 ; MESA: .long 47180
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50 ; MESA-NEXT: .long 4228{{$}}
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51
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52 ; ALL-LABEL: {{^}}test_workitem_id_z:
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53 ; CO-V2: enable_vgpr_workitem_id = 2
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54 ; CO-V2-NOT: v2
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55 ; CO-V2: {{buffer|flat}}_store_dword {{.*}}v2
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57 ; PACKED-TID: v_bfe_u32 [[ID:v[0-9]+]], v0, 20, 10
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58 ; PACKED-TID: {{buffer|flat|global}}_store_dword {{.*}}[[ID]]
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59 ; PACKED-TID: .amdhsa_system_vgpr_workitem_id 2
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60 define amdgpu_kernel void @test_workitem_id_z(i32 addrspace(1)* %out) #1 {
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61 %id = call i32 @llvm.amdgcn.workitem.id.z()
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62 store i32 %id, i32 addrspace(1)* %out
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63 ret void
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64 }
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65
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66 attributes #0 = { nounwind readnone }
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67 attributes #1 = { nounwind }