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207
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1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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2 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx700 -verify-machineinstrs < %s | FileCheck --check-prefixes=GFX7 %s
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3 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1010 -verify-machineinstrs < %s | FileCheck --check-prefixes=GFX10-WGP %s
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4 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1010 -mattr=+cumode -verify-machineinstrs < %s | FileCheck --check-prefixes=GFX10-CU %s
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5 ; RUN: llc -mtriple=amdgcn-amd-amdpal -mcpu=gfx700 -amdgcn-skip-cache-invalidations -verify-machineinstrs < %s | FileCheck --check-prefixes=SKIP-CACHE-INV %s
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6 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx90a -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX90A-NOTTGSPLIT %s
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7 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx90a -mattr=+tgsplit -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX90A-TGSPLIT %s
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8
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9 define amdgpu_kernel void @flat_nontemporal_load_0(
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10 ; GFX7-LABEL: flat_nontemporal_load_0:
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11 ; GFX7: ; %bb.0: ; %entry
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12 ; GFX7-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
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13 ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
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14 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
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15 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
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16 ; GFX7-NEXT: flat_load_dword v0, v[0:1] glc slc
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17 ; GFX7-NEXT: v_mov_b32_e32 v2, s2
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18 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
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19 ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
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20 ; GFX7-NEXT: flat_store_dword v[2:3], v0
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21 ; GFX7-NEXT: s_endpgm
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22 ;
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23 ; GFX10-WGP-LABEL: flat_nontemporal_load_0:
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24 ; GFX10-WGP: ; %bb.0: ; %entry
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25 ; GFX10-WGP-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
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26 ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
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27 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
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28 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
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29 ; GFX10-WGP-NEXT: flat_load_dword v2, v[0:1] slc
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30 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s2
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31 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s3
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32 ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
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33 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
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34 ; GFX10-WGP-NEXT: s_endpgm
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35 ;
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36 ; GFX10-CU-LABEL: flat_nontemporal_load_0:
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37 ; GFX10-CU: ; %bb.0: ; %entry
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38 ; GFX10-CU-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
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39 ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
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40 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
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41 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
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42 ; GFX10-CU-NEXT: flat_load_dword v2, v[0:1] slc
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43 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s2
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44 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s3
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45 ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
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46 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
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47 ; GFX10-CU-NEXT: s_endpgm
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48 ;
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49 ; SKIP-CACHE-INV-LABEL: flat_nontemporal_load_0:
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50 ; SKIP-CACHE-INV: ; %bb.0: ; %entry
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51 ; SKIP-CACHE-INV-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
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52 ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
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53 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s0
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54 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s1
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55 ; SKIP-CACHE-INV-NEXT: flat_load_dword v0, v[0:1] glc slc
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56 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s2
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57 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s3
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58 ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
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59 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[2:3], v0
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60 ; SKIP-CACHE-INV-NEXT: s_endpgm
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61 ;
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62 ; GFX90A-NOTTGSPLIT-LABEL: flat_nontemporal_load_0:
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63 ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
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64 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
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65 ; GFX90A-NOTTGSPLIT-NEXT: s_waitcnt lgkmcnt(0)
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66 ; GFX90A-NOTTGSPLIT-NEXT: v_mov_b32_e32 v0, s0
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67 ; GFX90A-NOTTGSPLIT-NEXT: v_mov_b32_e32 v1, s1
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68 ; GFX90A-NOTTGSPLIT-NEXT: flat_load_dword v0, v[0:1] glc slc
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69 ; GFX90A-NOTTGSPLIT-NEXT: v_mov_b32_e32 v2, s2
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70 ; GFX90A-NOTTGSPLIT-NEXT: v_mov_b32_e32 v3, s3
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71 ; GFX90A-NOTTGSPLIT-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
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72 ; GFX90A-NOTTGSPLIT-NEXT: flat_store_dword v[2:3], v0
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73 ; GFX90A-NOTTGSPLIT-NEXT: s_endpgm
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74 ;
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75 ; GFX90A-TGSPLIT-LABEL: flat_nontemporal_load_0:
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76 ; GFX90A-TGSPLIT: ; %bb.0: ; %entry
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77 ; GFX90A-TGSPLIT-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
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78 ; GFX90A-TGSPLIT-NEXT: s_waitcnt lgkmcnt(0)
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79 ; GFX90A-TGSPLIT-NEXT: v_mov_b32_e32 v0, s0
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80 ; GFX90A-TGSPLIT-NEXT: v_mov_b32_e32 v1, s1
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81 ; GFX90A-TGSPLIT-NEXT: flat_load_dword v0, v[0:1] glc slc
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82 ; GFX90A-TGSPLIT-NEXT: v_mov_b32_e32 v2, s2
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83 ; GFX90A-TGSPLIT-NEXT: v_mov_b32_e32 v3, s3
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84 ; GFX90A-TGSPLIT-NEXT: s_waitcnt vmcnt(0)
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85 ; GFX90A-TGSPLIT-NEXT: flat_store_dword v[2:3], v0
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86 ; GFX90A-TGSPLIT-NEXT: s_endpgm
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87 ;
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88 ;
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89 i32* %in, i32* %out) {
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90 entry:
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91 %val = load i32, i32* %in, align 4, !nontemporal !0
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92 store i32 %val, i32* %out
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93 ret void
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94 }
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95
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96 define amdgpu_kernel void @flat_nontemporal_load_1(
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97 ; GFX7-LABEL: flat_nontemporal_load_1:
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98 ; GFX7: ; %bb.0: ; %entry
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99 ; GFX7-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
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100 ; GFX7-NEXT: v_lshlrev_b32_e32 v2, 2, v0
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101 ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
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102 ; GFX7-NEXT: v_mov_b32_e32 v3, s1
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103 ; GFX7-NEXT: v_add_i32_e32 v2, vcc, s0, v2
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104 ; GFX7-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc
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105 ; GFX7-NEXT: flat_load_dword v2, v[2:3] glc slc
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106 ; GFX7-NEXT: v_mov_b32_e32 v0, s2
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107 ; GFX7-NEXT: v_mov_b32_e32 v1, s3
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108 ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
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109 ; GFX7-NEXT: flat_store_dword v[0:1], v2
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110 ; GFX7-NEXT: s_endpgm
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111 ;
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112 ; GFX10-WGP-LABEL: flat_nontemporal_load_1:
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113 ; GFX10-WGP: ; %bb.0: ; %entry
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114 ; GFX10-WGP-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
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115 ; GFX10-WGP-NEXT: v_lshlrev_b32_e32 v0, 2, v0
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116 ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
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117 ; GFX10-WGP-NEXT: v_add_co_u32 v0, s0, s0, v0
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118 ; GFX10-WGP-NEXT: v_add_co_ci_u32_e64 v1, s0, s1, 0, s0
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119 ; GFX10-WGP-NEXT: flat_load_dword v2, v[0:1] slc
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120 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s2
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121 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s3
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122 ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
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123 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
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124 ; GFX10-WGP-NEXT: s_endpgm
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125 ;
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126 ; GFX10-CU-LABEL: flat_nontemporal_load_1:
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127 ; GFX10-CU: ; %bb.0: ; %entry
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128 ; GFX10-CU-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
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129 ; GFX10-CU-NEXT: v_lshlrev_b32_e32 v0, 2, v0
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130 ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
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131 ; GFX10-CU-NEXT: v_add_co_u32 v0, s0, s0, v0
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132 ; GFX10-CU-NEXT: v_add_co_ci_u32_e64 v1, s0, s1, 0, s0
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133 ; GFX10-CU-NEXT: flat_load_dword v2, v[0:1] slc
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134 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s2
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135 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s3
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136 ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
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137 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
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138 ; GFX10-CU-NEXT: s_endpgm
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139 ;
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140 ; SKIP-CACHE-INV-LABEL: flat_nontemporal_load_1:
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141 ; SKIP-CACHE-INV: ; %bb.0: ; %entry
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142 ; SKIP-CACHE-INV-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
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143 ; SKIP-CACHE-INV-NEXT: v_lshlrev_b32_e32 v2, 2, v0
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144 ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
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145 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
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146 ; SKIP-CACHE-INV-NEXT: v_add_i32_e32 v2, vcc, s0, v2
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147 ; SKIP-CACHE-INV-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc
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148 ; SKIP-CACHE-INV-NEXT: flat_load_dword v2, v[2:3] glc slc
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149 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
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150 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
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151 ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
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152 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
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153 ; SKIP-CACHE-INV-NEXT: s_endpgm
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154 ;
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155 ; GFX90A-NOTTGSPLIT-LABEL: flat_nontemporal_load_1:
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156 ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
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157 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
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158 ; GFX90A-NOTTGSPLIT-NEXT: v_lshlrev_b32_e32 v2, 2, v0
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159 ; GFX90A-NOTTGSPLIT-NEXT: s_waitcnt lgkmcnt(0)
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160 ; GFX90A-NOTTGSPLIT-NEXT: v_mov_b32_e32 v3, s1
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161 ; GFX90A-NOTTGSPLIT-NEXT: v_add_co_u32_e32 v2, vcc, s0, v2
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162 ; GFX90A-NOTTGSPLIT-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v3, vcc
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163 ; GFX90A-NOTTGSPLIT-NEXT: flat_load_dword v2, v[2:3] glc slc
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164 ; GFX90A-NOTTGSPLIT-NEXT: v_mov_b32_e32 v0, s2
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165 ; GFX90A-NOTTGSPLIT-NEXT: v_mov_b32_e32 v1, s3
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166 ; GFX90A-NOTTGSPLIT-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
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167 ; GFX90A-NOTTGSPLIT-NEXT: flat_store_dword v[0:1], v2
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168 ; GFX90A-NOTTGSPLIT-NEXT: s_endpgm
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169 ;
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170 ; GFX90A-TGSPLIT-LABEL: flat_nontemporal_load_1:
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171 ; GFX90A-TGSPLIT: ; %bb.0: ; %entry
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172 ; GFX90A-TGSPLIT-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
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173 ; GFX90A-TGSPLIT-NEXT: v_lshlrev_b32_e32 v2, 2, v0
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174 ; GFX90A-TGSPLIT-NEXT: s_waitcnt lgkmcnt(0)
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175 ; GFX90A-TGSPLIT-NEXT: v_mov_b32_e32 v3, s1
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176 ; GFX90A-TGSPLIT-NEXT: v_add_co_u32_e32 v2, vcc, s0, v2
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177 ; GFX90A-TGSPLIT-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v3, vcc
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178 ; GFX90A-TGSPLIT-NEXT: flat_load_dword v2, v[2:3] glc slc
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179 ; GFX90A-TGSPLIT-NEXT: v_mov_b32_e32 v0, s2
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180 ; GFX90A-TGSPLIT-NEXT: v_mov_b32_e32 v1, s3
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181 ; GFX90A-TGSPLIT-NEXT: s_waitcnt vmcnt(0)
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182 ; GFX90A-TGSPLIT-NEXT: flat_store_dword v[0:1], v2
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183 ; GFX90A-TGSPLIT-NEXT: s_endpgm
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184 ;
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185 ;
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186 i32* %in, i32* %out) {
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187 entry:
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188 %tid = call i32 @llvm.amdgcn.workitem.id.x()
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189 %val.gep = getelementptr inbounds i32, i32* %in, i32 %tid
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190 %val = load i32, i32* %val.gep, align 4, !nontemporal !0
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191 store i32 %val, i32* %out
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192 ret void
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193 }
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194
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195 define amdgpu_kernel void @flat_nontemporal_store_0(
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196 ; GFX7-LABEL: flat_nontemporal_store_0:
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197 ; GFX7: ; %bb.0: ; %entry
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198 ; GFX7-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
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199 ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
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200 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
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201 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
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202 ; GFX7-NEXT: flat_load_dword v0, v[0:1]
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203 ; GFX7-NEXT: v_mov_b32_e32 v2, s2
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204 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
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205 ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
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206 ; GFX7-NEXT: flat_store_dword v[2:3], v0 glc slc
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207 ; GFX7-NEXT: s_endpgm
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208 ;
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209 ; GFX10-WGP-LABEL: flat_nontemporal_store_0:
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210 ; GFX10-WGP: ; %bb.0: ; %entry
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211 ; GFX10-WGP-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
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212 ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
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213 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
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214 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
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215 ; GFX10-WGP-NEXT: flat_load_dword v2, v[0:1]
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216 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s2
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217 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s3
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218 ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
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219 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 slc
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220 ; GFX10-WGP-NEXT: s_endpgm
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221 ;
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222 ; GFX10-CU-LABEL: flat_nontemporal_store_0:
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223 ; GFX10-CU: ; %bb.0: ; %entry
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224 ; GFX10-CU-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
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225 ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
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226 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
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227 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
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228 ; GFX10-CU-NEXT: flat_load_dword v2, v[0:1]
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229 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s2
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230 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s3
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231 ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
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232 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 slc
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233 ; GFX10-CU-NEXT: s_endpgm
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234 ;
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235 ; SKIP-CACHE-INV-LABEL: flat_nontemporal_store_0:
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236 ; SKIP-CACHE-INV: ; %bb.0: ; %entry
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237 ; SKIP-CACHE-INV-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
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238 ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
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239 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s0
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240 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s1
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241 ; SKIP-CACHE-INV-NEXT: flat_load_dword v0, v[0:1]
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242 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s2
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243 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s3
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244 ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
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245 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[2:3], v0 glc slc
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246 ; SKIP-CACHE-INV-NEXT: s_endpgm
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247 ;
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248 ; GFX90A-NOTTGSPLIT-LABEL: flat_nontemporal_store_0:
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249 ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
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250 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
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251 ; GFX90A-NOTTGSPLIT-NEXT: s_waitcnt lgkmcnt(0)
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252 ; GFX90A-NOTTGSPLIT-NEXT: v_mov_b32_e32 v0, s0
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253 ; GFX90A-NOTTGSPLIT-NEXT: v_mov_b32_e32 v1, s1
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254 ; GFX90A-NOTTGSPLIT-NEXT: flat_load_dword v0, v[0:1]
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255 ; GFX90A-NOTTGSPLIT-NEXT: v_mov_b32_e32 v2, s2
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256 ; GFX90A-NOTTGSPLIT-NEXT: v_mov_b32_e32 v3, s3
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257 ; GFX90A-NOTTGSPLIT-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
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258 ; GFX90A-NOTTGSPLIT-NEXT: flat_store_dword v[2:3], v0 glc slc
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259 ; GFX90A-NOTTGSPLIT-NEXT: s_endpgm
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260 ;
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261 ; GFX90A-TGSPLIT-LABEL: flat_nontemporal_store_0:
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262 ; GFX90A-TGSPLIT: ; %bb.0: ; %entry
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263 ; GFX90A-TGSPLIT-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
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264 ; GFX90A-TGSPLIT-NEXT: s_waitcnt lgkmcnt(0)
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265 ; GFX90A-TGSPLIT-NEXT: v_mov_b32_e32 v0, s0
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266 ; GFX90A-TGSPLIT-NEXT: v_mov_b32_e32 v1, s1
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267 ; GFX90A-TGSPLIT-NEXT: flat_load_dword v0, v[0:1]
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268 ; GFX90A-TGSPLIT-NEXT: v_mov_b32_e32 v2, s2
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269 ; GFX90A-TGSPLIT-NEXT: v_mov_b32_e32 v3, s3
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270 ; GFX90A-TGSPLIT-NEXT: s_waitcnt vmcnt(0)
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271 ; GFX90A-TGSPLIT-NEXT: flat_store_dword v[2:3], v0 glc slc
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272 ; GFX90A-TGSPLIT-NEXT: s_endpgm
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273 ;
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274 ;
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275 i32* %in, i32* %out) {
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276 entry:
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277 %val = load i32, i32* %in, align 4
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278 store i32 %val, i32* %out, !nontemporal !0
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279 ret void
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280 }
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281
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282 define amdgpu_kernel void @flat_nontemporal_store_1(
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283 ; GFX7-LABEL: flat_nontemporal_store_1:
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284 ; GFX7: ; %bb.0: ; %entry
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285 ; GFX7-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
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286 ; GFX7-NEXT: v_lshlrev_b32_e32 v0, 2, v0
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287 ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
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288 ; GFX7-NEXT: v_mov_b32_e32 v1, s0
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289 ; GFX7-NEXT: v_mov_b32_e32 v2, s1
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290 ; GFX7-NEXT: flat_load_dword v2, v[1:2]
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291 ; GFX7-NEXT: v_mov_b32_e32 v1, s3
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292 ; GFX7-NEXT: v_add_i32_e32 v0, vcc, s2, v0
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293 ; GFX7-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc
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294 ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
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295 ; GFX7-NEXT: flat_store_dword v[0:1], v2 glc slc
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296 ; GFX7-NEXT: s_endpgm
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297 ;
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298 ; GFX10-WGP-LABEL: flat_nontemporal_store_1:
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299 ; GFX10-WGP: ; %bb.0: ; %entry
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300 ; GFX10-WGP-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
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301 ; GFX10-WGP-NEXT: v_lshlrev_b32_e32 v0, 2, v0
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302 ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
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303 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s0
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304 ; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s1
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305 ; GFX10-WGP-NEXT: v_add_co_u32 v0, s0, s2, v0
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306 ; GFX10-WGP-NEXT: flat_load_dword v2, v[1:2]
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307 ; GFX10-WGP-NEXT: v_add_co_ci_u32_e64 v1, s0, s3, 0, s0
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|
|
308 ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
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309 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 slc
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|
310 ; GFX10-WGP-NEXT: s_endpgm
|
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|
311 ;
|
|
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312 ; GFX10-CU-LABEL: flat_nontemporal_store_1:
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313 ; GFX10-CU: ; %bb.0: ; %entry
|
|
|
314 ; GFX10-CU-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
|
|
|
315 ; GFX10-CU-NEXT: v_lshlrev_b32_e32 v0, 2, v0
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|
316 ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
|
|
|
317 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s0
|
|
|
318 ; GFX10-CU-NEXT: v_mov_b32_e32 v2, s1
|
|
|
319 ; GFX10-CU-NEXT: v_add_co_u32 v0, s0, s2, v0
|
|
|
320 ; GFX10-CU-NEXT: flat_load_dword v2, v[1:2]
|
|
|
321 ; GFX10-CU-NEXT: v_add_co_ci_u32_e64 v1, s0, s3, 0, s0
|
|
|
322 ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
|
|
|
323 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 slc
|
|
|
324 ; GFX10-CU-NEXT: s_endpgm
|
|
|
325 ;
|
|
|
326 ; SKIP-CACHE-INV-LABEL: flat_nontemporal_store_1:
|
|
|
327 ; SKIP-CACHE-INV: ; %bb.0: ; %entry
|
|
|
328 ; SKIP-CACHE-INV-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
|
|
|
329 ; SKIP-CACHE-INV-NEXT: v_lshlrev_b32_e32 v0, 2, v0
|
|
|
330 ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
|
|
|
331 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s0
|
|
|
332 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s1
|
|
|
333 ; SKIP-CACHE-INV-NEXT: flat_load_dword v2, v[1:2]
|
|
|
334 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
|
|
|
335 ; SKIP-CACHE-INV-NEXT: v_add_i32_e32 v0, vcc, s2, v0
|
|
|
336 ; SKIP-CACHE-INV-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc
|
|
|
337 ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
|
|
|
338 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 glc slc
|
|
|
339 ; SKIP-CACHE-INV-NEXT: s_endpgm
|
|
|
340 ;
|
|
|
341 ; GFX90A-NOTTGSPLIT-LABEL: flat_nontemporal_store_1:
|
|
|
342 ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
|
|
|
343 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
|
|
|
344 ; GFX90A-NOTTGSPLIT-NEXT: v_lshlrev_b32_e32 v0, 2, v0
|
|
|
345 ; GFX90A-NOTTGSPLIT-NEXT: s_waitcnt lgkmcnt(0)
|
|
|
346 ; GFX90A-NOTTGSPLIT-NEXT: v_mov_b32_e32 v2, s0
|
|
|
347 ; GFX90A-NOTTGSPLIT-NEXT: v_mov_b32_e32 v3, s1
|
|
|
348 ; GFX90A-NOTTGSPLIT-NEXT: flat_load_dword v2, v[2:3]
|
|
|
349 ; GFX90A-NOTTGSPLIT-NEXT: v_mov_b32_e32 v1, s3
|
|
|
350 ; GFX90A-NOTTGSPLIT-NEXT: v_add_co_u32_e32 v0, vcc, s2, v0
|
|
|
351 ; GFX90A-NOTTGSPLIT-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc
|
|
|
352 ; GFX90A-NOTTGSPLIT-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
|
|
|
353 ; GFX90A-NOTTGSPLIT-NEXT: flat_store_dword v[0:1], v2 glc slc
|
|
|
354 ; GFX90A-NOTTGSPLIT-NEXT: s_endpgm
|
|
|
355 ;
|
|
|
356 ; GFX90A-TGSPLIT-LABEL: flat_nontemporal_store_1:
|
|
|
357 ; GFX90A-TGSPLIT: ; %bb.0: ; %entry
|
|
|
358 ; GFX90A-TGSPLIT-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
|
|
|
359 ; GFX90A-TGSPLIT-NEXT: v_lshlrev_b32_e32 v0, 2, v0
|
|
|
360 ; GFX90A-TGSPLIT-NEXT: s_waitcnt lgkmcnt(0)
|
|
|
361 ; GFX90A-TGSPLIT-NEXT: v_mov_b32_e32 v2, s0
|
|
|
362 ; GFX90A-TGSPLIT-NEXT: v_mov_b32_e32 v3, s1
|
|
|
363 ; GFX90A-TGSPLIT-NEXT: flat_load_dword v2, v[2:3]
|
|
|
364 ; GFX90A-TGSPLIT-NEXT: v_mov_b32_e32 v1, s3
|
|
|
365 ; GFX90A-TGSPLIT-NEXT: v_add_co_u32_e32 v0, vcc, s2, v0
|
|
|
366 ; GFX90A-TGSPLIT-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc
|
|
|
367 ; GFX90A-TGSPLIT-NEXT: s_waitcnt vmcnt(0)
|
|
|
368 ; GFX90A-TGSPLIT-NEXT: flat_store_dword v[0:1], v2 glc slc
|
|
|
369 ; GFX90A-TGSPLIT-NEXT: s_endpgm
|
|
|
370 ;
|
|
|
371 ;
|
|
|
372 i32* %in, i32* %out) {
|
|
|
373 entry:
|
|
|
374 %tid = call i32 @llvm.amdgcn.workitem.id.x()
|
|
|
375 %val = load i32, i32* %in, align 4
|
|
|
376 %out.gep = getelementptr inbounds i32, i32* %out, i32 %tid
|
|
|
377 store i32 %val, i32* %out.gep, !nontemporal !0
|
|
|
378 ret void
|
|
|
379 }
|
|
|
380
|
|
|
381 !0 = !{i32 1}
|
|
|
382 declare i32 @llvm.amdgcn.workitem.id.x()
|
