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150
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1 // RUN: llvm-tblgen -gen-disassembler -I %p/../../include %s | FileCheck %s
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2
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3 // Check that we don't generate invalid code of the form "( && Cond2)" when
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4 // emitting AssemblerPredicate conditions. In the example below, the invalid
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5 // code would be: "return ( && (Bits & arch::AssemblerCondition2));".
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6
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7 include "llvm/Target/Target.td"
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8
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9 def archInstrInfo : InstrInfo { }
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10
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11 def arch : Target {
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12 let InstructionSet = archInstrInfo;
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13 }
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14
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173
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15 def AssemblerCondition2 : SubtargetFeature<"cond2", "cond2", "true", "">;
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150
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16 def Pred1 : Predicate<"Condition1">;
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17 def Pred2 : Predicate<"Condition2">,
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173
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18 AssemblerPredicate<(all_of AssemblerCondition2)>;
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150
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19
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20 def foo : Instruction {
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21 let Size = 2;
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22 let OutOperandList = (outs);
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23 let InOperandList = (ins);
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24 field bits<16> Inst;
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25 let Inst = 0xAAAA;
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26 let AsmString = "foo";
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27 field bits<16> SoftFail = 0;
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28 // This is the important bit:
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29 let Predicates = [Pred1, Pred2];
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30 }
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31
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32 // CHECK: return (Bits[arch::AssemblerCondition2]);
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