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1 // RUN: llvm-tblgen -gen-global-isel -I %p/../../include -I %p/Common -optimize-match-table=false %s -o %T/context-non-optimized.cpp
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2 // RUN: FileCheck %s --check-prefixes=CHECK_NOPT -input-file=%T/context-non-optimized.cpp
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3 // RUN: llvm-tblgen -gen-global-isel -I %p/../../include -I %p/Common -optimize-match-table=true %s -o %T/context-optimized.cpp
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4 // RUN: FileCheck %s --check-prefixes=CHECK_OPT -input-file=%T/context-optimized.cpp
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5
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6
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7
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8 include "llvm/Target/Target.td"
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9 include "GlobalISelEmitterCommon.td"
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10
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11 def test_atomic_op_frag : PatFrag<(ops node:$ptr, node:$val),
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12 (atomic_swap node:$ptr, node:$val)> {
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13 let GISelPredicateCode = [{ return !MRI.use_nodbg_empty(MI.getOperand(0).getReg()); }];
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14 let IsAtomic = 1;
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15 let MemoryVT = i32;
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16 }
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17
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18 def INSN : I<(outs GPR32:$dst), (ins GPR32Op:$src1, GPR32Op:$src2), []>;
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19
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20 def : Pat<(test_atomic_op_frag GPR32:$ptr, GPR32:$val) ,
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21 (INSN GPR32:$ptr, GPR32:$val)>;
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22
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23 // CHECK_NOPT-LABEL: const int64_t *MyTargetInstructionSelector::getMatchTable() const {
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24 // CHECK_NOPT-NEXT: constexpr static int64_t MatchTable0[] = {
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25 // CHECK_NOPT-NEXT: GIM_Try, /*On fail goto*//*Label 0*/ 46, // Rule ID 0 //
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26 // CHECK_NOPT-NEXT: GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
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27 // CHECK_NOPT-NEXT: GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ATOMICRMW_XCHG,
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28 // CHECK_NOPT-NEXT: GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/4,
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29 // CHECK_NOPT-NEXT: // MIs[0] dst
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30 // CHECK_NOPT-NEXT: GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
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31 // CHECK_NOPT-NEXT: GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/MyTarget::GPR32RegClassID,
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32 // CHECK_NOPT-NEXT: // MIs[0] ptr
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33 // CHECK_NOPT-NEXT: GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
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34 // CHECK_NOPT-NEXT: GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/MyTarget::GPR32RegClassID,
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35 // CHECK_NOPT-NEXT: // MIs[0] val
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36 // CHECK_NOPT-NEXT: GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
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37 // CHECK_NOPT-NEXT: GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/MyTarget::GPR32RegClassID,
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38 // CHECK_NOPT-NEXT: GIM_CheckCxxInsnPredicate, /*MI*/0, /*FnId*/GIPFP_MI_Predicate_test_atomic_op_frag,
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39 // CHECK_NOPT-NEXT: // (atomic_swap:{ *:[i32] } GPR32:{ *:[i32] }:$ptr, GPR32:{ *:[i32] }:$val)<<P:Predicate_test_atomic_op_frag>> => (INSN:{ *:[i32] } GPR32:{ *:[i32] }:$ptr, GPR32:{ *:[i32] }:$val)
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40 // CHECK_NOPT-NEXT: GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/MyTarget::INSN,
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41 // CHECK_NOPT-NEXT: GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
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42 // CHECK_NOPT-NEXT: // GIR_Coverage, 0,
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43 // CHECK_NOPT-NEXT: GIR_Done,
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44 // CHECK_NOPT-NEXT: // Label 0: @46
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45 // CHECK_NOPT-NEXT: GIM_Reject,
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46 // CHECK_NOPT-NEXT: };
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47 // CHECK_NOPT-NEXT: return MatchTable0;
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48 // CHECK_NOPT-NEXT: }
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49 //
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50 //
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51
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52 // CHECK_OPT-LABEL: const int64_t *MyTargetInstructionSelector::getMatchTable() const {
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53 // CHECK_OPT-NEXT: constexpr static int64_t MatchTable0[] = {
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54 // CHECK_OPT-NEXT: GIM_Try, /*On fail goto*//*Label 0*/ 43, // Rule ID 0 //
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55 // CHECK_OPT-NEXT: GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ATOMICRMW_XCHG,
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56 // CHECK_OPT-NEXT: GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
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57 // CHECK_OPT-NEXT: GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
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58 // CHECK_OPT-NEXT: GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/4,
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59 // CHECK_OPT-NEXT: GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/MyTarget::GPR32RegClassID,
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60 // CHECK_OPT-NEXT: // MIs[0] ptr
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61 // CHECK_OPT-NEXT: GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
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62 // CHECK_OPT-NEXT: GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/MyTarget::GPR32RegClassID,
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63 // CHECK_OPT-NEXT: GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/MyTarget::GPR32RegClassID,
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64 // CHECK_OPT-NEXT: GIM_CheckCxxInsnPredicate, /*MI*/0, /*FnId*/GIPFP_MI_Predicate_test_atomic_op_frag,
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65 // CHECK_OPT-NEXT: // (atomic_swap:{ *:[i32] } GPR32:{ *:[i32] }:$ptr, GPR32:{ *:[i32] }:$val)<<P:Predicate_test_atomic_op_frag>> => (INSN:{ *:[i32] } GPR32:{ *:[i32] }:$ptr, GPR32:{ *:[i32] }:$val)
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66 // CHECK_OPT-NEXT: GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/MyTarget::INSN,
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67 // CHECK_OPT-NEXT: GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
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68 // CHECK_OPT-NEXT: // GIR_Coverage, 0,
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69 // CHECK_OPT-NEXT: GIR_Done,
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70 // CHECK_OPT-NEXT: // Label 0: @43
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71 // CHECK_OPT-NEXT: GIM_Reject,
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72 // CHECK_OPT-NEXT: };
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73 // CHECK_OPT-NEXT: return MatchTable0;
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74 // CHECK_OPT-NEXT: }
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