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1 //===- LiveDebugValues.cpp - Tracking Debug Value MIs ---------------------===//
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2 //
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3 // The LLVM Compiler Infrastructure
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4 //
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5 // This file is distributed under the University of Illinois Open Source
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6 // License. See LICENSE.TXT for details.
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7 //
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8 //===----------------------------------------------------------------------===//
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9 ///
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10 /// This pass implements a data flow analysis that propagates debug location
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11 /// information by inserting additional DBG_VALUE instructions into the machine
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12 /// instruction stream. The pass internally builds debug location liveness
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13 /// ranges to determine the points where additional DBG_VALUEs need to be
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14 /// inserted.
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15 ///
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16 /// This is a separate pass from DbgValueHistoryCalculator to facilitate
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17 /// testing and improve modularity.
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18 ///
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19 //===----------------------------------------------------------------------===//
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20
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121
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21 #include "llvm/ADT/DenseMap.h"
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22 #include "llvm/ADT/PostOrderIterator.h"
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23 #include "llvm/ADT/SmallPtrSet.h"
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121
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24 #include "llvm/ADT/SmallVector.h"
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120
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25 #include "llvm/ADT/SparseBitVector.h"
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26 #include "llvm/ADT/Statistic.h"
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27 #include "llvm/ADT/UniqueVector.h"
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28 #include "llvm/CodeGen/LexicalScopes.h"
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121
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29 #include "llvm/CodeGen/MachineBasicBlock.h"
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30 #include "llvm/CodeGen/MachineFrameInfo.h"
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31 #include "llvm/CodeGen/MachineFunction.h"
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32 #include "llvm/CodeGen/MachineFunctionPass.h"
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121
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33 #include "llvm/CodeGen/MachineInstr.h"
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34 #include "llvm/CodeGen/MachineInstrBuilder.h"
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121
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35 #include "llvm/CodeGen/MachineMemOperand.h"
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36 #include "llvm/CodeGen/MachineOperand.h"
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37 #include "llvm/CodeGen/PseudoSourceValue.h"
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134
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38 #include "llvm/CodeGen/TargetFrameLowering.h"
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39 #include "llvm/CodeGen/TargetInstrInfo.h"
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40 #include "llvm/CodeGen/TargetLowering.h"
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41 #include "llvm/CodeGen/TargetRegisterInfo.h"
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42 #include "llvm/CodeGen/TargetSubtargetInfo.h"
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121
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43 #include "llvm/IR/DebugInfoMetadata.h"
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44 #include "llvm/IR/DebugLoc.h"
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45 #include "llvm/IR/Function.h"
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46 #include "llvm/IR/Module.h"
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47 #include "llvm/MC/MCRegisterInfo.h"
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48 #include "llvm/Pass.h"
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49 #include "llvm/Support/Casting.h"
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50 #include "llvm/Support/Compiler.h"
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51 #include "llvm/Support/Debug.h"
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52 #include "llvm/Support/raw_ostream.h"
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121
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53 #include <algorithm>
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54 #include <cassert>
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55 #include <cstdint>
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56 #include <functional>
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57 #include <queue>
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121
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58 #include <utility>
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59 #include <vector>
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60
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61 using namespace llvm;
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62
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63 #define DEBUG_TYPE "livedebugvalues"
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64
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65 STATISTIC(NumInserted, "Number of DBG_VALUE instructions inserted");
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66
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67 // \brief If @MI is a DBG_VALUE with debug value described by a defined
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68 // register, returns the number of this register. In the other case, returns 0.
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69 static unsigned isDbgValueDescribedByReg(const MachineInstr &MI) {
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70 assert(MI.isDebugValue() && "expected a DBG_VALUE");
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71 assert(MI.getNumOperands() == 4 && "malformed DBG_VALUE");
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72 // If location of variable is described using a register (directly
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73 // or indirectly), this register is always a first operand.
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74 return MI.getOperand(0).isReg() ? MI.getOperand(0).getReg() : 0;
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75 }
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76
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77 namespace {
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78
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79 class LiveDebugValues : public MachineFunctionPass {
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80 private:
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81 const TargetRegisterInfo *TRI;
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82 const TargetInstrInfo *TII;
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121
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83 const TargetFrameLowering *TFI;
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120
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84 LexicalScopes LS;
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85
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120
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86 /// Keeps track of lexical scopes associated with a user value's source
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87 /// location.
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88 class UserValueScopes {
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89 DebugLoc DL;
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90 LexicalScopes &LS;
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91 SmallPtrSet<const MachineBasicBlock *, 4> LBlocks;
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92
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93 public:
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94 UserValueScopes(DebugLoc D, LexicalScopes &L) : DL(std::move(D)), LS(L) {}
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95
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96 /// Return true if current scope dominates at least one machine
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97 /// instruction in a given machine basic block.
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98 bool dominates(MachineBasicBlock *MBB) {
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99 if (LBlocks.empty())
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100 LS.getMachineBasicBlocks(DL, LBlocks);
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101 return LBlocks.count(MBB) != 0 || LS.dominates(DL, MBB);
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102 }
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103 };
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104
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105 /// Based on std::pair so it can be used as an index into a DenseMap.
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121
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106 using DebugVariableBase =
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107 std::pair<const DILocalVariable *, const DILocation *>;
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108 /// A potentially inlined instance of a variable.
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120
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109 struct DebugVariable : public DebugVariableBase {
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110 DebugVariable(const DILocalVariable *Var, const DILocation *InlinedAt)
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111 : DebugVariableBase(Var, InlinedAt) {}
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112
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121
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113 const DILocalVariable *getVar() const { return this->first; }
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114 const DILocation *getInlinedAt() const { return this->second; }
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115
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120
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116 bool operator<(const DebugVariable &DV) const {
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117 if (getVar() == DV.getVar())
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118 return getInlinedAt() < DV.getInlinedAt();
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119 return getVar() < DV.getVar();
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120 }
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121 };
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122
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120
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123 /// A pair of debug variable and value location.
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124 struct VarLoc {
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120
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125 const DebugVariable Var;
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126 const MachineInstr &MI; ///< Only used for cloning a new DBG_VALUE.
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127 mutable UserValueScopes UVS;
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121
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128 enum { InvalidKind = 0, RegisterKind } Kind = InvalidKind;
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120
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129
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130 /// The value location. Stored separately to avoid repeatedly
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131 /// extracting it from MI.
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132 union {
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121
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133 uint64_t RegNo;
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120
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134 uint64_t Hash;
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135 } Loc;
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136
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137 VarLoc(const MachineInstr &MI, LexicalScopes &LS)
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138 : Var(MI.getDebugVariable(), MI.getDebugLoc()->getInlinedAt()), MI(MI),
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121
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139 UVS(MI.getDebugLoc(), LS) {
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120
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140 static_assert((sizeof(Loc) == sizeof(uint64_t)),
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141 "hash does not cover all members of Loc");
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142 assert(MI.isDebugValue() && "not a DBG_VALUE");
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143 assert(MI.getNumOperands() == 4 && "malformed DBG_VALUE");
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144 if (int RegNo = isDbgValueDescribedByReg(MI)) {
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145 Kind = RegisterKind;
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121
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146 Loc.RegNo = RegNo;
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120
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147 }
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148 }
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149
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150 /// If this variable is described by a register, return it,
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151 /// otherwise return 0.
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152 unsigned isDescribedByReg() const {
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153 if (Kind == RegisterKind)
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121
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154 return Loc.RegNo;
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120
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155 return 0;
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156 }
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157
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158 /// Determine whether the lexical scope of this value's debug location
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159 /// dominates MBB.
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160 bool dominates(MachineBasicBlock &MBB) const { return UVS.dominates(&MBB); }
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161
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162 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
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163 LLVM_DUMP_METHOD void dump() const { MI.dump(); }
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164 #endif
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165
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166 bool operator==(const VarLoc &Other) const {
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167 return Var == Other.Var && Loc.Hash == Other.Loc.Hash;
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168 }
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169
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170 /// This operator guarantees that VarLocs are sorted by Variable first.
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171 bool operator<(const VarLoc &Other) const {
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172 if (Var == Other.Var)
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173 return Loc.Hash < Other.Loc.Hash;
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174 return Var < Other.Var;
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175 }
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176 };
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177
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178 using VarLocMap = UniqueVector<VarLoc>;
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179 using VarLocSet = SparseBitVector<>;
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180 using VarLocInMBB = SmallDenseMap<const MachineBasicBlock *, VarLocSet>;
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181 struct SpillDebugPair {
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182 MachineInstr *SpillInst;
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183 MachineInstr *DebugInst;
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184 };
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185 using SpillMap = SmallVector<SpillDebugPair, 4>;
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120
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186
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187 /// This holds the working set of currently open ranges. For fast
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188 /// access, this is done both as a set of VarLocIDs, and a map of
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189 /// DebugVariable to recent VarLocID. Note that a DBG_VALUE ends all
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190 /// previous open ranges for the same variable.
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191 class OpenRangesSet {
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192 VarLocSet VarLocs;
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193 SmallDenseMap<DebugVariableBase, unsigned, 8> Vars;
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194
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195 public:
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196 const VarLocSet &getVarLocs() const { return VarLocs; }
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197
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198 /// Terminate all open ranges for Var by removing it from the set.
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199 void erase(DebugVariable Var) {
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200 auto It = Vars.find(Var);
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201 if (It != Vars.end()) {
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202 unsigned ID = It->second;
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203 VarLocs.reset(ID);
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204 Vars.erase(It);
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205 }
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206 }
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207
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120
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208 /// Terminate all open ranges listed in \c KillSet by removing
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209 /// them from the set.
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210 void erase(const VarLocSet &KillSet, const VarLocMap &VarLocIDs) {
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211 VarLocs.intersectWithComplement(KillSet);
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212 for (unsigned ID : KillSet)
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213 Vars.erase(VarLocIDs[ID].Var);
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214 }
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215
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216 /// Insert a new range into the set.
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217 void insert(unsigned VarLocID, DebugVariableBase Var) {
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218 VarLocs.set(VarLocID);
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219 Vars.insert({Var, VarLocID});
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220 }
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221
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222 /// Empty the set.
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223 void clear() {
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224 VarLocs.clear();
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225 Vars.clear();
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226 }
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227
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120
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228 /// Return whether the set is empty or not.
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229 bool empty() const {
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230 assert(Vars.empty() == VarLocs.empty() && "open ranges are inconsistent");
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231 return VarLocs.empty();
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232 }
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233 };
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234
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235 bool isSpillInstruction(const MachineInstr &MI, MachineFunction *MF,
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236 unsigned &Reg);
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237 int extractSpillBaseRegAndOffset(const MachineInstr &MI, unsigned &Reg);
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238
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120
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239 void transferDebugValue(const MachineInstr &MI, OpenRangesSet &OpenRanges,
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240 VarLocMap &VarLocIDs);
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121
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241 void transferSpillInst(MachineInstr &MI, OpenRangesSet &OpenRanges,
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242 VarLocMap &VarLocIDs, SpillMap &Spills);
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120
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243 void transferRegisterDef(MachineInstr &MI, OpenRangesSet &OpenRanges,
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244 const VarLocMap &VarLocIDs);
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245 bool transferTerminatorInst(MachineInstr &MI, OpenRangesSet &OpenRanges,
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246 VarLocInMBB &OutLocs, const VarLocMap &VarLocIDs);
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247 bool transfer(MachineInstr &MI, OpenRangesSet &OpenRanges,
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121
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248 VarLocInMBB &OutLocs, VarLocMap &VarLocIDs, SpillMap &Spills,
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249 bool transferSpills);
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120
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250
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251 bool join(MachineBasicBlock &MBB, VarLocInMBB &OutLocs, VarLocInMBB &InLocs,
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252 const VarLocMap &VarLocIDs,
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253 SmallPtrSet<const MachineBasicBlock *, 16> &Visited);
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254
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255 bool ExtendRanges(MachineFunction &MF);
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256
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257 public:
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258 static char ID;
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259
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260 /// Default construct and initialize the pass.
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261 LiveDebugValues();
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262
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263 /// Tell the pass manager which passes we depend on and what
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264 /// information we preserve.
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265 void getAnalysisUsage(AnalysisUsage &AU) const override;
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266
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120
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267 MachineFunctionProperties getRequiredProperties() const override {
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268 return MachineFunctionProperties().set(
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269 MachineFunctionProperties::Property::NoVRegs);
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270 }
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271
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272 /// Print to ostream with a message.
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120
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273 void printVarLocInMBB(const MachineFunction &MF, const VarLocInMBB &V,
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274 const VarLocMap &VarLocIDs, const char *msg,
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275 raw_ostream &Out) const;
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276
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277 /// Calculate the liveness information for the given machine function.
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278 bool runOnMachineFunction(MachineFunction &MF) override;
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279 };
|
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120
|
280
|
|
121
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281 } // end anonymous namespace
|
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282
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283 //===----------------------------------------------------------------------===//
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284 // Implementation
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285 //===----------------------------------------------------------------------===//
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286
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287 char LiveDebugValues::ID = 0;
|
|
121
|
288
|
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289 char &llvm::LiveDebugValuesID = LiveDebugValues::ID;
|
|
121
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290
|
|
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291 INITIALIZE_PASS(LiveDebugValues, DEBUG_TYPE, "Live DEBUG_VALUE analysis",
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100
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292 false, false)
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293
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294 /// Default construct and initialize the pass.
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295 LiveDebugValues::LiveDebugValues() : MachineFunctionPass(ID) {
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296 initializeLiveDebugValuesPass(*PassRegistry::getPassRegistry());
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297 }
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298
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299 /// Tell the pass manager which passes we depend on and what information we
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300 /// preserve.
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301 void LiveDebugValues::getAnalysisUsage(AnalysisUsage &AU) const {
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120
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302 AU.setPreservesCFG();
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303 MachineFunctionPass::getAnalysisUsage(AU);
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304 }
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305
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306 //===----------------------------------------------------------------------===//
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307 // Debug Range Extension Implementation
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308 //===----------------------------------------------------------------------===//
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309
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|
121
|
310 #ifndef NDEBUG
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120
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311 void LiveDebugValues::printVarLocInMBB(const MachineFunction &MF,
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|
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312 const VarLocInMBB &V,
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313 const VarLocMap &VarLocIDs,
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314 const char *msg,
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315 raw_ostream &Out) const {
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120
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316 Out << '\n' << msg << '\n';
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317 for (const MachineBasicBlock &BB : MF) {
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318 const auto &L = V.lookup(&BB);
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319 Out << "MBB: " << BB.getName() << ":\n";
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320 for (unsigned VLL : L) {
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321 const VarLoc &VL = VarLocIDs[VLL];
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322 Out << " Var: " << VL.Var.getVar()->getName();
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323 Out << " MI: ";
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120
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324 VL.dump();
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325 }
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326 }
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327 Out << "\n";
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328 }
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121
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329 #endif
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330
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331 /// Given a spill instruction, extract the register and offset used to
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332 /// address the spill location in a target independent way.
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333 int LiveDebugValues::extractSpillBaseRegAndOffset(const MachineInstr &MI,
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334 unsigned &Reg) {
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335 assert(MI.hasOneMemOperand() &&
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336 "Spill instruction does not have exactly one memory operand?");
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337 auto MMOI = MI.memoperands_begin();
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338 const PseudoSourceValue *PVal = (*MMOI)->getPseudoValue();
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339 assert(PVal->kind() == PseudoSourceValue::FixedStack &&
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340 "Inconsistent memory operand in spill instruction");
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341 int FI = cast<FixedStackPseudoSourceValue>(PVal)->getFrameIndex();
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342 const MachineBasicBlock *MBB = MI.getParent();
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343 return TFI->getFrameIndexReference(*MBB->getParent(), FI, Reg);
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|
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344 }
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345
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346 /// End all previous ranges related to @MI and start a new range from @MI
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347 /// if it is a DBG_VALUE instr.
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120
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348 void LiveDebugValues::transferDebugValue(const MachineInstr &MI,
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349 OpenRangesSet &OpenRanges,
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350 VarLocMap &VarLocIDs) {
|
100
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351 if (!MI.isDebugValue())
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352 return;
|
|
120
|
353 const DILocalVariable *Var = MI.getDebugVariable();
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|
|
354 const DILocation *DebugLoc = MI.getDebugLoc();
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355 const DILocation *InlinedAt = DebugLoc->getInlinedAt();
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356 assert(Var->isValidLocationForIntrinsic(DebugLoc) &&
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357 "Expected inlined-at fields to agree");
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358
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359 // End all previous ranges of Var.
|
|
120
|
360 DebugVariable V(Var, InlinedAt);
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|
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361 OpenRanges.erase(V);
|
100
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362
|
|
120
|
363 // Add the VarLoc to OpenRanges from this DBG_VALUE.
|
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364 // TODO: Currently handles DBG_VALUE which has only reg as location.
|
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120
|
365 if (isDbgValueDescribedByReg(MI)) {
|
|
|
366 VarLoc VL(MI, LS);
|
|
|
367 unsigned ID = VarLocIDs.insert(VL);
|
|
|
368 OpenRanges.insert(ID, VL.Var);
|
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369 }
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370 }
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Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
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371
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372 /// A definition of a register may mark the end of a range.
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
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|
373 void LiveDebugValues::transferRegisterDef(MachineInstr &MI,
|
|
120
|
374 OpenRangesSet &OpenRanges,
|
|
|
375 const VarLocMap &VarLocIDs) {
|
|
121
|
376 MachineFunction *MF = MI.getMF();
|
|
120
|
377 const TargetLowering *TLI = MF->getSubtarget().getTargetLowering();
|
|
|
378 unsigned SP = TLI->getStackPointerRegisterToSaveRestore();
|
|
|
379 SparseBitVector<> KillSet;
|
100
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380 for (const MachineOperand &MO : MI.operands()) {
|
|
121
|
381 // Determine whether the operand is a register def. Assume that call
|
|
|
382 // instructions never clobber SP, because some backends (e.g., AArch64)
|
|
|
383 // never list SP in the regmask.
|
|
120
|
384 if (MO.isReg() && MO.isDef() && MO.getReg() &&
|
|
121
|
385 TRI->isPhysicalRegister(MO.getReg()) &&
|
|
|
386 !(MI.isCall() && MO.getReg() == SP)) {
|
|
120
|
387 // Remove ranges of all aliased registers.
|
|
|
388 for (MCRegAliasIterator RAI(MO.getReg(), TRI, true); RAI.isValid(); ++RAI)
|
|
|
389 for (unsigned ID : OpenRanges.getVarLocs())
|
|
|
390 if (VarLocIDs[ID].isDescribedByReg() == *RAI)
|
|
|
391 KillSet.set(ID);
|
|
|
392 } else if (MO.isRegMask()) {
|
|
|
393 // Remove ranges of all clobbered registers. Register masks don't usually
|
|
|
394 // list SP as preserved. While the debug info may be off for an
|
|
|
395 // instruction or two around callee-cleanup calls, transferring the
|
|
|
396 // DEBUG_VALUE across the call is still a better user experience.
|
|
|
397 for (unsigned ID : OpenRanges.getVarLocs()) {
|
|
|
398 unsigned Reg = VarLocIDs[ID].isDescribedByReg();
|
|
|
399 if (Reg && Reg != SP && MO.clobbersPhysReg(Reg))
|
|
|
400 KillSet.set(ID);
|
|
|
401 }
|
|
|
402 }
|
100
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
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403 }
|
|
120
|
404 OpenRanges.erase(KillSet, VarLocIDs);
|
100
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
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diff
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|
405 }
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
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|
406
|
|
121
|
407 /// Decide if @MI is a spill instruction and return true if it is. We use 2
|
|
|
408 /// criteria to make this decision:
|
|
|
409 /// - Is this instruction a store to a spill slot?
|
|
|
410 /// - Is there a register operand that is both used and killed?
|
|
|
411 /// TODO: Store optimization can fold spills into other stores (including
|
|
|
412 /// other spills). We do not handle this yet (more than one memory operand).
|
|
|
413 bool LiveDebugValues::isSpillInstruction(const MachineInstr &MI,
|
|
|
414 MachineFunction *MF, unsigned &Reg) {
|
|
|
415 const MachineFrameInfo &FrameInfo = MF->getFrameInfo();
|
|
|
416 int FI;
|
|
|
417 const MachineMemOperand *MMO;
|
|
|
418
|
|
|
419 // TODO: Handle multiple stores folded into one.
|
|
|
420 if (!MI.hasOneMemOperand())
|
|
|
421 return false;
|
|
|
422
|
|
|
423 // To identify a spill instruction, use the same criteria as in AsmPrinter.
|
|
|
424 if (!((TII->isStoreToStackSlotPostFE(MI, FI) ||
|
|
|
425 TII->hasStoreToStackSlot(MI, MMO, FI)) &&
|
|
|
426 FrameInfo.isSpillSlotObjectIndex(FI)))
|
|
|
427 return false;
|
|
|
428
|
|
134
|
429 auto isKilledReg = [&](const MachineOperand MO, unsigned &Reg) {
|
|
|
430 if (!MO.isReg() || !MO.isUse()) {
|
|
|
431 Reg = 0;
|
|
|
432 return false;
|
|
|
433 }
|
|
|
434 Reg = MO.getReg();
|
|
|
435 return MO.isKill();
|
|
|
436 };
|
|
|
437
|
|
121
|
438 for (const MachineOperand &MO : MI.operands()) {
|
|
134
|
439 // In a spill instruction generated by the InlineSpiller the spilled
|
|
|
440 // register has its kill flag set.
|
|
|
441 if (isKilledReg(MO, Reg))
|
|
|
442 return true;
|
|
|
443 if (Reg != 0) {
|
|
|
444 // Check whether next instruction kills the spilled register.
|
|
|
445 // FIXME: Current solution does not cover search for killed register in
|
|
|
446 // bundles and instructions further down the chain.
|
|
|
447 auto NextI = std::next(MI.getIterator());
|
|
|
448 // Skip next instruction that points to basic block end iterator.
|
|
|
449 if (MI.getParent()->end() == NextI)
|
|
|
450 continue;
|
|
|
451 unsigned RegNext;
|
|
|
452 for (const MachineOperand &MONext : NextI->operands()) {
|
|
|
453 // Return true if we came across the register from the
|
|
|
454 // previous spill instruction that is killed in NextI.
|
|
|
455 if (isKilledReg(MONext, RegNext) && RegNext == Reg)
|
|
|
456 return true;
|
|
|
457 }
|
|
121
|
458 }
|
|
|
459 }
|
|
134
|
460 // Return false if we didn't find spilled register.
|
|
|
461 return false;
|
|
121
|
462 }
|
|
|
463
|
|
|
464 /// A spilled register may indicate that we have to end the current range of
|
|
|
465 /// a variable and create a new one for the spill location.
|
|
|
466 /// We don't want to insert any instructions in transfer(), so we just create
|
|
|
467 /// the DBG_VALUE witout inserting it and keep track of it in @Spills.
|
|
|
468 /// It will be inserted into the BB when we're done iterating over the
|
|
|
469 /// instructions.
|
|
|
470 void LiveDebugValues::transferSpillInst(MachineInstr &MI,
|
|
|
471 OpenRangesSet &OpenRanges,
|
|
|
472 VarLocMap &VarLocIDs,
|
|
|
473 SpillMap &Spills) {
|
|
|
474 unsigned Reg;
|
|
|
475 MachineFunction *MF = MI.getMF();
|
|
|
476 if (!isSpillInstruction(MI, MF, Reg))
|
|
|
477 return;
|
|
|
478
|
|
|
479 // Check if the register is the location of a debug value.
|
|
|
480 for (unsigned ID : OpenRanges.getVarLocs()) {
|
|
|
481 if (VarLocIDs[ID].isDescribedByReg() == Reg) {
|
|
134
|
482 DEBUG(dbgs() << "Spilling Register " << printReg(Reg, TRI) << '('
|
|
121
|
483 << VarLocIDs[ID].Var.getVar()->getName() << ")\n");
|
|
|
484
|
|
|
485 // Create a DBG_VALUE instruction to describe the Var in its spilled
|
|
|
486 // location, but don't insert it yet to avoid invalidating the
|
|
|
487 // iterator in our caller.
|
|
|
488 unsigned SpillBase;
|
|
|
489 int SpillOffset = extractSpillBaseRegAndOffset(MI, SpillBase);
|
|
|
490 const MachineInstr *DMI = &VarLocIDs[ID].MI;
|
|
|
491 auto *SpillExpr = DIExpression::prepend(
|
|
|
492 DMI->getDebugExpression(), DIExpression::NoDeref, SpillOffset);
|
|
|
493 MachineInstr *SpDMI =
|
|
|
494 BuildMI(*MF, DMI->getDebugLoc(), DMI->getDesc(), true, SpillBase,
|
|
|
495 DMI->getDebugVariable(), SpillExpr);
|
|
|
496 DEBUG(dbgs() << "Creating DBG_VALUE inst for spill: ";
|
|
|
497 SpDMI->print(dbgs(), false, TII));
|
|
|
498
|
|
|
499 // The newly created DBG_VALUE instruction SpDMI must be inserted after
|
|
|
500 // MI. Keep track of the pairing.
|
|
|
501 SpillDebugPair MIP = {&MI, SpDMI};
|
|
|
502 Spills.push_back(MIP);
|
|
|
503
|
|
|
504 // End all previous ranges of Var.
|
|
|
505 OpenRanges.erase(VarLocIDs[ID].Var);
|
|
|
506
|
|
|
507 // Add the VarLoc to OpenRanges.
|
|
|
508 VarLoc VL(*SpDMI, LS);
|
|
|
509 unsigned SpillLocID = VarLocIDs.insert(VL);
|
|
|
510 OpenRanges.insert(SpillLocID, VL.Var);
|
|
|
511 return;
|
|
|
512 }
|
|
|
513 }
|
|
|
514 }
|
|
|
515
|
100
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
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diff
changeset
|
516 /// Terminate all open ranges at the end of the current basic block.
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
517 bool LiveDebugValues::transferTerminatorInst(MachineInstr &MI,
|
|
120
|
518 OpenRangesSet &OpenRanges,
|
|
|
519 VarLocInMBB &OutLocs,
|
|
|
520 const VarLocMap &VarLocIDs) {
|
100
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
521 bool Changed = false;
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
522 const MachineBasicBlock *CurMBB = MI.getParent();
|
|
134
|
523 if (!(MI.isTerminator() || (&MI == &CurMBB->back())))
|
100
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
524 return false;
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
525
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
526 if (OpenRanges.empty())
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
527 return false;
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
528
|
|
120
|
529 DEBUG(for (unsigned ID : OpenRanges.getVarLocs()) {
|
|
|
530 // Copy OpenRanges to OutLocs, if not already present.
|
|
|
531 dbgs() << "Add to OutLocs: "; VarLocIDs[ID].dump();
|
|
|
532 });
|
|
|
533 VarLocSet &VLS = OutLocs[CurMBB];
|
|
|
534 Changed = VLS |= OpenRanges.getVarLocs();
|
100
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
535 OpenRanges.clear();
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
536 return Changed;
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
537 }
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
538
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
539 /// This routine creates OpenRanges and OutLocs.
|
|
120
|
540 bool LiveDebugValues::transfer(MachineInstr &MI, OpenRangesSet &OpenRanges,
|
|
121
|
541 VarLocInMBB &OutLocs, VarLocMap &VarLocIDs,
|
|
|
542 SpillMap &Spills, bool transferSpills) {
|
100
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
543 bool Changed = false;
|
|
120
|
544 transferDebugValue(MI, OpenRanges, VarLocIDs);
|
|
|
545 transferRegisterDef(MI, OpenRanges, VarLocIDs);
|
|
121
|
546 if (transferSpills)
|
|
|
547 transferSpillInst(MI, OpenRanges, VarLocIDs, Spills);
|
|
120
|
548 Changed = transferTerminatorInst(MI, OpenRanges, OutLocs, VarLocIDs);
|
100
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
549 return Changed;
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
550 }
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
551
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
552 /// This routine joins the analysis results of all incoming edges in @MBB by
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
553 /// inserting a new DBG_VALUE instruction at the start of the @MBB - if the same
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
554 /// source variable in all the predecessors of @MBB reside in the same location.
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
555 bool LiveDebugValues::join(MachineBasicBlock &MBB, VarLocInMBB &OutLocs,
|
|
120
|
556 VarLocInMBB &InLocs, const VarLocMap &VarLocIDs,
|
|
|
557 SmallPtrSet<const MachineBasicBlock *, 16> &Visited) {
|
100
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
558 DEBUG(dbgs() << "join MBB: " << MBB.getName() << "\n");
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
559 bool Changed = false;
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
560
|
|
120
|
561 VarLocSet InLocsT; // Temporary incoming locations.
|
100
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
562
|
|
120
|
563 // For all predecessors of this MBB, find the set of VarLocs that
|
|
|
564 // can be joined.
|
|
|
565 int NumVisited = 0;
|
100
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
566 for (auto p : MBB.predecessors()) {
|
|
120
|
567 // Ignore unvisited predecessor blocks. As we are processing
|
|
|
568 // the blocks in reverse post-order any unvisited block can
|
|
|
569 // be considered to not remove any incoming values.
|
|
|
570 if (!Visited.count(p))
|
|
|
571 continue;
|
100
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
572 auto OL = OutLocs.find(p);
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
573 // Join is null in case of empty OutLocs from any of the pred.
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
574 if (OL == OutLocs.end())
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
575 return false;
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
576
|
|
120
|
577 // Just copy over the Out locs to incoming locs for the first visited
|
|
|
578 // predecessor, and for all other predecessors join the Out locs.
|
|
|
579 if (!NumVisited)
|
100
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
580 InLocsT = OL->second;
|
|
120
|
581 else
|
|
|
582 InLocsT &= OL->second;
|
|
|
583 NumVisited++;
|
100
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
584 }
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
585
|
|
120
|
586 // Filter out DBG_VALUES that are out of scope.
|
|
|
587 VarLocSet KillSet;
|
|
|
588 for (auto ID : InLocsT)
|
|
|
589 if (!VarLocIDs[ID].dominates(MBB))
|
|
|
590 KillSet.set(ID);
|
|
|
591 InLocsT.intersectWithComplement(KillSet);
|
|
|
592
|
|
|
593 // As we are processing blocks in reverse post-order we
|
|
|
594 // should have processed at least one predecessor, unless it
|
|
|
595 // is the entry block which has no predecessor.
|
|
|
596 assert((NumVisited || MBB.pred_empty()) &&
|
|
|
597 "Should have processed at least one predecessor");
|
100
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
598 if (InLocsT.empty())
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
599 return false;
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
600
|
|
120
|
601 VarLocSet &ILS = InLocs[&MBB];
|
100
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
602
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
603 // Insert DBG_VALUE instructions, if not already inserted.
|
|
120
|
604 VarLocSet Diff = InLocsT;
|
|
|
605 Diff.intersectWithComplement(ILS);
|
|
|
606 for (auto ID : Diff) {
|
|
|
607 // This VarLoc is not found in InLocs i.e. it is not yet inserted. So, a
|
|
|
608 // new range is started for the var from the mbb's beginning by inserting
|
|
|
609 // a new DBG_VALUE. transfer() will end this range however appropriate.
|
|
|
610 const VarLoc &DiffIt = VarLocIDs[ID];
|
|
|
611 const MachineInstr *DMI = &DiffIt.MI;
|
|
|
612 MachineInstr *MI =
|
|
|
613 BuildMI(MBB, MBB.instr_begin(), DMI->getDebugLoc(), DMI->getDesc(),
|
|
121
|
614 DMI->isIndirectDebugValue(), DMI->getOperand(0).getReg(),
|
|
120
|
615 DMI->getDebugVariable(), DMI->getDebugExpression());
|
|
|
616 if (DMI->isIndirectDebugValue())
|
|
|
617 MI->getOperand(1).setImm(DMI->getOperand(1).getImm());
|
|
|
618 DEBUG(dbgs() << "Inserted: "; MI->dump(););
|
|
|
619 ILS.set(ID);
|
|
|
620 ++NumInserted;
|
|
|
621 Changed = true;
|
100
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
622 }
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
623 return Changed;
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
624 }
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
625
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
626 /// Calculate the liveness information for the given machine function and
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
627 /// extend ranges across basic blocks.
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
628 bool LiveDebugValues::ExtendRanges(MachineFunction &MF) {
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
629 DEBUG(dbgs() << "\nDebug Range Extension\n");
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
630
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
631 bool Changed = false;
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
632 bool OLChanged = false;
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
633 bool MBBJoined = false;
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
634
|
|
121
|
635 VarLocMap VarLocIDs; // Map VarLoc<>unique ID for use in bitvectors.
|
|
120
|
636 OpenRangesSet OpenRanges; // Ranges that are open until end of bb.
|
|
121
|
637 VarLocInMBB OutLocs; // Ranges that exist beyond bb.
|
|
|
638 VarLocInMBB InLocs; // Ranges that are incoming after joining.
|
|
|
639 SpillMap Spills; // DBG_VALUEs associated with spills.
|
100
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
640
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
641 DenseMap<unsigned int, MachineBasicBlock *> OrderToBB;
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
642 DenseMap<MachineBasicBlock *, unsigned int> BBToOrder;
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
643 std::priority_queue<unsigned int, std::vector<unsigned int>,
|
|
120
|
644 std::greater<unsigned int>>
|
|
|
645 Worklist;
|
100
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
646 std::priority_queue<unsigned int, std::vector<unsigned int>,
|
|
120
|
647 std::greater<unsigned int>>
|
|
|
648 Pending;
|
|
|
649
|
100
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
650 // Initialize every mbb with OutLocs.
|
|
121
|
651 // We are not looking at any spill instructions during the initial pass
|
|
|
652 // over the BBs. The LiveDebugVariables pass has already created DBG_VALUE
|
|
|
653 // instructions for spills of registers that are known to be user variables
|
|
|
654 // within the BB in which the spill occurs.
|
100
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
655 for (auto &MBB : MF)
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
656 for (auto &MI : MBB)
|
|
121
|
657 transfer(MI, OpenRanges, OutLocs, VarLocIDs, Spills,
|
|
|
658 /*transferSpills=*/false);
|
|
120
|
659
|
|
|
660 DEBUG(printVarLocInMBB(MF, OutLocs, VarLocIDs, "OutLocs after initialization",
|
|
|
661 dbgs()));
|
100
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
662
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
663 ReversePostOrderTraversal<MachineFunction *> RPOT(&MF);
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
664 unsigned int RPONumber = 0;
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
665 for (auto RI = RPOT.begin(), RE = RPOT.end(); RI != RE; ++RI) {
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
666 OrderToBB[RPONumber] = *RI;
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
667 BBToOrder[*RI] = RPONumber;
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
668 Worklist.push(RPONumber);
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
669 ++RPONumber;
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
670 }
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
671 // This is a standard "union of predecessor outs" dataflow problem.
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
672 // To solve it, we perform join() and transfer() using the two worklist method
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
673 // until the ranges converge.
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
674 // Ranges have converged when both worklists are empty.
|
|
120
|
675 SmallPtrSet<const MachineBasicBlock *, 16> Visited;
|
100
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
676 while (!Worklist.empty() || !Pending.empty()) {
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
677 // We track what is on the pending worklist to avoid inserting the same
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
678 // thing twice. We could avoid this with a custom priority queue, but this
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
679 // is probably not worth it.
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
680 SmallPtrSet<MachineBasicBlock *, 16> OnPending;
|
|
120
|
681 DEBUG(dbgs() << "Processing Worklist\n");
|
100
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
682 while (!Worklist.empty()) {
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
683 MachineBasicBlock *MBB = OrderToBB[Worklist.top()];
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
684 Worklist.pop();
|
|
120
|
685 MBBJoined = join(*MBB, OutLocs, InLocs, VarLocIDs, Visited);
|
|
|
686 Visited.insert(MBB);
|
100
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
687 if (MBBJoined) {
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
688 MBBJoined = false;
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
689 Changed = true;
|
|
121
|
690 // Now that we have started to extend ranges across BBs we need to
|
|
|
691 // examine spill instructions to see whether they spill registers that
|
|
|
692 // correspond to user variables.
|
100
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
693 for (auto &MI : *MBB)
|
|
121
|
694 OLChanged |= transfer(MI, OpenRanges, OutLocs, VarLocIDs, Spills,
|
|
|
695 /*transferSpills=*/true);
|
|
|
696
|
|
|
697 // Add any DBG_VALUE instructions necessitated by spills.
|
|
|
698 for (auto &SP : Spills)
|
|
|
699 MBB->insertAfter(MachineBasicBlock::iterator(*SP.SpillInst),
|
|
|
700 SP.DebugInst);
|
|
|
701 Spills.clear();
|
|
120
|
702
|
|
|
703 DEBUG(printVarLocInMBB(MF, OutLocs, VarLocIDs,
|
|
|
704 "OutLocs after propagating", dbgs()));
|
|
|
705 DEBUG(printVarLocInMBB(MF, InLocs, VarLocIDs,
|
|
|
706 "InLocs after propagating", dbgs()));
|
100
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
707
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
708 if (OLChanged) {
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
709 OLChanged = false;
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
710 for (auto s : MBB->successors())
|
|
120
|
711 if (OnPending.insert(s).second) {
|
100
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
712 Pending.push(BBToOrder[s]);
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
713 }
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
714 }
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
715 }
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
716 }
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
717 Worklist.swap(Pending);
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
718 // At this point, pending must be empty, since it was just the empty
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
719 // worklist
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
720 assert(Pending.empty() && "Pending should be empty");
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
721 }
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
722
|
|
120
|
723 DEBUG(printVarLocInMBB(MF, OutLocs, VarLocIDs, "Final OutLocs", dbgs()));
|
|
|
724 DEBUG(printVarLocInMBB(MF, InLocs, VarLocIDs, "Final InLocs", dbgs()));
|
100
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
725 return Changed;
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
726 }
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
727
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
728 bool LiveDebugValues::runOnMachineFunction(MachineFunction &MF) {
|
|
134
|
729 if (!MF.getFunction().getSubprogram())
|
|
120
|
730 // LiveDebugValues will already have removed all DBG_VALUEs.
|
|
|
731 return false;
|
|
|
732
|
|
121
|
733 // Skip functions from NoDebug compilation units.
|
|
134
|
734 if (MF.getFunction().getSubprogram()->getUnit()->getEmissionKind() ==
|
|
121
|
735 DICompileUnit::NoDebug)
|
|
|
736 return false;
|
|
|
737
|
100
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
738 TRI = MF.getSubtarget().getRegisterInfo();
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
739 TII = MF.getSubtarget().getInstrInfo();
|
|
121
|
740 TFI = MF.getSubtarget().getFrameLowering();
|
|
120
|
741 LS.initialize(MF);
|
100
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
742
|
|
120
|
743 bool Changed = ExtendRanges(MF);
|
100
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
744 return Changed;
|
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
745 }
|
