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1 //===--- LivePhysRegs.cpp - Live Physical Register Set --------------------===//
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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2 //
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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3 // The LLVM Compiler Infrastructure
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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4 //
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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5 // This file is distributed under the University of Illinois Open Source
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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6 // License. See LICENSE.TXT for details.
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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7 //
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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8 //===----------------------------------------------------------------------===//
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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9 //
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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10 // This file implements the LivePhysRegs utility for tracking liveness of
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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11 // physical registers across machine instructions in forward or backward order.
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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12 // A more detailed description can be found in the corresponding header file.
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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13 //
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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14 //===----------------------------------------------------------------------===//
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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15
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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16 #include "llvm/CodeGen/LivePhysRegs.h"
|
|
95
|
17 #include "llvm/CodeGen/MachineFrameInfo.h"
|
|
|
18 #include "llvm/CodeGen/MachineFunction.h"
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19 #include "llvm/CodeGen/MachineInstrBundle.h"
|
|
120
|
20 #include "llvm/CodeGen/MachineRegisterInfo.h"
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21 #include "llvm/Support/Debug.h"
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|
95
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22 #include "llvm/Support/raw_ostream.h"
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23 using namespace llvm;
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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24
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25
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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26 /// \brief Remove all registers from the set that get clobbered by the register
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27 /// mask.
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95
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28 /// The clobbers set will be the list of live registers clobbered
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29 /// by the regmask.
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|
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30 void LivePhysRegs::removeRegsInMask(const MachineOperand &MO,
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31 SmallVectorImpl<std::pair<unsigned, const MachineOperand*>> *Clobbers) {
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32 SparseSet<unsigned>::iterator LRI = LiveRegs.begin();
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33 while (LRI != LiveRegs.end()) {
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95
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34 if (MO.clobbersPhysReg(*LRI)) {
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35 if (Clobbers)
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36 Clobbers->push_back(std::make_pair(*LRI, &MO));
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37 LRI = LiveRegs.erase(LRI);
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95
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38 } else
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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39 ++LRI;
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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40 }
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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41 }
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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42
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121
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43 /// Remove defined registers and regmask kills from the set.
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|
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44 void LivePhysRegs::removeDefs(const MachineInstr &MI) {
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120
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45 for (ConstMIBundleOperands O(MI); O.isValid(); ++O) {
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46 if (O->isReg()) {
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47 if (!O->isDef())
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48 continue;
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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49 unsigned Reg = O->getReg();
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120
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50 if (!TargetRegisterInfo::isPhysicalRegister(Reg))
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51 continue;
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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52 removeReg(Reg);
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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53 } else if (O->isRegMask())
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121
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54 removeRegsInMask(*O);
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55 }
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121
|
56 }
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57
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121
|
58 /// Add uses to the set.
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|
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59 void LivePhysRegs::addUses(const MachineInstr &MI) {
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120
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60 for (ConstMIBundleOperands O(MI); O.isValid(); ++O) {
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|
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61 if (!O->isReg() || !O->readsReg())
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62 continue;
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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63 unsigned Reg = O->getReg();
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|
120
|
64 if (!TargetRegisterInfo::isPhysicalRegister(Reg))
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65 continue;
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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66 addReg(Reg);
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67 }
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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68 }
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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69
|
|
121
|
70 /// Simulates liveness when stepping backwards over an instruction(bundle):
|
|
|
71 /// Remove Defs, add uses. This is the recommended way of calculating liveness.
|
|
|
72 void LivePhysRegs::stepBackward(const MachineInstr &MI) {
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|
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73 // Remove defined registers and regmask kills from the set.
|
|
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74 removeDefs(MI);
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|
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75
|
|
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76 // Add uses to the set.
|
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|
77 addUses(MI);
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|
|
78 }
|
|
|
79
|
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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80 /// Simulates liveness when stepping forward over an instruction(bundle): Remove
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81 /// killed-uses, add defs. This is the not recommended way, because it depends
|
|
95
|
82 /// on accurate kill flags. If possible use stepBackward() instead of this
|
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83 /// function.
|
|
95
|
84 void LivePhysRegs::stepForward(const MachineInstr &MI,
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|
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85 SmallVectorImpl<std::pair<unsigned, const MachineOperand*>> &Clobbers) {
|
77
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86 // Remove killed registers from the set.
|
|
120
|
87 for (ConstMIBundleOperands O(MI); O.isValid(); ++O) {
|
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88 if (O->isReg()) {
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89 unsigned Reg = O->getReg();
|
|
120
|
90 if (!TargetRegisterInfo::isPhysicalRegister(Reg))
|
77
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91 continue;
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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92 if (O->isDef()) {
|
|
95
|
93 // Note, dead defs are still recorded. The caller should decide how to
|
|
|
94 // handle them.
|
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|
95 Clobbers.push_back(std::make_pair(Reg, &*O));
|
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96 } else {
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|
97 if (!O->isKill())
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|
98 continue;
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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|
99 assert(O->isUse());
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100 removeReg(Reg);
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|
101 }
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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|
102 } else if (O->isRegMask())
|
|
95
|
103 removeRegsInMask(*O, &Clobbers);
|
77
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|
104 }
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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diff
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|
105
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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|
106 // Add defs to the set.
|
|
95
|
107 for (auto Reg : Clobbers) {
|
|
|
108 // Skip dead defs. They shouldn't be added to the set.
|
|
|
109 if (Reg.second->isReg() && Reg.second->isDead())
|
|
|
110 continue;
|
|
|
111 addReg(Reg.first);
|
|
|
112 }
|
77
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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|
113 }
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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|
114
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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|
115 /// Prin the currently live registers to OS.
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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|
116 void LivePhysRegs::print(raw_ostream &OS) const {
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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|
117 OS << "Live Registers:";
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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|
118 if (!TRI) {
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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|
119 OS << " (uninitialized)\n";
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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|
120 return;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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|
121 }
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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|
122
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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|
123 if (empty()) {
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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|
124 OS << " (empty)\n";
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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|
125 return;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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|
126 }
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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|
127
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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|
128 for (const_iterator I = begin(), E = end(); I != E; ++I)
|
|
134
|
129 OS << " " << printReg(*I, TRI);
|
77
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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130 OS << "\n";
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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|
131 }
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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|
132
|
|
121
|
133 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
|
|
120
|
134 LLVM_DUMP_METHOD void LivePhysRegs::dump() const {
|
77
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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135 dbgs() << " " << *this;
|
|
121
|
136 }
|
77
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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137 #endif
|
|
95
|
138
|
|
120
|
139 bool LivePhysRegs::available(const MachineRegisterInfo &MRI,
|
|
|
140 unsigned Reg) const {
|
|
|
141 if (LiveRegs.count(Reg))
|
|
|
142 return false;
|
|
|
143 if (MRI.isReserved(Reg))
|
|
|
144 return false;
|
|
|
145 for (MCRegAliasIterator R(Reg, TRI, false); R.isValid(); ++R) {
|
|
|
146 if (LiveRegs.count(*R))
|
|
|
147 return false;
|
|
|
148 }
|
|
|
149 return true;
|
|
|
150 }
|
|
|
151
|
|
95
|
152 /// Add live-in registers of basic block \p MBB to \p LiveRegs.
|
|
120
|
153 void LivePhysRegs::addBlockLiveIns(const MachineBasicBlock &MBB) {
|
|
|
154 for (const auto &LI : MBB.liveins()) {
|
|
121
|
155 unsigned Reg = LI.PhysReg;
|
|
|
156 LaneBitmask Mask = LI.LaneMask;
|
|
|
157 MCSubRegIndexIterator S(Reg, TRI);
|
|
|
158 assert(Mask.any() && "Invalid livein mask");
|
|
|
159 if (Mask.all() || !S.isValid()) {
|
|
|
160 addReg(Reg);
|
|
120
|
161 continue;
|
|
|
162 }
|
|
121
|
163 for (; S.isValid(); ++S) {
|
|
|
164 unsigned SI = S.getSubRegIndex();
|
|
|
165 if ((Mask & TRI->getSubRegIndexLaneMask(SI)).any())
|
|
120
|
166 addReg(S.getSubReg());
|
|
121
|
167 }
|
|
120
|
168 }
|
|
95
|
169 }
|
|
|
170
|
|
121
|
171 /// Adds all callee saved registers to \p LiveRegs.
|
|
|
172 static void addCalleeSavedRegs(LivePhysRegs &LiveRegs,
|
|
|
173 const MachineFunction &MF) {
|
|
|
174 const MachineRegisterInfo &MRI = MF.getRegInfo();
|
|
|
175 for (const MCPhysReg *CSR = MRI.getCalleeSavedRegs(); CSR && *CSR; ++CSR)
|
|
95
|
176 LiveRegs.addReg(*CSR);
|
|
121
|
177 }
|
|
|
178
|
|
|
179 void LivePhysRegs::addPristines(const MachineFunction &MF) {
|
|
|
180 const MachineFrameInfo &MFI = MF.getFrameInfo();
|
|
|
181 if (!MFI.isCalleeSavedInfoValid())
|
|
|
182 return;
|
|
|
183 /// This function will usually be called on an empty object, handle this
|
|
|
184 /// as a special case.
|
|
|
185 if (empty()) {
|
|
|
186 /// Add all callee saved regs, then remove the ones that are saved and
|
|
|
187 /// restored.
|
|
|
188 addCalleeSavedRegs(*this, MF);
|
|
|
189 /// Remove the ones that are not saved/restored; they are pristine.
|
|
|
190 for (const CalleeSavedInfo &Info : MFI.getCalleeSavedInfo())
|
|
|
191 removeReg(Info.getReg());
|
|
|
192 return;
|
|
|
193 }
|
|
|
194 /// If a callee-saved register that is not pristine is already present
|
|
|
195 /// in the set, we should make sure that it stays in it. Precompute the
|
|
|
196 /// set of pristine registers in a separate object.
|
|
|
197 /// Add all callee saved regs, then remove the ones that are saved+restored.
|
|
|
198 LivePhysRegs Pristine(*TRI);
|
|
|
199 addCalleeSavedRegs(Pristine, MF);
|
|
|
200 /// Remove the ones that are not saved/restored; they are pristine.
|
|
95
|
201 for (const CalleeSavedInfo &Info : MFI.getCalleeSavedInfo())
|
|
121
|
202 Pristine.removeReg(Info.getReg());
|
|
|
203 for (MCPhysReg R : Pristine)
|
|
|
204 addReg(R);
|
|
95
|
205 }
|
|
|
206
|
|
120
|
207 void LivePhysRegs::addLiveOutsNoPristines(const MachineBasicBlock &MBB) {
|
|
134
|
208 // To get the live-outs we simply merge the live-ins of all successors.
|
|
|
209 for (const MachineBasicBlock *Succ : MBB.successors())
|
|
|
210 addBlockLiveIns(*Succ);
|
|
|
211 if (MBB.isReturnBlock()) {
|
|
|
212 // Return blocks are a special case because we currently don't mark up
|
|
|
213 // return instructions completely: specifically, there is no explicit
|
|
|
214 // use for callee-saved registers. So we add all callee saved registers
|
|
|
215 // that are saved and restored (somewhere). This does not include
|
|
|
216 // callee saved registers that are unused and hence not saved and
|
|
|
217 // restored; they are called pristine.
|
|
|
218 // FIXME: PEI should add explicit markings to return instructions
|
|
|
219 // instead of implicitly handling them here.
|
|
121
|
220 const MachineFunction &MF = *MBB.getParent();
|
|
|
221 const MachineFrameInfo &MFI = MF.getFrameInfo();
|
|
|
222 if (MFI.isCalleeSavedInfoValid()) {
|
|
|
223 for (const CalleeSavedInfo &Info : MFI.getCalleeSavedInfo())
|
|
|
224 if (Info.isRestored())
|
|
|
225 addReg(Info.getReg());
|
|
|
226 }
|
|
|
227 }
|
|
120
|
228 }
|
|
|
229
|
|
|
230 void LivePhysRegs::addLiveOuts(const MachineBasicBlock &MBB) {
|
|
|
231 const MachineFunction &MF = *MBB.getParent();
|
|
134
|
232 addPristines(MF);
|
|
|
233 addLiveOutsNoPristines(MBB);
|
|
95
|
234 }
|
|
|
235
|
|
120
|
236 void LivePhysRegs::addLiveIns(const MachineBasicBlock &MBB) {
|
|
|
237 const MachineFunction &MF = *MBB.getParent();
|
|
121
|
238 addPristines(MF);
|
|
120
|
239 addBlockLiveIns(MBB);
|
|
95
|
240 }
|
|
121
|
241
|
|
|
242 void llvm::computeLiveIns(LivePhysRegs &LiveRegs,
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243 const MachineBasicBlock &MBB) {
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244 const MachineFunction &MF = *MBB.getParent();
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245 const MachineRegisterInfo &MRI = MF.getRegInfo();
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246 const TargetRegisterInfo &TRI = *MRI.getTargetRegisterInfo();
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247 LiveRegs.init(TRI);
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248 LiveRegs.addLiveOutsNoPristines(MBB);
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249 for (const MachineInstr &MI : make_range(MBB.rbegin(), MBB.rend()))
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250 LiveRegs.stepBackward(MI);
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251 }
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252
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253 void llvm::addLiveIns(MachineBasicBlock &MBB, const LivePhysRegs &LiveRegs) {
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254 assert(MBB.livein_empty() && "Expected empty live-in list");
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255 const MachineFunction &MF = *MBB.getParent();
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256 const MachineRegisterInfo &MRI = MF.getRegInfo();
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257 const TargetRegisterInfo &TRI = *MRI.getTargetRegisterInfo();
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258 for (MCPhysReg Reg : LiveRegs) {
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259 if (MRI.isReserved(Reg))
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260 continue;
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261 // Skip the register if we are about to add one of its super registers.
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262 bool ContainsSuperReg = false;
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263 for (MCSuperRegIterator SReg(Reg, &TRI); SReg.isValid(); ++SReg) {
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264 if (LiveRegs.contains(*SReg) && !MRI.isReserved(*SReg)) {
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265 ContainsSuperReg = true;
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266 break;
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267 }
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268 }
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269 if (ContainsSuperReg)
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270 continue;
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271 MBB.addLiveIn(Reg);
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272 }
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273 }
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274
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275 void llvm::recomputeLivenessFlags(MachineBasicBlock &MBB) {
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276 const MachineFunction &MF = *MBB.getParent();
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277 const MachineRegisterInfo &MRI = MF.getRegInfo();
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278 const TargetRegisterInfo &TRI = *MRI.getTargetRegisterInfo();
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279
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280 // We walk through the block backwards and start with the live outs.
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281 LivePhysRegs LiveRegs;
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282 LiveRegs.init(TRI);
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283 LiveRegs.addLiveOutsNoPristines(MBB);
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284
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285 for (MachineInstr &MI : make_range(MBB.rbegin(), MBB.rend())) {
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286 // Recompute dead flags.
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287 for (MIBundleOperands MO(MI); MO.isValid(); ++MO) {
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288 if (!MO->isReg() || !MO->isDef() || MO->isDebug())
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289 continue;
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290
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291 unsigned Reg = MO->getReg();
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292 if (Reg == 0)
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293 continue;
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294 assert(TargetRegisterInfo::isPhysicalRegister(Reg));
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295
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296 bool IsNotLive = LiveRegs.available(MRI, Reg);
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297 MO->setIsDead(IsNotLive);
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298 }
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299
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300 // Step backward over defs.
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301 LiveRegs.removeDefs(MI);
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302
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303 // Recompute kill flags.
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304 for (MIBundleOperands MO(MI); MO.isValid(); ++MO) {
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305 if (!MO->isReg() || !MO->readsReg() || MO->isDebug())
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306 continue;
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307
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308 unsigned Reg = MO->getReg();
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309 if (Reg == 0)
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310 continue;
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311 assert(TargetRegisterInfo::isPhysicalRegister(Reg));
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312
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313 bool IsNotLive = LiveRegs.available(MRI, Reg);
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314 MO->setIsKill(IsNotLive);
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315 }
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316
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317 // Complete the stepbackward.
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318 LiveRegs.addUses(MI);
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319 }
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320 }
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321
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322 void llvm::computeAndAddLiveIns(LivePhysRegs &LiveRegs,
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323 MachineBasicBlock &MBB) {
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324 computeLiveIns(LiveRegs, MBB);
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325 addLiveIns(MBB, LiveRegs);
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326 }
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