Mercurial > hg > CbC > CbC_llvm

annotate test/Transforms/InstCombine/cast-mul-select.ll @ 134:3a76565eade5 LLVM5.0.1

Find changesets by keywords (author, files, the commit message), revision number or hash, or revset expression.
update 5.0.1
author mir3636
date Sat, 17 Feb 2018 09:57:20 +0900
parents 95c75e76d11b
children c2174574ed3a
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rev   line source
134
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1 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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2 ; RUN: opt < %s -instcombine -S | FileCheck %s
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3
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4 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32"
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5
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6 define i32 @mul(i32 %x, i32 %y) {
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7 ; CHECK-LABEL: @mul(
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8 ; CHECK-NEXT: [[C:%.*]] = mul i32 [[X:%.*]], [[Y:%.*]]
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9 ; CHECK-NEXT: [[D:%.*]] = and i32 [[C]], 255
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10 ; CHECK-NEXT: ret i32 [[D]]
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11 ;
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12 %A = trunc i32 %x to i8
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13 %B = trunc i32 %y to i8
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14 %C = mul i8 %A, %B
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15 %D = zext i8 %C to i32
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16 ret i32 %D
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17 }
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18
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19 define i32 @select1(i1 %cond, i32 %x, i32 %y, i32 %z) {
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20 ; CHECK-LABEL: @select1(
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21 ; CHECK-NEXT: [[D:%.*]] = add i32 [[X:%.*]], [[Y:%.*]]
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22 ; CHECK-NEXT: [[E:%.*]] = select i1 [[COND:%.*]], i32 [[Z:%.*]], i32 [[D]]
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23 ; CHECK-NEXT: [[F:%.*]] = and i32 [[E]], 255
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24 ; CHECK-NEXT: ret i32 [[F]]
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25 ;
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26 %A = trunc i32 %x to i8
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27 %B = trunc i32 %y to i8
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28 %C = trunc i32 %z to i8
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29 %D = add i8 %A, %B
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30 %E = select i1 %cond, i8 %C, i8 %D
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31 %F = zext i8 %E to i32
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32 ret i32 %F
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33 }
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34
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35 define i8 @select2(i1 %cond, i8 %x, i8 %y, i8 %z) {
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36 ; CHECK-LABEL: @select2(
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37 ; CHECK-NEXT: [[D:%.*]] = add i8 [[X:%.*]], [[Y:%.*]]
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38 ; CHECK-NEXT: [[E:%.*]] = select i1 [[COND:%.*]], i8 [[Z:%.*]], i8 [[D]]
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39 ; CHECK-NEXT: ret i8 [[E]]
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40 ;
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41 %A = zext i8 %x to i32
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42 %B = zext i8 %y to i32
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43 %C = zext i8 %z to i32
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44 %D = add i32 %A, %B
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45 %E = select i1 %cond, i32 %C, i32 %D
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46 %F = trunc i32 %E to i8
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47 ret i8 %F
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48 }
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49
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50 ; The next 3 tests could be handled in instcombine, but evaluating values
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51 ; with multiple uses may be very slow. Let some other pass deal with it.
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52
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53 define i32 @eval_trunc_multi_use_in_one_inst(i32 %x) {
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54 ; CHECK-LABEL: @eval_trunc_multi_use_in_one_inst(
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55 ; CHECK-NEXT: [[Z:%.*]] = zext i32 [[X:%.*]] to i64
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56 ; CHECK-NEXT: [[A:%.*]] = add nuw nsw i64 [[Z]], 15
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57 ; CHECK-NEXT: [[M:%.*]] = mul i64 [[A]], [[A]]
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58 ; CHECK-NEXT: [[T:%.*]] = trunc i64 [[M]] to i32
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59 ; CHECK-NEXT: ret i32 [[T]]
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60 ;
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61 %z = zext i32 %x to i64
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62 %a = add nsw nuw i64 %z, 15
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63 %m = mul i64 %a, %a
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64 %t = trunc i64 %m to i32
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65 ret i32 %t
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66 }
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67
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68 define i32 @eval_zext_multi_use_in_one_inst(i32 %x) {
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69 ; CHECK-LABEL: @eval_zext_multi_use_in_one_inst(
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70 ; CHECK-NEXT: [[T:%.*]] = trunc i32 [[X:%.*]] to i16
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71 ; CHECK-NEXT: [[A:%.*]] = and i16 [[T]], 5
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72 ; CHECK-NEXT: [[M:%.*]] = mul nuw nsw i16 [[A]], [[A]]
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73 ; CHECK-NEXT: [[R:%.*]] = zext i16 [[M]] to i32
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74 ; CHECK-NEXT: ret i32 [[R]]
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75 ;
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76 %t = trunc i32 %x to i16
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77 %a = and i16 %t, 5
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78 %m = mul nuw nsw i16 %a, %a
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79 %r = zext i16 %m to i32
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80 ret i32 %r
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81 }
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82
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83 define i32 @eval_sext_multi_use_in_one_inst(i32 %x) {
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84 ; CHECK-LABEL: @eval_sext_multi_use_in_one_inst(
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85 ; CHECK-NEXT: [[T:%.*]] = trunc i32 [[X:%.*]] to i16
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86 ; CHECK-NEXT: [[A:%.*]] = and i16 [[T]], 14
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87 ; CHECK-NEXT: [[M:%.*]] = mul nuw nsw i16 [[A]], [[A]]
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88 ; CHECK-NEXT: [[O:%.*]] = or i16 [[M]], -32768
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89 ; CHECK-NEXT: [[R:%.*]] = sext i16 [[O]] to i32
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90 ; CHECK-NEXT: ret i32 [[R]]
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91 ;
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92 %t = trunc i32 %x to i16
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93 %a = and i16 %t, 14
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94 %m = mul nuw nsw i16 %a, %a
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95 %o = or i16 %m, 32768
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96 %r = sext i16 %o to i32
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97 ret i32 %r
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98 }
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99
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100 ; If we have a transform to shrink the above 3 cases, make sure it's not
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101 ; also trying to look through multiple uses in this test and crashing.
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102
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103 define void @PR36225(i32 %a, i32 %b) {
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104 ; CHECK-LABEL: @PR36225(
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105 ; CHECK-NEXT: entry:
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106 ; CHECK-NEXT: br label [[WHILE_BODY:%.*]]
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107 ; CHECK: while.body:
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108 ; CHECK-NEXT: br i1 undef, label [[FOR_BODY3_US:%.*]], label [[FOR_BODY3:%.*]]
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109 ; CHECK: for.body3.us:
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110 ; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[B:%.*]], 0
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111 ; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[TOBOOL]], i8 0, i8 4
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112 ; CHECK-NEXT: switch i3 undef, label [[EXIT:%.*]] [
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113 ; CHECK-NEXT: i3 0, label [[FOR_END:%.*]]
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114 ; CHECK-NEXT: i3 -1, label [[FOR_END]]
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115 ; CHECK-NEXT: ]
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116 ; CHECK: for.body3:
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117 ; CHECK-NEXT: switch i3 undef, label [[EXIT]] [
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118 ; CHECK-NEXT: i3 0, label [[FOR_END]]
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119 ; CHECK-NEXT: i3 -1, label [[FOR_END]]
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120 ; CHECK-NEXT: ]
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121 ; CHECK: for.end:
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122 ; CHECK-NEXT: [[H:%.*]] = phi i8 [ [[SPEC_SELECT]], [[FOR_BODY3_US]] ], [ [[SPEC_SELECT]], [[FOR_BODY3_US]] ], [ 0, [[FOR_BODY3]] ], [ 0, [[FOR_BODY3]] ]
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123 ; CHECK-NEXT: [[TMP0:%.*]] = zext i8 [[H]] to i32
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124 ; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], [[A:%.*]]
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125 ; CHECK-NEXT: br i1 [[CMP]], label [[EXIT]], label [[EXIT2:%.*]]
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126 ; CHECK: exit2:
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127 ; CHECK-NEXT: unreachable
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128 ; CHECK: exit:
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129 ; CHECK-NEXT: unreachable
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130 ;
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131 entry:
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132 br label %while.body
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133
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134 while.body:
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135 %tobool = icmp eq i32 %b, 0
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136 br i1 undef, label %for.body3.us, label %for.body3
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137
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138 for.body3.us:
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139 %spec.select = select i1 %tobool, i8 0, i8 4
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140 switch i3 undef, label %exit [
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141 i3 0, label %for.end
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142 i3 -1, label %for.end
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143 ]
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144
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145 for.body3:
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146 switch i3 undef, label %exit [
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147 i3 0, label %for.end
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148 i3 -1, label %for.end
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149 ]
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150
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151 for.end:
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152 %h = phi i8 [ %spec.select, %for.body3.us ], [ %spec.select, %for.body3.us ], [ 0, %for.body3 ], [ 0, %for.body3 ]
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153 %conv = sext i8 %h to i32
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154 %cmp = icmp sgt i32 %a, %conv
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155 br i1 %cmp, label %exit, label %exit2
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156
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157 exit2:
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158 unreachable
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159
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160 exit:
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161 unreachable
3a76565eade5 update 5.0.1
mir3636
parents: 0
diff changeset
162 }
3a76565eade5 update 5.0.1
mir3636
parents: 0
diff changeset
163