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annotate lib/Target/ARM/ARMSelectionDAGInfo.h @ 77:54457678186b LLVM3.6

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LLVM 3.6
author Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
date Mon, 08 Sep 2014 22:06:00 +0900
parents 95c75e76d11b
children afa8332a0e37
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1 //===-- ARMSelectionDAGInfo.h - ARM SelectionDAG Info -----------*- C++ -*-===//
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2 //
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3 // The LLVM Compiler Infrastructure
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4 //
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5 // This file is distributed under the University of Illinois Open Source
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6 // License. See LICENSE.TXT for details.
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7 //
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8 //===----------------------------------------------------------------------===//
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9 //
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10 // This file defines the ARM subclass for TargetSelectionDAGInfo.
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11 //
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12 //===----------------------------------------------------------------------===//
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13
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14 #ifndef LLVM_LIB_TARGET_ARM_ARMSELECTIONDAGINFO_H
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15 #define LLVM_LIB_TARGET_ARM_ARMSELECTIONDAGINFO_H
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16
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17 #include "MCTargetDesc/ARMAddressingModes.h"
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18 #include "llvm/Target/TargetSelectionDAGInfo.h"
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19
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20 namespace llvm {
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21
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22 namespace ARM_AM {
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23 static inline ShiftOpc getShiftOpcForNode(unsigned Opcode) {
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24 switch (Opcode) {
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25 default: return ARM_AM::no_shift;
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26 case ISD::SHL: return ARM_AM::lsl;
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27 case ISD::SRL: return ARM_AM::lsr;
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28 case ISD::SRA: return ARM_AM::asr;
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29 case ISD::ROTR: return ARM_AM::ror;
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30 //case ISD::ROTL: // Only if imm -> turn into ROTR.
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31 // Can't handle RRX here, because it would require folding a flag into
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32 // the addressing mode. :( This causes us to miss certain things.
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33 //case ARMISD::RRX: return ARM_AM::rrx;
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34 }
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35 }
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36 } // end namespace ARM_AM
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37
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38 class ARMSelectionDAGInfo : public TargetSelectionDAGInfo {
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39 public:
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40 explicit ARMSelectionDAGInfo(const DataLayout &DL);
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41 ~ARMSelectionDAGInfo();
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42
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43 SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, SDLoc dl,
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44 SDValue Chain,
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45 SDValue Dst, SDValue Src,
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46 SDValue Size, unsigned Align,
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47 bool isVolatile, bool AlwaysInline,
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48 MachinePointerInfo DstPtrInfo,
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49 MachinePointerInfo SrcPtrInfo) const override;
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50
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51 // Adjust parameters for memset, see RTABI section 4.3.4
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52 SDValue EmitTargetCodeForMemset(SelectionDAG &DAG, SDLoc dl,
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53 SDValue Chain,
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54 SDValue Op1, SDValue Op2,
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55 SDValue Op3, unsigned Align,
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56 bool isVolatile,
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57 MachinePointerInfo DstPtrInfo) const override;
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58 };
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59
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60 }
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61
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62 #endif