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annotate lib/Target/ARM/Thumb1InstrInfo.h @ 77:54457678186b LLVM3.6

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LLVM 3.6
author Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
date Mon, 08 Sep 2014 22:06:00 +0900
parents 95c75e76d11b
children afa8332a0e37
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1 //===-- Thumb1InstrInfo.h - Thumb-1 Instruction Information -----*- C++ -*-===//
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2 //
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3 // The LLVM Compiler Infrastructure
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4 //
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5 // This file is distributed under the University of Illinois Open Source
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6 // License. See LICENSE.TXT for details.
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7 //
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8 //===----------------------------------------------------------------------===//
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9 //
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10 // This file contains the Thumb-1 implementation of the TargetInstrInfo class.
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11 //
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12 //===----------------------------------------------------------------------===//
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14 #ifndef LLVM_LIB_TARGET_ARM_THUMB1INSTRINFO_H
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15 #define LLVM_LIB_TARGET_ARM_THUMB1INSTRINFO_H
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16
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17 #include "ARMBaseInstrInfo.h"
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18 #include "Thumb1RegisterInfo.h"
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19
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20 namespace llvm {
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21 class ARMSubtarget;
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22
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23 class Thumb1InstrInfo : public ARMBaseInstrInfo {
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24 Thumb1RegisterInfo RI;
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25 public:
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26 explicit Thumb1InstrInfo(const ARMSubtarget &STI);
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27
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28 /// getNoopForMachoTarget - Return the noop instruction to use for a noop.
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29 void getNoopForMachoTarget(MCInst &NopInst) const override;
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30
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31 // Return the non-pre/post incrementing version of 'Opc'. Return 0
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32 // if there is not such an opcode.
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33 unsigned getUnindexedOpcode(unsigned Opc) const override;
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34
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35 /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As
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36 /// such, whenever a client has an instance of instruction info, it should
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37 /// always be able to get register info as well (through this method).
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38 ///
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39 const Thumb1RegisterInfo &getRegisterInfo() const override { return RI; }
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40
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41 void copyPhysReg(MachineBasicBlock &MBB,
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42 MachineBasicBlock::iterator I, DebugLoc DL,
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43 unsigned DestReg, unsigned SrcReg,
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44 bool KillSrc) const override;
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45 void storeRegToStackSlot(MachineBasicBlock &MBB,
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46 MachineBasicBlock::iterator MBBI,
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47 unsigned SrcReg, bool isKill, int FrameIndex,
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48 const TargetRegisterClass *RC,
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49 const TargetRegisterInfo *TRI) const override;
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50
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51 void loadRegFromStackSlot(MachineBasicBlock &MBB,
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52 MachineBasicBlock::iterator MBBI,
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53 unsigned DestReg, int FrameIndex,
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54 const TargetRegisterClass *RC,
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55 const TargetRegisterInfo *TRI) const override;
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56
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57 private:
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58 void expandLoadStackGuard(MachineBasicBlock::iterator MI,
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59 Reloc::Model RM) const override;
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60 };
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61 }
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63 #endif