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annotate lib/Target/Mips/Mips16ISelLowering.h @ 77:54457678186b LLVM3.6

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LLVM 3.6
author Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
date Mon, 08 Sep 2014 22:06:00 +0900
parents 95c75e76d11b
children 60c9769439b8
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1 //===-- Mips16ISelLowering.h - Mips16 DAG Lowering Interface ----*- C++ -*-===//
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2 //
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3 // The LLVM Compiler Infrastructure
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4 //
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5 // This file is distributed under the University of Illinois Open Source
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6 // License. See LICENSE.TXT for details.
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7 //
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8 //===----------------------------------------------------------------------===//
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9 //
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10 // Subclass of MipsTargetLowering specialized for mips16.
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11 //
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12 //===----------------------------------------------------------------------===//
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14 #ifndef LLVM_LIB_TARGET_MIPS_MIPS16ISELLOWERING_H
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15 #define LLVM_LIB_TARGET_MIPS_MIPS16ISELLOWERING_H
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16
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17 #include "MipsISelLowering.h"
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18
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19 namespace llvm {
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20 class Mips16TargetLowering : public MipsTargetLowering {
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21 public:
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22 explicit Mips16TargetLowering(MipsTargetMachine &TM,
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23 const MipsSubtarget &STI);
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24
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25 bool allowsMisalignedMemoryAccesses(EVT VT, unsigned AddrSpace,
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26 unsigned Align,
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27 bool *Fast) const override;
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28
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29 MachineBasicBlock *
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30 EmitInstrWithCustomInserter(MachineInstr *MI,
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31 MachineBasicBlock *MBB) const override;
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32
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33 private:
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34 bool isEligibleForTailCallOptimization(const MipsCC &MipsCCInfo,
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35 unsigned NextStackOffset,
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36 const MipsFunctionInfo& FI) const override;
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37
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38 void setMips16HardFloatLibCalls();
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39
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40 unsigned int
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41 getMips16HelperFunctionStubNumber(ArgListTy &Args) const;
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42
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43 const char *getMips16HelperFunction
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44 (Type* RetTy, ArgListTy &Args, bool &needHelper) const;
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45
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46 void
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47 getOpndList(SmallVectorImpl<SDValue> &Ops,
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48 std::deque< std::pair<unsigned, SDValue> > &RegsToPass,
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49 bool IsPICCall, bool GlobalOrExternal, bool InternalLinkage,
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50 CallLoweringInfo &CLI, SDValue Callee,
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51 SDValue Chain) const override;
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52
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53 MachineBasicBlock *emitSel16(unsigned Opc, MachineInstr *MI,
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54 MachineBasicBlock *BB) const;
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55
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56 MachineBasicBlock *emitSeliT16(unsigned Opc1, unsigned Opc2,
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57 MachineInstr *MI,
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58 MachineBasicBlock *BB) const;
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59
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60 MachineBasicBlock *emitSelT16(unsigned Opc1, unsigned Opc2,
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61 MachineInstr *MI,
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62 MachineBasicBlock *BB) const;
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63
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64 MachineBasicBlock *emitFEXT_T8I816_ins(unsigned BtOpc, unsigned CmpOpc,
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65 MachineInstr *MI,
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66 MachineBasicBlock *BB) const;
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67
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68 MachineBasicBlock *emitFEXT_T8I8I16_ins(
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69 unsigned BtOpc, unsigned CmpiOpc, unsigned CmpiXOpc, bool ImmSigned,
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70 MachineInstr *MI, MachineBasicBlock *BB) const;
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71
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72 MachineBasicBlock *emitFEXT_CCRX16_ins(
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73 unsigned SltOpc,
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74 MachineInstr *MI, MachineBasicBlock *BB) const;
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75
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76 MachineBasicBlock *emitFEXT_CCRXI16_ins(
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77 unsigned SltiOpc, unsigned SltiXOpc,
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78 MachineInstr *MI, MachineBasicBlock *BB )const;
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79 };
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80 }
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81
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82 #endif