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1 //===-- MipsAsmPrinter.cpp - Mips LLVM Assembly Printer -------------------===//
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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2 //
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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3 // The LLVM Compiler Infrastructure
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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4 //
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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5 // This file is distributed under the University of Illinois Open Source
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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6 // License. See LICENSE.TXT for details.
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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7 //
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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8 //===----------------------------------------------------------------------===//
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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9 //
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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10 // This file contains a printer that converts from our internal representation
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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11 // of machine-dependent LLVM code to GAS-format MIPS assembly language.
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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12 //
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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13 //===----------------------------------------------------------------------===//
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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14
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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15 #include "InstPrinter/MipsInstPrinter.h"
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16 #include "MCTargetDesc/MipsBaseInfo.h"
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77
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17 #include "MCTargetDesc/MipsMCNaCl.h"
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18 #include "Mips.h"
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19 #include "MipsAsmPrinter.h"
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20 #include "MipsInstrInfo.h"
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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21 #include "MipsMCInstLower.h"
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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22 #include "MipsTargetStreamer.h"
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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23 #include "llvm/ADT/SmallString.h"
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24 #include "llvm/ADT/StringExtras.h"
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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25 #include "llvm/ADT/Twine.h"
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26 #include "llvm/CodeGen/MachineConstantPool.h"
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27 #include "llvm/CodeGen/MachineFrameInfo.h"
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28 #include "llvm/CodeGen/MachineFunctionPass.h"
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29 #include "llvm/CodeGen/MachineInstr.h"
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77
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30 #include "llvm/CodeGen/MachineJumpTableInfo.h"
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31 #include "llvm/CodeGen/MachineMemOperand.h"
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32 #include "llvm/IR/BasicBlock.h"
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33 #include "llvm/IR/DataLayout.h"
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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34 #include "llvm/IR/InlineAsm.h"
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35 #include "llvm/IR/Instructions.h"
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77
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36 #include "llvm/IR/Mangler.h"
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37 #include "llvm/MC/MCAsmInfo.h"
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77
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38 #include "llvm/MC/MCContext.h"
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39 #include "llvm/MC/MCELFStreamer.h"
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77
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40 #include "llvm/MC/MCExpr.h"
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41 #include "llvm/MC/MCInst.h"
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77
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42 #include "llvm/MC/MCSection.h"
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|
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43 #include "llvm/MC/MCSectionELF.h"
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44 #include "llvm/MC/MCSymbol.h"
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45 #include "llvm/Support/ELF.h"
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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46 #include "llvm/Support/TargetRegistry.h"
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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47 #include "llvm/Support/raw_ostream.h"
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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48 #include "llvm/Target/TargetLoweringObjectFile.h"
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49 #include "llvm/Target/TargetOptions.h"
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77
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50 #include <string>
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51
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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52 using namespace llvm;
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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53
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77
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54 #define DEBUG_TYPE "mips-asm-printer"
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55
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56 MipsTargetStreamer &MipsAsmPrinter::getTargetStreamer() {
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77
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57 return static_cast<MipsTargetStreamer &>(*OutStreamer.getTargetStreamer());
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58 }
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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59
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60 bool MipsAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
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77
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61 Subtarget = &TM.getSubtarget<MipsSubtarget>();
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|
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62
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63 // Initialize TargetLoweringObjectFile.
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77
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64 const_cast<TargetLoweringObjectFile &>(getObjFileLowering())
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65 .Initialize(OutContext, TM);
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77
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66
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67 MipsFI = MF.getInfo<MipsFunctionInfo>();
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77
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68 if (Subtarget->inMips16Mode())
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|
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69 for (std::map<
|
|
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70 const char *,
|
|
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71 const llvm::Mips16HardFloatInfo::FuncSignature *>::const_iterator
|
|
|
72 it = MipsFI->StubsNeeded.begin();
|
|
|
73 it != MipsFI->StubsNeeded.end(); ++it) {
|
|
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74 const char *Symbol = it->first;
|
|
|
75 const llvm::Mips16HardFloatInfo::FuncSignature *Signature = it->second;
|
|
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76 if (StubsNeeded.find(Symbol) == StubsNeeded.end())
|
|
|
77 StubsNeeded[Symbol] = Signature;
|
|
|
78 }
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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79 MCP = MF.getConstantPool();
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|
77
|
80
|
|
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81 // In NaCl, all indirect jump targets must be aligned to bundle size.
|
|
|
82 if (Subtarget->isTargetNaCl())
|
|
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83 NaClAlignIndirectJumpTargets(MF);
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|
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84
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85 AsmPrinter::runOnMachineFunction(MF);
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86 return true;
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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87 }
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88
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89 bool MipsAsmPrinter::lowerOperand(const MachineOperand &MO, MCOperand &MCOp) {
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90 MCOp = MCInstLowering.LowerOperand(MO);
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91 return MCOp.isValid();
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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92 }
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93
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94 #include "MipsGenMCPseudoLowering.inc"
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95
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77
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96 // Lower PseudoReturn/PseudoIndirectBranch/PseudoIndirectBranch64 to JR, JR_MM,
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97 // JALR, or JALR64 as appropriate for the target
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98 void MipsAsmPrinter::emitPseudoIndirectBranch(MCStreamer &OutStreamer,
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99 const MachineInstr *MI) {
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100 bool HasLinkReg = false;
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101 MCInst TmpInst0;
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102
|
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103 if (Subtarget->hasMips64r6()) {
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104 // MIPS64r6 should use (JALR64 ZERO_64, $rs)
|
|
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105 TmpInst0.setOpcode(Mips::JALR64);
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106 HasLinkReg = true;
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|
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107 } else if (Subtarget->hasMips32r6()) {
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108 // MIPS32r6 should use (JALR ZERO, $rs)
|
|
|
109 TmpInst0.setOpcode(Mips::JALR);
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110 HasLinkReg = true;
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|
|
111 } else if (Subtarget->inMicroMipsMode())
|
|
|
112 // microMIPS should use (JR_MM $rs)
|
|
|
113 TmpInst0.setOpcode(Mips::JR_MM);
|
|
|
114 else {
|
|
|
115 // Everything else should use (JR $rs)
|
|
|
116 TmpInst0.setOpcode(Mips::JR);
|
|
|
117 }
|
|
|
118
|
|
|
119 MCOperand MCOp;
|
|
|
120
|
|
|
121 if (HasLinkReg) {
|
|
|
122 unsigned ZeroReg = Subtarget->isGP64bit() ? Mips::ZERO_64 : Mips::ZERO;
|
|
|
123 TmpInst0.addOperand(MCOperand::CreateReg(ZeroReg));
|
|
|
124 }
|
|
|
125
|
|
|
126 lowerOperand(MI->getOperand(0), MCOp);
|
|
|
127 TmpInst0.addOperand(MCOp);
|
|
|
128
|
|
|
129 EmitToStreamer(OutStreamer, TmpInst0);
|
|
|
130 }
|
|
|
131
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132 void MipsAsmPrinter::EmitInstruction(const MachineInstr *MI) {
|
|
77
|
133 MipsTargetStreamer &TS = getTargetStreamer();
|
|
|
134 TS.forbidModuleDirective();
|
|
|
135
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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136 if (MI->isDebugValue()) {
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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137 SmallString<128> Str;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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138 raw_svector_ostream OS(Str);
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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|
139
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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140 PrintDebugValueComment(MI, OS);
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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141 return;
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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142 }
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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|
143
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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144 // If we just ended a constant pool, mark it as such.
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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145 if (InConstantPool && MI->getOpcode() != Mips::CONSTPOOL_ENTRY) {
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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|
146 OutStreamer.EmitDataRegion(MCDR_DataRegionEnd);
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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147 InConstantPool = false;
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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|
148 }
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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|
149 if (MI->getOpcode() == Mips::CONSTPOOL_ENTRY) {
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150 // CONSTPOOL_ENTRY - This instruction represents a floating
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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151 //constant pool in the function. The first operand is the ID#
|
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152 // for this instruction, the second is the index into the
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153 // MachineConstantPool that this is, the third is the size in
|
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|
154 // bytes of this constant pool entry.
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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155 // The required alignment is specified on the basic block holding this MI.
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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|
156 //
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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157 unsigned LabelId = (unsigned)MI->getOperand(0).getImm();
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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158 unsigned CPIdx = (unsigned)MI->getOperand(1).getIndex();
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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|
159
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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160 // If this is the first entry of the pool, mark it.
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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diff
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|
161 if (!InConstantPool) {
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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|
162 OutStreamer.EmitDataRegion(MCDR_DataRegion);
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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|
163 InConstantPool = true;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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|
164 }
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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|
165
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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|
166 OutStreamer.EmitLabel(GetCPISymbol(LabelId));
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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diff
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|
167
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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|
168 const MachineConstantPoolEntry &MCPE = MCP->getConstants()[CPIdx];
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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|
169 if (MCPE.isMachineConstantPoolEntry())
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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|
170 EmitMachineConstantPoolValue(MCPE.Val.MachineCPVal);
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
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|
171 else
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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diff
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|
172 EmitGlobalConstant(MCPE.Val.ConstVal);
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
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|
173 return;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
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|
174 }
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
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|
175
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
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|
176
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
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|
177 MachineBasicBlock::const_instr_iterator I = MI;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
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|
178 MachineBasicBlock::const_instr_iterator E = MI->getParent()->instr_end();
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
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|
179
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
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|
180 do {
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
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|
181 // Do any auto-generated pseudo lowerings.
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
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|
182 if (emitPseudoExpansionLowering(OutStreamer, &*I))
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
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|
183 continue;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
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|
184
|
|
77
|
185 if (I->getOpcode() == Mips::PseudoReturn ||
|
|
|
186 I->getOpcode() == Mips::PseudoReturn64 ||
|
|
|
187 I->getOpcode() == Mips::PseudoIndirectBranch ||
|
|
|
188 I->getOpcode() == Mips::PseudoIndirectBranch64) {
|
|
|
189 emitPseudoIndirectBranch(OutStreamer, &*I);
|
|
|
190 continue;
|
|
|
191 }
|
|
|
192
|
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
193 // The inMips16Mode() test is not permanent.
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
194 // Some instructions are marked as pseudo right now which
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
195 // would make the test fail for the wrong reason but
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
196 // that will be fixed soon. We need this here because we are
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
197 // removing another test for this situation downstream in the
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
198 // callchain.
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
199 //
|
|
77
|
200 if (I->isPseudo() && !Subtarget->inMips16Mode()
|
|
|
201 && !isLongBranchPseudo(I->getOpcode()))
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
202 llvm_unreachable("Pseudo opcode found in EmitInstruction()");
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
203
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
204 MCInst TmpInst0;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
205 MCInstLowering.Lower(I, TmpInst0);
|
|
77
|
206 EmitToStreamer(OutStreamer, TmpInst0);
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
207 } while ((++I != E) && I->isInsideBundle()); // Delay slot check
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
208 }
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
209
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
210 //===----------------------------------------------------------------------===//
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
211 //
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
212 // Mips Asm Directives
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
213 //
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
214 // -- Frame directive "frame Stackpointer, Stacksize, RARegister"
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
215 // Describe the stack frame.
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
216 //
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
217 // -- Mask directives "(f)mask bitmask, offset"
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
218 // Tells the assembler which registers are saved and where.
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
219 // bitmask - contain a little endian bitset indicating which registers are
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
220 // saved on function prologue (e.g. with a 0x80000000 mask, the
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
221 // assembler knows the register 31 (RA) is saved at prologue.
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
222 // offset - the position before stack pointer subtraction indicating where
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
223 // the first saved register on prologue is located. (e.g. with a
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
224 //
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
225 // Consider the following function prologue:
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
226 //
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
227 // .frame $fp,48,$ra
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
228 // .mask 0xc0000000,-8
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
229 // addiu $sp, $sp, -48
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
230 // sw $ra, 40($sp)
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
231 // sw $fp, 36($sp)
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
232 //
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
233 // With a 0xc0000000 mask, the assembler knows the register 31 (RA) and
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
234 // 30 (FP) are saved at prologue. As the save order on prologue is from
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
235 // left to right, RA is saved first. A -8 offset means that after the
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
236 // stack pointer subtration, the first register in the mask (RA) will be
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
237 // saved at address 48-8=40.
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
238 //
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
239 //===----------------------------------------------------------------------===//
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
240
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
241 //===----------------------------------------------------------------------===//
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
242 // Mask directives
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
243 //===----------------------------------------------------------------------===//
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
244
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
245 // Create a bitmask with all callee saved registers for CPU or Floating Point
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
246 // registers. For CPU registers consider RA, GP and FP for saving if necessary.
|
|
77
|
247 void MipsAsmPrinter::printSavedRegsBitmask() {
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
248 // CPU and FPU Saved Registers Bitmasks
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
249 unsigned CPUBitmask = 0, FPUBitmask = 0;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
250 int CPUTopSavedRegOff, FPUTopSavedRegOff;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
251
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
252 // Set the CPU and FPU Bitmasks
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
253 const MachineFrameInfo *MFI = MF->getFrameInfo();
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
254 const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
255 // size of stack area to which FP callee-saved regs are saved.
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
256 unsigned CPURegSize = Mips::GPR32RegClass.getSize();
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
257 unsigned FGR32RegSize = Mips::FGR32RegClass.getSize();
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
258 unsigned AFGR64RegSize = Mips::AFGR64RegClass.getSize();
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
259 bool HasAFGR64Reg = false;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
260 unsigned CSFPRegsSize = 0;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
261 unsigned i, e = CSI.size();
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
262
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
263 // Set FPU Bitmask.
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
264 for (i = 0; i != e; ++i) {
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
265 unsigned Reg = CSI[i].getReg();
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
266 if (Mips::GPR32RegClass.contains(Reg))
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
267 break;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
268
|
|
77
|
269 unsigned RegNum =
|
|
|
270 TM.getSubtargetImpl()->getRegisterInfo()->getEncodingValue(Reg);
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
271 if (Mips::AFGR64RegClass.contains(Reg)) {
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
272 FPUBitmask |= (3 << RegNum);
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
273 CSFPRegsSize += AFGR64RegSize;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
274 HasAFGR64Reg = true;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
275 continue;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
276 }
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
277
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
278 FPUBitmask |= (1 << RegNum);
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
279 CSFPRegsSize += FGR32RegSize;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
280 }
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
281
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
282 // Set CPU Bitmask.
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
283 for (; i != e; ++i) {
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
284 unsigned Reg = CSI[i].getReg();
|
|
77
|
285 unsigned RegNum =
|
|
|
286 TM.getSubtargetImpl()->getRegisterInfo()->getEncodingValue(Reg);
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
287 CPUBitmask |= (1 << RegNum);
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
288 }
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
289
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
290 // FP Regs are saved right below where the virtual frame pointer points to.
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
291 FPUTopSavedRegOff = FPUBitmask ?
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
292 (HasAFGR64Reg ? -AFGR64RegSize : -FGR32RegSize) : 0;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
293
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
294 // CPU Regs are saved below FP Regs.
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
295 CPUTopSavedRegOff = CPUBitmask ? -CSFPRegsSize - CPURegSize : 0;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
296
|
|
77
|
297 MipsTargetStreamer &TS = getTargetStreamer();
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
298 // Print CPUBitmask
|
|
77
|
299 TS.emitMask(CPUBitmask, CPUTopSavedRegOff);
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
300
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
301 // Print FPUBitmask
|
|
77
|
302 TS.emitFMask(FPUBitmask, FPUTopSavedRegOff);
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
303 }
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
304
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
305 //===----------------------------------------------------------------------===//
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
306 // Frame and Set directives
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
307 //===----------------------------------------------------------------------===//
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
308
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
309 /// Frame Directive
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
310 void MipsAsmPrinter::emitFrameDirective() {
|
|
77
|
311 const TargetRegisterInfo &RI = *TM.getSubtargetImpl()->getRegisterInfo();
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
312
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
313 unsigned stackReg = RI.getFrameRegister(*MF);
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
314 unsigned returnReg = RI.getRARegister();
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
315 unsigned stackSize = MF->getFrameInfo()->getStackSize();
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
316
|
|
77
|
317 getTargetStreamer().emitFrame(stackReg, stackSize, returnReg);
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
318 }
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
319
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
320 /// Emit Set directives.
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
321 const char *MipsAsmPrinter::getCurrentABIString() const {
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
322 switch (Subtarget->getTargetABI()) {
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
323 case MipsSubtarget::O32: return "abi32";
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
324 case MipsSubtarget::N32: return "abiN32";
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
325 case MipsSubtarget::N64: return "abi64";
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
326 case MipsSubtarget::EABI: return "eabi32"; // TODO: handle eabi64
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
327 default: llvm_unreachable("Unknown Mips ABI");
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
328 }
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
329 }
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
330
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
331 void MipsAsmPrinter::EmitFunctionEntryLabel() {
|
|
77
|
332 MipsTargetStreamer &TS = getTargetStreamer();
|
|
|
333
|
|
|
334 // NaCl sandboxing requires that indirect call instructions are masked.
|
|
|
335 // This means that function entry points should be bundle-aligned.
|
|
|
336 if (Subtarget->isTargetNaCl())
|
|
|
337 EmitAlignment(std::max(MF->getAlignment(), MIPS_NACL_BUNDLE_ALIGN));
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
338
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
339 if (Subtarget->inMicroMipsMode())
|
|
77
|
340 TS.emitDirectiveSetMicroMips();
|
|
|
341 else
|
|
|
342 TS.emitDirectiveSetNoMicroMips();
|
|
|
343
|
|
|
344 if (Subtarget->inMips16Mode())
|
|
|
345 TS.emitDirectiveSetMips16();
|
|
|
346 else
|
|
|
347 TS.emitDirectiveSetNoMips16();
|
|
|
348
|
|
|
349 TS.emitDirectiveEnt(*CurrentFnSym);
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
350 OutStreamer.EmitLabel(CurrentFnSym);
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
351 }
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
352
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
353 /// EmitFunctionBodyStart - Targets can override this to emit stuff before
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
354 /// the first basic block in the function.
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
355 void MipsAsmPrinter::EmitFunctionBodyStart() {
|
|
77
|
356 MipsTargetStreamer &TS = getTargetStreamer();
|
|
|
357
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
358 MCInstLowering.Initialize(&MF->getContext());
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
359
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
360 bool IsNakedFunction =
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
361 MF->getFunction()->
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
362 getAttributes().hasAttribute(AttributeSet::FunctionIndex,
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
363 Attribute::Naked);
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
364 if (!IsNakedFunction)
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
365 emitFrameDirective();
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
366
|
|
77
|
367 if (!IsNakedFunction)
|
|
|
368 printSavedRegsBitmask();
|
|
|
369
|
|
|
370 if (!Subtarget->inMips16Mode()) {
|
|
|
371 TS.emitDirectiveSetNoReorder();
|
|
|
372 TS.emitDirectiveSetNoMacro();
|
|
|
373 TS.emitDirectiveSetNoAt();
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
374 }
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
375 }
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
376
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
377 /// EmitFunctionBodyEnd - Targets can override this to emit stuff after
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
378 /// the last basic block in the function.
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
379 void MipsAsmPrinter::EmitFunctionBodyEnd() {
|
|
77
|
380 MipsTargetStreamer &TS = getTargetStreamer();
|
|
|
381
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
382 // There are instruction for this macros, but they must
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
383 // always be at the function end, and we can't emit and
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
384 // break with BB logic.
|
|
77
|
385 if (!Subtarget->inMips16Mode()) {
|
|
|
386 TS.emitDirectiveSetAt();
|
|
|
387 TS.emitDirectiveSetMacro();
|
|
|
388 TS.emitDirectiveSetReorder();
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
389 }
|
|
77
|
390 TS.emitDirectiveEnd(CurrentFnSym->getName());
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
391 // Make sure to terminate any constant pools that were at the end
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
392 // of the function.
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
393 if (!InConstantPool)
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
394 return;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
395 InConstantPool = false;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
396 OutStreamer.EmitDataRegion(MCDR_DataRegionEnd);
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
397 }
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
398
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
399 /// isBlockOnlyReachableByFallthough - Return true if the basic block has
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
400 /// exactly one predecessor and the control transfer mechanism between
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
401 /// the predecessor and this block is a fall-through.
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
402 bool MipsAsmPrinter::isBlockOnlyReachableByFallthrough(const MachineBasicBlock*
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
403 MBB) const {
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
404 // The predecessor has to be immediately before this block.
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
405 const MachineBasicBlock *Pred = *MBB->pred_begin();
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
406
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
407 // If the predecessor is a switch statement, assume a jump table
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
408 // implementation, so it is not a fall through.
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
409 if (const BasicBlock *bb = Pred->getBasicBlock())
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
410 if (isa<SwitchInst>(bb->getTerminator()))
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
411 return false;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
412
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
413 // If this is a landing pad, it isn't a fall through. If it has no preds,
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
414 // then nothing falls through to it.
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
415 if (MBB->isLandingPad() || MBB->pred_empty())
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
416 return false;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
417
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
418 // If there isn't exactly one predecessor, it can't be a fall through.
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
419 MachineBasicBlock::const_pred_iterator PI = MBB->pred_begin(), PI2 = PI;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
420 ++PI2;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
421
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
422 if (PI2 != MBB->pred_end())
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
423 return false;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
424
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
425 // The predecessor has to be immediately before this block.
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
426 if (!Pred->isLayoutSuccessor(MBB))
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
427 return false;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
428
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
429 // If the block is completely empty, then it definitely does fall through.
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
430 if (Pred->empty())
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
431 return true;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
432
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
433 // Otherwise, check the last instruction.
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
434 // Check if the last terminator is an unconditional branch.
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
435 MachineBasicBlock::const_iterator I = Pred->end();
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
436 while (I != Pred->begin() && !(--I)->isTerminator()) ;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
437
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
438 return !I->isBarrier();
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
439 }
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
440
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
441 // Print out an operand for an inline asm expression.
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
442 bool MipsAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum,
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
443 unsigned AsmVariant,const char *ExtraCode,
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
444 raw_ostream &O) {
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
445 // Does this asm operand have a single letter operand modifier?
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
446 if (ExtraCode && ExtraCode[0]) {
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
447 if (ExtraCode[1] != 0) return true; // Unknown modifier.
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
448
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
449 const MachineOperand &MO = MI->getOperand(OpNum);
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
450 switch (ExtraCode[0]) {
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
451 default:
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
452 // See if this is a generic print operand
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
453 return AsmPrinter::PrintAsmOperand(MI,OpNum,AsmVariant,ExtraCode,O);
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
454 case 'X': // hex const int
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
455 if ((MO.getType()) != MachineOperand::MO_Immediate)
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
456 return true;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
457 O << "0x" << StringRef(utohexstr(MO.getImm())).lower();
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
458 return false;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
459 case 'x': // hex const int (low 16 bits)
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
460 if ((MO.getType()) != MachineOperand::MO_Immediate)
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
461 return true;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
462 O << "0x" << StringRef(utohexstr(MO.getImm() & 0xffff)).lower();
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
463 return false;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
464 case 'd': // decimal const int
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
465 if ((MO.getType()) != MachineOperand::MO_Immediate)
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
466 return true;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
467 O << MO.getImm();
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
468 return false;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
469 case 'm': // decimal const int minus 1
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
470 if ((MO.getType()) != MachineOperand::MO_Immediate)
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
471 return true;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
472 O << MO.getImm() - 1;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
473 return false;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
474 case 'z': {
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
475 // $0 if zero, regular printing otherwise
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
476 if (MO.getType() != MachineOperand::MO_Immediate)
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
477 return true;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
478 int64_t Val = MO.getImm();
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
479 if (Val)
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
480 O << Val;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
481 else
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
482 O << "$0";
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
483 return false;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
484 }
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
485 case 'D': // Second part of a double word register operand
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
486 case 'L': // Low order register of a double word register operand
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
487 case 'M': // High order register of a double word register operand
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
488 {
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
489 if (OpNum == 0)
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
490 return true;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
491 const MachineOperand &FlagsOP = MI->getOperand(OpNum - 1);
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
492 if (!FlagsOP.isImm())
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
493 return true;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
494 unsigned Flags = FlagsOP.getImm();
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
495 unsigned NumVals = InlineAsm::getNumOperandRegisters(Flags);
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
496 // Number of registers represented by this operand. We are looking
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
497 // for 2 for 32 bit mode and 1 for 64 bit mode.
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
498 if (NumVals != 2) {
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
499 if (Subtarget->isGP64bit() && NumVals == 1 && MO.isReg()) {
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
500 unsigned Reg = MO.getReg();
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
501 O << '$' << MipsInstPrinter::getRegisterName(Reg);
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
502 return false;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
503 }
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
504 return true;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
505 }
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
506
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
507 unsigned RegOp = OpNum;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
508 if (!Subtarget->isGP64bit()){
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
509 // Endianess reverses which register holds the high or low value
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
510 // between M and L.
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
511 switch(ExtraCode[0]) {
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
512 case 'M':
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
513 RegOp = (Subtarget->isLittle()) ? OpNum + 1 : OpNum;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
514 break;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
515 case 'L':
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
516 RegOp = (Subtarget->isLittle()) ? OpNum : OpNum + 1;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
517 break;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
518 case 'D': // Always the second part
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
519 RegOp = OpNum + 1;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
520 }
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
521 if (RegOp >= MI->getNumOperands())
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
522 return true;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
523 const MachineOperand &MO = MI->getOperand(RegOp);
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
524 if (!MO.isReg())
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
525 return true;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
526 unsigned Reg = MO.getReg();
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
527 O << '$' << MipsInstPrinter::getRegisterName(Reg);
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
528 return false;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
529 }
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
530 }
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
531 case 'w':
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
532 // Print MSA registers for the 'f' constraint
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
533 // In LLVM, the 'w' modifier doesn't need to do anything.
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
534 // We can just call printOperand as normal.
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
535 break;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
536 }
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
537 }
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
538
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
539 printOperand(MI, OpNum, O);
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
540 return false;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
541 }
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
542
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
543 bool MipsAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
544 unsigned OpNum, unsigned AsmVariant,
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
545 const char *ExtraCode,
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
546 raw_ostream &O) {
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
547 int Offset = 0;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
548 // Currently we are expecting either no ExtraCode or 'D'
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
549 if (ExtraCode) {
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
550 if (ExtraCode[0] == 'D')
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
551 Offset = 4;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
552 else
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
553 return true; // Unknown modifier.
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
554 }
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
555
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
556 const MachineOperand &MO = MI->getOperand(OpNum);
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
557 assert(MO.isReg() && "unexpected inline asm memory operand");
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
558 O << Offset << "($" << MipsInstPrinter::getRegisterName(MO.getReg()) << ")";
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
559
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
560 return false;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
561 }
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
562
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
563 void MipsAsmPrinter::printOperand(const MachineInstr *MI, int opNum,
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
564 raw_ostream &O) {
|
|
77
|
565 const DataLayout *DL = TM.getSubtargetImpl()->getDataLayout();
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
566 const MachineOperand &MO = MI->getOperand(opNum);
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
567 bool closeP = false;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
568
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
569 if (MO.getTargetFlags())
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
570 closeP = true;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
571
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
572 switch(MO.getTargetFlags()) {
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
573 case MipsII::MO_GPREL: O << "%gp_rel("; break;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
574 case MipsII::MO_GOT_CALL: O << "%call16("; break;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
575 case MipsII::MO_GOT: O << "%got("; break;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
576 case MipsII::MO_ABS_HI: O << "%hi("; break;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
577 case MipsII::MO_ABS_LO: O << "%lo("; break;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
578 case MipsII::MO_TLSGD: O << "%tlsgd("; break;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
579 case MipsII::MO_GOTTPREL: O << "%gottprel("; break;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
580 case MipsII::MO_TPREL_HI: O << "%tprel_hi("; break;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
581 case MipsII::MO_TPREL_LO: O << "%tprel_lo("; break;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
582 case MipsII::MO_GPOFF_HI: O << "%hi(%neg(%gp_rel("; break;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
583 case MipsII::MO_GPOFF_LO: O << "%lo(%neg(%gp_rel("; break;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
584 case MipsII::MO_GOT_DISP: O << "%got_disp("; break;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
585 case MipsII::MO_GOT_PAGE: O << "%got_page("; break;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
586 case MipsII::MO_GOT_OFST: O << "%got_ofst("; break;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
587 }
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
588
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
589 switch (MO.getType()) {
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
590 case MachineOperand::MO_Register:
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
591 O << '$'
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
592 << StringRef(MipsInstPrinter::getRegisterName(MO.getReg())).lower();
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
593 break;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
594
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
595 case MachineOperand::MO_Immediate:
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
596 O << MO.getImm();
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
597 break;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
598
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
599 case MachineOperand::MO_MachineBasicBlock:
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
600 O << *MO.getMBB()->getSymbol();
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
601 return;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
602
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
603 case MachineOperand::MO_GlobalAddress:
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
604 O << *getSymbol(MO.getGlobal());
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
605 break;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
606
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
607 case MachineOperand::MO_BlockAddress: {
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
608 MCSymbol *BA = GetBlockAddressSymbol(MO.getBlockAddress());
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
609 O << BA->getName();
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
610 break;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
611 }
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
612
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
613 case MachineOperand::MO_ConstantPoolIndex:
|
|
77
|
614 O << DL->getPrivateGlobalPrefix() << "CPI"
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
615 << getFunctionNumber() << "_" << MO.getIndex();
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
616 if (MO.getOffset())
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
617 O << "+" << MO.getOffset();
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
618 break;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
619
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
620 default:
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
621 llvm_unreachable("<unknown operand type>");
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
622 }
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
623
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
624 if (closeP) O << ")";
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
625 }
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
626
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
627 void MipsAsmPrinter::printUnsignedImm(const MachineInstr *MI, int opNum,
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
628 raw_ostream &O) {
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
629 const MachineOperand &MO = MI->getOperand(opNum);
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
630 if (MO.isImm())
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
631 O << (unsigned short int)MO.getImm();
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
632 else
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
633 printOperand(MI, opNum, O);
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
634 }
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
635
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
636 void MipsAsmPrinter::printUnsignedImm8(const MachineInstr *MI, int opNum,
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
637 raw_ostream &O) {
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
638 const MachineOperand &MO = MI->getOperand(opNum);
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
639 if (MO.isImm())
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
640 O << (unsigned short int)(unsigned char)MO.getImm();
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
641 else
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
642 printOperand(MI, opNum, O);
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
643 }
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
644
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
645 void MipsAsmPrinter::
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
646 printMemOperand(const MachineInstr *MI, int opNum, raw_ostream &O) {
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
647 // Load/Store memory operands -- imm($reg)
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
648 // If PIC target the target is loaded as the
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
649 // pattern lw $25,%call16($28)
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
650 printOperand(MI, opNum+1, O);
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
651 O << "(";
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
652 printOperand(MI, opNum, O);
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
653 O << ")";
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
654 }
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
655
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
656 void MipsAsmPrinter::
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
657 printMemOperandEA(const MachineInstr *MI, int opNum, raw_ostream &O) {
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
658 // when using stack locations for not load/store instructions
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
659 // print the same way as all normal 3 operand instructions.
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
660 printOperand(MI, opNum, O);
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
661 O << ", ";
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
662 printOperand(MI, opNum+1, O);
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
663 return;
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
664 }
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
665
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
666 void MipsAsmPrinter::
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
667 printFCCOperand(const MachineInstr *MI, int opNum, raw_ostream &O,
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
668 const char *Modifier) {
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
669 const MachineOperand &MO = MI->getOperand(opNum);
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
670 O << Mips::MipsFCCToString((Mips::CondCode)MO.getImm());
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
671 }
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
672
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
673 void MipsAsmPrinter::EmitStartOfAsmFile(Module &M) {
|
|
77
|
674 bool IsABICalls = Subtarget->isABICalls();
|
|
|
675 if (IsABICalls) {
|
|
|
676 getTargetStreamer().emitDirectiveAbiCalls();
|
|
|
677 Reloc::Model RM = TM.getRelocationModel();
|
|
|
678 // FIXME: This condition should be a lot more complicated that it is here.
|
|
|
679 // Ideally it should test for properties of the ABI and not the ABI
|
|
|
680 // itself.
|
|
|
681 // For the moment, I'm only correcting enough to make MIPS-IV work.
|
|
|
682 if (RM == Reloc::Static && !Subtarget->isABI_N64())
|
|
|
683 getTargetStreamer().emitDirectiveOptionPic0();
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
684 }
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
685
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
686 // Tell the assembler which ABI we are using
|
|
77
|
687 std::string SectionName = std::string(".mdebug.") + getCurrentABIString();
|
|
|
688 OutStreamer.SwitchSection(OutContext.getELFSection(
|
|
|
689 SectionName, ELF::SHT_PROGBITS, 0, SectionKind::getDataRel()));
|
|
|
690
|
|
|
691 // NaN: At the moment we only support:
|
|
|
692 // 1. .nan legacy (default)
|
|
|
693 // 2. .nan 2008
|
|
|
694 Subtarget->isNaN2008() ? getTargetStreamer().emitDirectiveNaN2008()
|
|
|
695 : getTargetStreamer().emitDirectiveNaNLegacy();
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
696
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
697 // TODO: handle O64 ABI
|
|
77
|
698
|
|
|
699 if (Subtarget->isABI_EABI()) {
|
|
|
700 if (Subtarget->isGP32bit())
|
|
|
701 OutStreamer.SwitchSection(
|
|
|
702 OutContext.getELFSection(".gcc_compiled_long32", ELF::SHT_PROGBITS, 0,
|
|
|
703 SectionKind::getDataRel()));
|
|
|
704 else
|
|
|
705 OutStreamer.SwitchSection(
|
|
|
706 OutContext.getELFSection(".gcc_compiled_long64", ELF::SHT_PROGBITS, 0,
|
|
|
707 SectionKind::getDataRel()));
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
708 }
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
709
|
|
77
|
710 getTargetStreamer().updateABIInfo(*Subtarget);
|
|
|
711
|
|
|
712 // We should always emit a '.module fp=...' but binutils 2.24 does not accept
|
|
|
713 // it. We therefore emit it when it contradicts the ABI defaults (-mfpxx or
|
|
|
714 // -mfp64) and omit it otherwise.
|
|
|
715 if (Subtarget->isABI_O32() && (Subtarget->isABI_FPXX() ||
|
|
|
716 Subtarget->isFP64bit()))
|
|
|
717 getTargetStreamer().emitDirectiveModuleFP();
|
|
|
718
|
|
|
719 // We should always emit a '.module [no]oddspreg' but binutils 2.24 does not
|
|
|
720 // accept it. We therefore emit it when it contradicts the default or an
|
|
|
721 // option has changed the default (i.e. FPXX) and omit it otherwise.
|
|
|
722 if (Subtarget->isABI_O32() && (!Subtarget->useOddSPReg() ||
|
|
|
723 Subtarget->isABI_FPXX()))
|
|
|
724 getTargetStreamer().emitDirectiveModuleOddSPReg(Subtarget->useOddSPReg(),
|
|
|
725 Subtarget->isABI_O32());
|
|
|
726 }
|
|
|
727
|
|
|
728 void MipsAsmPrinter::EmitJal(MCSymbol *Symbol) {
|
|
|
729 MCInst I;
|
|
|
730 I.setOpcode(Mips::JAL);
|
|
|
731 I.addOperand(
|
|
|
732 MCOperand::CreateExpr(MCSymbolRefExpr::Create(Symbol, OutContext)));
|
|
|
733 OutStreamer.EmitInstruction(I, getSubtargetInfo());
|
|
|
734 }
|
|
|
735
|
|
|
736 void MipsAsmPrinter::EmitInstrReg(unsigned Opcode, unsigned Reg) {
|
|
|
737 MCInst I;
|
|
|
738 I.setOpcode(Opcode);
|
|
|
739 I.addOperand(MCOperand::CreateReg(Reg));
|
|
|
740 OutStreamer.EmitInstruction(I, getSubtargetInfo());
|
|
|
741 }
|
|
|
742
|
|
|
743 void MipsAsmPrinter::EmitInstrRegReg(unsigned Opcode, unsigned Reg1,
|
|
|
744 unsigned Reg2) {
|
|
|
745 MCInst I;
|
|
|
746 //
|
|
|
747 // Because of the current td files for Mips32, the operands for MTC1
|
|
|
748 // appear backwards from their normal assembly order. It's not a trivial
|
|
|
749 // change to fix this in the td file so we adjust for it here.
|
|
|
750 //
|
|
|
751 if (Opcode == Mips::MTC1) {
|
|
|
752 unsigned Temp = Reg1;
|
|
|
753 Reg1 = Reg2;
|
|
|
754 Reg2 = Temp;
|
|
|
755 }
|
|
|
756 I.setOpcode(Opcode);
|
|
|
757 I.addOperand(MCOperand::CreateReg(Reg1));
|
|
|
758 I.addOperand(MCOperand::CreateReg(Reg2));
|
|
|
759 OutStreamer.EmitInstruction(I, getSubtargetInfo());
|
|
|
760 }
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
761
|
|
77
|
762 void MipsAsmPrinter::EmitInstrRegRegReg(unsigned Opcode, unsigned Reg1,
|
|
|
763 unsigned Reg2, unsigned Reg3) {
|
|
|
764 MCInst I;
|
|
|
765 I.setOpcode(Opcode);
|
|
|
766 I.addOperand(MCOperand::CreateReg(Reg1));
|
|
|
767 I.addOperand(MCOperand::CreateReg(Reg2));
|
|
|
768 I.addOperand(MCOperand::CreateReg(Reg3));
|
|
|
769 OutStreamer.EmitInstruction(I, getSubtargetInfo());
|
|
|
770 }
|
|
|
771
|
|
|
772 void MipsAsmPrinter::EmitMovFPIntPair(unsigned MovOpc, unsigned Reg1,
|
|
|
773 unsigned Reg2, unsigned FPReg1,
|
|
|
774 unsigned FPReg2, bool LE) {
|
|
|
775 if (!LE) {
|
|
|
776 unsigned temp = Reg1;
|
|
|
777 Reg1 = Reg2;
|
|
|
778 Reg2 = temp;
|
|
|
779 }
|
|
|
780 EmitInstrRegReg(MovOpc, Reg1, FPReg1);
|
|
|
781 EmitInstrRegReg(MovOpc, Reg2, FPReg2);
|
|
|
782 }
|
|
|
783
|
|
|
784 void MipsAsmPrinter::EmitSwapFPIntParams(Mips16HardFloatInfo::FPParamVariant PV,
|
|
|
785 bool LE, bool ToFP) {
|
|
|
786 using namespace Mips16HardFloatInfo;
|
|
|
787 unsigned MovOpc = ToFP ? Mips::MTC1 : Mips::MFC1;
|
|
|
788 switch (PV) {
|
|
|
789 case FSig:
|
|
|
790 EmitInstrRegReg(MovOpc, Mips::A0, Mips::F12);
|
|
|
791 break;
|
|
|
792 case FFSig:
|
|
|
793 EmitMovFPIntPair(MovOpc, Mips::A0, Mips::A1, Mips::F12, Mips::F14, LE);
|
|
|
794 break;
|
|
|
795 case FDSig:
|
|
|
796 EmitInstrRegReg(MovOpc, Mips::A0, Mips::F12);
|
|
|
797 EmitMovFPIntPair(MovOpc, Mips::A2, Mips::A3, Mips::F14, Mips::F15, LE);
|
|
|
798 break;
|
|
|
799 case DSig:
|
|
|
800 EmitMovFPIntPair(MovOpc, Mips::A0, Mips::A1, Mips::F12, Mips::F13, LE);
|
|
|
801 break;
|
|
|
802 case DDSig:
|
|
|
803 EmitMovFPIntPair(MovOpc, Mips::A0, Mips::A1, Mips::F12, Mips::F13, LE);
|
|
|
804 EmitMovFPIntPair(MovOpc, Mips::A2, Mips::A3, Mips::F14, Mips::F15, LE);
|
|
|
805 break;
|
|
|
806 case DFSig:
|
|
|
807 EmitMovFPIntPair(MovOpc, Mips::A0, Mips::A1, Mips::F12, Mips::F13, LE);
|
|
|
808 EmitInstrRegReg(MovOpc, Mips::A2, Mips::F14);
|
|
|
809 break;
|
|
|
810 case NoSig:
|
|
|
811 return;
|
|
|
812 }
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
813 }
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
814
|
|
77
|
815 void
|
|
|
816 MipsAsmPrinter::EmitSwapFPIntRetval(Mips16HardFloatInfo::FPReturnVariant RV,
|
|
|
817 bool LE) {
|
|
|
818 using namespace Mips16HardFloatInfo;
|
|
|
819 unsigned MovOpc = Mips::MFC1;
|
|
|
820 switch (RV) {
|
|
|
821 case FRet:
|
|
|
822 EmitInstrRegReg(MovOpc, Mips::V0, Mips::F0);
|
|
|
823 break;
|
|
|
824 case DRet:
|
|
|
825 EmitMovFPIntPair(MovOpc, Mips::V0, Mips::V1, Mips::F0, Mips::F1, LE);
|
|
|
826 break;
|
|
|
827 case CFRet:
|
|
|
828 EmitMovFPIntPair(MovOpc, Mips::V0, Mips::V1, Mips::F0, Mips::F1, LE);
|
|
|
829 break;
|
|
|
830 case CDRet:
|
|
|
831 EmitMovFPIntPair(MovOpc, Mips::V0, Mips::V1, Mips::F0, Mips::F1, LE);
|
|
|
832 EmitMovFPIntPair(MovOpc, Mips::A0, Mips::A1, Mips::F2, Mips::F3, LE);
|
|
|
833 break;
|
|
|
834 case NoFPRet:
|
|
|
835 break;
|
|
|
836 }
|
|
|
837 }
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
838
|
|
77
|
839 void MipsAsmPrinter::EmitFPCallStub(
|
|
|
840 const char *Symbol, const Mips16HardFloatInfo::FuncSignature *Signature) {
|
|
|
841 MCSymbol *MSymbol = OutContext.GetOrCreateSymbol(StringRef(Symbol));
|
|
|
842 using namespace Mips16HardFloatInfo;
|
|
|
843 bool LE = Subtarget->isLittle();
|
|
|
844 //
|
|
|
845 // .global xxxx
|
|
|
846 //
|
|
|
847 OutStreamer.EmitSymbolAttribute(MSymbol, MCSA_Global);
|
|
|
848 const char *RetType;
|
|
|
849 //
|
|
|
850 // make the comment field identifying the return and parameter
|
|
|
851 // types of the floating point stub
|
|
|
852 // # Stub function to call rettype xxxx (params)
|
|
|
853 //
|
|
|
854 switch (Signature->RetSig) {
|
|
|
855 case FRet:
|
|
|
856 RetType = "float";
|
|
|
857 break;
|
|
|
858 case DRet:
|
|
|
859 RetType = "double";
|
|
|
860 break;
|
|
|
861 case CFRet:
|
|
|
862 RetType = "complex";
|
|
|
863 break;
|
|
|
864 case CDRet:
|
|
|
865 RetType = "double complex";
|
|
|
866 break;
|
|
|
867 case NoFPRet:
|
|
|
868 RetType = "";
|
|
|
869 break;
|
|
|
870 }
|
|
|
871 const char *Parms;
|
|
|
872 switch (Signature->ParamSig) {
|
|
|
873 case FSig:
|
|
|
874 Parms = "float";
|
|
|
875 break;
|
|
|
876 case FFSig:
|
|
|
877 Parms = "float, float";
|
|
|
878 break;
|
|
|
879 case FDSig:
|
|
|
880 Parms = "float, double";
|
|
|
881 break;
|
|
|
882 case DSig:
|
|
|
883 Parms = "double";
|
|
|
884 break;
|
|
|
885 case DDSig:
|
|
|
886 Parms = "double, double";
|
|
|
887 break;
|
|
|
888 case DFSig:
|
|
|
889 Parms = "double, float";
|
|
|
890 break;
|
|
|
891 case NoSig:
|
|
|
892 Parms = "";
|
|
|
893 break;
|
|
|
894 }
|
|
|
895 OutStreamer.AddComment("\t# Stub function to call " + Twine(RetType) + " " +
|
|
|
896 Twine(Symbol) + " (" + Twine(Parms) + ")");
|
|
|
897 //
|
|
|
898 // probably not necessary but we save and restore the current section state
|
|
|
899 //
|
|
|
900 OutStreamer.PushSection();
|
|
|
901 //
|
|
|
902 // .section mips16.call.fpxxxx,"ax",@progbits
|
|
|
903 //
|
|
|
904 const MCSectionELF *M = OutContext.getELFSection(
|
|
|
905 ".mips16.call.fp." + std::string(Symbol), ELF::SHT_PROGBITS,
|
|
|
906 ELF::SHF_ALLOC | ELF::SHF_EXECINSTR, SectionKind::getText());
|
|
|
907 OutStreamer.SwitchSection(M, nullptr);
|
|
|
908 //
|
|
|
909 // .align 2
|
|
|
910 //
|
|
|
911 OutStreamer.EmitValueToAlignment(4);
|
|
|
912 MipsTargetStreamer &TS = getTargetStreamer();
|
|
|
913 //
|
|
|
914 // .set nomips16
|
|
|
915 // .set nomicromips
|
|
|
916 //
|
|
|
917 TS.emitDirectiveSetNoMips16();
|
|
|
918 TS.emitDirectiveSetNoMicroMips();
|
|
|
919 //
|
|
|
920 // .ent __call_stub_fp_xxxx
|
|
|
921 // .type __call_stub_fp_xxxx,@function
|
|
|
922 // __call_stub_fp_xxxx:
|
|
|
923 //
|
|
|
924 std::string x = "__call_stub_fp_" + std::string(Symbol);
|
|
|
925 MCSymbol *Stub = OutContext.GetOrCreateSymbol(StringRef(x));
|
|
|
926 TS.emitDirectiveEnt(*Stub);
|
|
|
927 MCSymbol *MType =
|
|
|
928 OutContext.GetOrCreateSymbol("__call_stub_fp_" + Twine(Symbol));
|
|
|
929 OutStreamer.EmitSymbolAttribute(MType, MCSA_ELF_TypeFunction);
|
|
|
930 OutStreamer.EmitLabel(Stub);
|
|
|
931 //
|
|
|
932 // we just handle non pic for now. these function will not be
|
|
|
933 // called otherwise. when the full stub generation is moved here
|
|
|
934 // we need to deal with pic.
|
|
|
935 //
|
|
|
936 if (Subtarget->getRelocationModel() == Reloc::PIC_)
|
|
|
937 llvm_unreachable("should not be here if we are compiling pic");
|
|
|
938 TS.emitDirectiveSetReorder();
|
|
|
939 //
|
|
|
940 // We need to add a MipsMCExpr class to MCTargetDesc to fully implement
|
|
|
941 // stubs without raw text but this current patch is for compiler generated
|
|
|
942 // functions and they all return some value.
|
|
|
943 // The calling sequence for non pic is different in that case and we need
|
|
|
944 // to implement %lo and %hi in order to handle the case of no return value
|
|
|
945 // See the corresponding method in Mips16HardFloat for details.
|
|
|
946 //
|
|
|
947 // mov the return address to S2.
|
|
|
948 // we have no stack space to store it and we are about to make another call.
|
|
|
949 // We need to make sure that the enclosing function knows to save S2
|
|
|
950 // This should have already been handled.
|
|
|
951 //
|
|
|
952 // Mov $18, $31
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
953
|
|
77
|
954 EmitInstrRegRegReg(Mips::ADDu, Mips::S2, Mips::RA, Mips::ZERO);
|
|
|
955
|
|
|
956 EmitSwapFPIntParams(Signature->ParamSig, LE, true);
|
|
|
957
|
|
|
958 // Jal xxxx
|
|
|
959 //
|
|
|
960 EmitJal(MSymbol);
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
961
|
|
77
|
962 // fix return values
|
|
|
963 EmitSwapFPIntRetval(Signature->RetSig, LE);
|
|
|
964 //
|
|
|
965 // do the return
|
|
|
966 // if (Signature->RetSig == NoFPRet)
|
|
|
967 // llvm_unreachable("should not be any stubs here with no return value");
|
|
|
968 // else
|
|
|
969 EmitInstrReg(Mips::JR, Mips::S2);
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
970
|
|
77
|
971 MCSymbol *Tmp = OutContext.CreateTempSymbol();
|
|
|
972 OutStreamer.EmitLabel(Tmp);
|
|
|
973 const MCSymbolRefExpr *E = MCSymbolRefExpr::Create(Stub, OutContext);
|
|
|
974 const MCSymbolRefExpr *T = MCSymbolRefExpr::Create(Tmp, OutContext);
|
|
|
975 const MCExpr *T_min_E = MCBinaryExpr::CreateSub(T, E, OutContext);
|
|
|
976 OutStreamer.EmitELFSize(Stub, T_min_E);
|
|
|
977 TS.emitDirectiveEnd(x);
|
|
|
978 OutStreamer.PopSection();
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
979 }
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
980
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
981 void MipsAsmPrinter::EmitEndOfAsmFile(Module &M) {
|
|
77
|
982 // Emit needed stubs
|
|
|
983 //
|
|
|
984 for (std::map<
|
|
|
985 const char *,
|
|
|
986 const llvm::Mips16HardFloatInfo::FuncSignature *>::const_iterator
|
|
|
987 it = StubsNeeded.begin();
|
|
|
988 it != StubsNeeded.end(); ++it) {
|
|
|
989 const char *Symbol = it->first;
|
|
|
990 const llvm::Mips16HardFloatInfo::FuncSignature *Signature = it->second;
|
|
|
991 EmitFPCallStub(Symbol, Signature);
|
|
|
992 }
|
|
|
993 // return to the text section
|
|
|
994 OutStreamer.SwitchSection(OutContext.getObjectFileInfo()->getTextSection());
|
0
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995 }
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996
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997 void MipsAsmPrinter::PrintDebugValueComment(const MachineInstr *MI,
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998 raw_ostream &OS) {
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999 // TODO: implement
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1000 }
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1001
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77
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1002 // Align all targets of indirect branches on bundle size. Used only if target
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1003 // is NaCl.
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1004 void MipsAsmPrinter::NaClAlignIndirectJumpTargets(MachineFunction &MF) {
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1005 // Align all blocks that are jumped to through jump table.
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1006 if (MachineJumpTableInfo *JtInfo = MF.getJumpTableInfo()) {
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1007 const std::vector<MachineJumpTableEntry> &JT = JtInfo->getJumpTables();
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1008 for (unsigned I = 0; I < JT.size(); ++I) {
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1009 const std::vector<MachineBasicBlock*> &MBBs = JT[I].MBBs;
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1010
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1011 for (unsigned J = 0; J < MBBs.size(); ++J)
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1012 MBBs[J]->setAlignment(MIPS_NACL_BUNDLE_ALIGN);
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1013 }
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1014 }
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1015
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1016 // If basic block address is taken, block can be target of indirect branch.
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1017 for (MachineFunction::iterator MBB = MF.begin(), E = MF.end();
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1018 MBB != E; ++MBB) {
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1019 if (MBB->hasAddressTaken())
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1020 MBB->setAlignment(MIPS_NACL_BUNDLE_ALIGN);
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1021 }
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1022 }
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1023
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1024 bool MipsAsmPrinter::isLongBranchPseudo(int Opcode) const {
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1025 return (Opcode == Mips::LONG_BRANCH_LUi
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1026 || Opcode == Mips::LONG_BRANCH_ADDiu
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1027 || Opcode == Mips::LONG_BRANCH_DADDiu);
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1028 }
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1029
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1030 // Force static initialization.
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1031 extern "C" void LLVMInitializeMipsAsmPrinter() {
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1032 RegisterAsmPrinter<MipsAsmPrinter> X(TheMipsTarget);
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1033 RegisterAsmPrinter<MipsAsmPrinter> Y(TheMipselTarget);
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1034 RegisterAsmPrinter<MipsAsmPrinter> A(TheMips64Target);
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1035 RegisterAsmPrinter<MipsAsmPrinter> B(TheMips64elTarget);
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1036 }
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