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annotate test/CodeGen/ARM/vld4.ll @ 77:54457678186b LLVM3.6

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LLVM 3.6
author Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
date Mon, 08 Sep 2014 22:06:00 +0900
parents 95c75e76d11b
children afa8332a0e37
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
77
54457678186b LLVM 3.6
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parents: 0
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1 ; RUN: llc -mtriple=arm-eabi -mattr=+neon %s -o - | FileCheck %s
0
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2
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3 %struct.__neon_int8x8x4_t = type { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> }
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4 %struct.__neon_int16x4x4_t = type { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> }
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5 %struct.__neon_int32x2x4_t = type { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> }
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6 %struct.__neon_float32x2x4_t = type { <2 x float>, <2 x float>, <2 x float>, <2 x float> }
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7 %struct.__neon_int64x1x4_t = type { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> }
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8
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9 %struct.__neon_int8x16x4_t = type { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> }
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10 %struct.__neon_int16x8x4_t = type { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> }
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11 %struct.__neon_int32x4x4_t = type { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> }
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12 %struct.__neon_float32x4x4_t = type { <4 x float>, <4 x float>, <4 x float>, <4 x float> }
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13
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14 define <8 x i8> @vld4i8(i8* %A) nounwind {
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parents:
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15 ;CHECK-LABEL: vld4i8:
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16 ;Check the alignment value. Max for this instruction is 256 bits:
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17 ;CHECK: vld4.8 {d16, d17, d18, d19}, [r0:64]
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18 %tmp1 = call %struct.__neon_int8x8x4_t @llvm.arm.neon.vld4.v8i8(i8* %A, i32 8)
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19 %tmp2 = extractvalue %struct.__neon_int8x8x4_t %tmp1, 0
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20 %tmp3 = extractvalue %struct.__neon_int8x8x4_t %tmp1, 2
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21 %tmp4 = add <8 x i8> %tmp2, %tmp3
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22 ret <8 x i8> %tmp4
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23 }
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24
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25 ;Check for a post-increment updating load with register increment.
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parents:
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26 define <8 x i8> @vld4i8_update(i8** %ptr, i32 %inc) nounwind {
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27 ;CHECK-LABEL: vld4i8_update:
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28 ;CHECK: vld4.8 {d16, d17, d18, d19}, [r2:128], r1
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29 %A = load i8** %ptr
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30 %tmp1 = call %struct.__neon_int8x8x4_t @llvm.arm.neon.vld4.v8i8(i8* %A, i32 16)
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31 %tmp2 = extractvalue %struct.__neon_int8x8x4_t %tmp1, 0
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32 %tmp3 = extractvalue %struct.__neon_int8x8x4_t %tmp1, 2
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33 %tmp4 = add <8 x i8> %tmp2, %tmp3
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34 %tmp5 = getelementptr i8* %A, i32 %inc
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35 store i8* %tmp5, i8** %ptr
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36 ret <8 x i8> %tmp4
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37 }
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38
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39 define <4 x i16> @vld4i16(i16* %A) nounwind {
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40 ;CHECK-LABEL: vld4i16:
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41 ;Check the alignment value. Max for this instruction is 256 bits:
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parents:
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42 ;CHECK: vld4.16 {d16, d17, d18, d19}, [r0:128]
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43 %tmp0 = bitcast i16* %A to i8*
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parents:
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44 %tmp1 = call %struct.__neon_int16x4x4_t @llvm.arm.neon.vld4.v4i16(i8* %tmp0, i32 16)
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parents:
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45 %tmp2 = extractvalue %struct.__neon_int16x4x4_t %tmp1, 0
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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46 %tmp3 = extractvalue %struct.__neon_int16x4x4_t %tmp1, 2
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parents:
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47 %tmp4 = add <4 x i16> %tmp2, %tmp3
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48 ret <4 x i16> %tmp4
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49 }
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50
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51 define <2 x i32> @vld4i32(i32* %A) nounwind {
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52 ;CHECK-LABEL: vld4i32:
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53 ;Check the alignment value. Max for this instruction is 256 bits:
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54 ;CHECK: vld4.32 {d16, d17, d18, d19}, [r0:256]
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55 %tmp0 = bitcast i32* %A to i8*
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56 %tmp1 = call %struct.__neon_int32x2x4_t @llvm.arm.neon.vld4.v2i32(i8* %tmp0, i32 32)
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57 %tmp2 = extractvalue %struct.__neon_int32x2x4_t %tmp1, 0
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58 %tmp3 = extractvalue %struct.__neon_int32x2x4_t %tmp1, 2
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parents:
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59 %tmp4 = add <2 x i32> %tmp2, %tmp3
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60 ret <2 x i32> %tmp4
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61 }
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62
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63 define <2 x float> @vld4f(float* %A) nounwind {
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parents:
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64 ;CHECK-LABEL: vld4f:
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parents:
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65 ;CHECK: vld4.32
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66 %tmp0 = bitcast float* %A to i8*
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parents:
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67 %tmp1 = call %struct.__neon_float32x2x4_t @llvm.arm.neon.vld4.v2f32(i8* %tmp0, i32 1)
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parents:
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68 %tmp2 = extractvalue %struct.__neon_float32x2x4_t %tmp1, 0
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69 %tmp3 = extractvalue %struct.__neon_float32x2x4_t %tmp1, 2
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parents:
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70 %tmp4 = fadd <2 x float> %tmp2, %tmp3
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71 ret <2 x float> %tmp4
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72 }
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73
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74 define <1 x i64> @vld4i64(i64* %A) nounwind {
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parents:
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75 ;CHECK-LABEL: vld4i64:
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parents:
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76 ;Check the alignment value. Max for this instruction is 256 bits:
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
77 ;CHECK: vld1.64 {d16, d17, d18, d19}, [r0:256]
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parents:
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78 %tmp0 = bitcast i64* %A to i8*
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parents:
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79 %tmp1 = call %struct.__neon_int64x1x4_t @llvm.arm.neon.vld4.v1i64(i8* %tmp0, i32 64)
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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80 %tmp2 = extractvalue %struct.__neon_int64x1x4_t %tmp1, 0
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81 %tmp3 = extractvalue %struct.__neon_int64x1x4_t %tmp1, 2
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parents:
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82 %tmp4 = add <1 x i64> %tmp2, %tmp3
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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83 ret <1 x i64> %tmp4
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84 }
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parents:
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85
77
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parents: 0
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86 define <1 x i64> @vld4i64_update(i64** %ptr, i64* %A) nounwind {
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parents: 0
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87 ;CHECK-LABEL: vld4i64_update:
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parents: 0
diff changeset
88 ;CHECK: vld1.64 {d16, d17, d18, d19}, [r1:256]!
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parents: 0
diff changeset
89 %tmp0 = bitcast i64* %A to i8*
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parents: 0
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90 %tmp1 = call %struct.__neon_int64x1x4_t @llvm.arm.neon.vld4.v1i64(i8* %tmp0, i32 64)
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91 %tmp5 = getelementptr i64* %A, i32 4
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92 store i64* %tmp5, i64** %ptr
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parents: 0
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93 %tmp2 = extractvalue %struct.__neon_int64x1x4_t %tmp1, 0
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parents: 0
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94 %tmp3 = extractvalue %struct.__neon_int64x1x4_t %tmp1, 2
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parents: 0
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95 %tmp4 = add <1 x i64> %tmp2, %tmp3
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parents: 0
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96 ret <1 x i64> %tmp4
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parents: 0
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97 }
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parents: 0
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98
0
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parents:
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99 define <16 x i8> @vld4Qi8(i8* %A) nounwind {
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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100 ;CHECK-LABEL: vld4Qi8:
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
101 ;Check the alignment value. Max for this instruction is 256 bits:
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
102 ;CHECK: vld4.8 {d16, d18, d20, d22}, [r0:256]!
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
103 ;CHECK: vld4.8 {d17, d19, d21, d23}, [r0:256]
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
104 %tmp1 = call %struct.__neon_int8x16x4_t @llvm.arm.neon.vld4.v16i8(i8* %A, i32 64)
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
105 %tmp2 = extractvalue %struct.__neon_int8x16x4_t %tmp1, 0
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
106 %tmp3 = extractvalue %struct.__neon_int8x16x4_t %tmp1, 2
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
107 %tmp4 = add <16 x i8> %tmp2, %tmp3
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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108 ret <16 x i8> %tmp4
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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109 }
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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110
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parents:
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111 define <8 x i16> @vld4Qi16(i16* %A) nounwind {
95c75e76d11b LLVM 3.4
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parents:
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112 ;CHECK-LABEL: vld4Qi16:
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parents:
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113 ;Check for no alignment specifier.
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parents:
diff changeset
114 ;CHECK: vld4.16 {d16, d18, d20, d22}, [r0]!
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parents:
diff changeset
115 ;CHECK: vld4.16 {d17, d19, d21, d23}, [r0]
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116 %tmp0 = bitcast i16* %A to i8*
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parents:
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117 %tmp1 = call %struct.__neon_int16x8x4_t @llvm.arm.neon.vld4.v8i16(i8* %tmp0, i32 1)
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118 %tmp2 = extractvalue %struct.__neon_int16x8x4_t %tmp1, 0
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119 %tmp3 = extractvalue %struct.__neon_int16x8x4_t %tmp1, 2
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120 %tmp4 = add <8 x i16> %tmp2, %tmp3
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121 ret <8 x i16> %tmp4
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122 }
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parents:
diff changeset
123
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
124 ;Check for a post-increment updating load.
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
125 define <8 x i16> @vld4Qi16_update(i16** %ptr) nounwind {
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
126 ;CHECK-LABEL: vld4Qi16_update:
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
127 ;CHECK: vld4.16 {d16, d18, d20, d22}, [r1:64]!
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
128 ;CHECK: vld4.16 {d17, d19, d21, d23}, [r1:64]!
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129 %A = load i16** %ptr
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diff changeset
130 %tmp0 = bitcast i16* %A to i8*
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diff changeset
131 %tmp1 = call %struct.__neon_int16x8x4_t @llvm.arm.neon.vld4.v8i16(i8* %tmp0, i32 8)
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diff changeset
132 %tmp2 = extractvalue %struct.__neon_int16x8x4_t %tmp1, 0
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parents:
diff changeset
133 %tmp3 = extractvalue %struct.__neon_int16x8x4_t %tmp1, 2
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parents:
diff changeset
134 %tmp4 = add <8 x i16> %tmp2, %tmp3
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
135 %tmp5 = getelementptr i16* %A, i32 32
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
136 store i16* %tmp5, i16** %ptr
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diff changeset
137 ret <8 x i16> %tmp4
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parents:
diff changeset
138 }
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
139
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
140 define <4 x i32> @vld4Qi32(i32* %A) nounwind {
95c75e76d11b LLVM 3.4
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parents:
diff changeset
141 ;CHECK-LABEL: vld4Qi32:
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parents:
diff changeset
142 ;CHECK: vld4.32
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
143 ;CHECK: vld4.32
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
144 %tmp0 = bitcast i32* %A to i8*
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
145 %tmp1 = call %struct.__neon_int32x4x4_t @llvm.arm.neon.vld4.v4i32(i8* %tmp0, i32 1)
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
146 %tmp2 = extractvalue %struct.__neon_int32x4x4_t %tmp1, 0
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parents:
diff changeset
147 %tmp3 = extractvalue %struct.__neon_int32x4x4_t %tmp1, 2
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parents:
diff changeset
148 %tmp4 = add <4 x i32> %tmp2, %tmp3
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parents:
diff changeset
149 ret <4 x i32> %tmp4
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parents:
diff changeset
150 }
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
151
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
152 define <4 x float> @vld4Qf(float* %A) nounwind {
95c75e76d11b LLVM 3.4
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parents:
diff changeset
153 ;CHECK-LABEL: vld4Qf:
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
154 ;CHECK: vld4.32
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
155 ;CHECK: vld4.32
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
156 %tmp0 = bitcast float* %A to i8*
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
157 %tmp1 = call %struct.__neon_float32x4x4_t @llvm.arm.neon.vld4.v4f32(i8* %tmp0, i32 1)
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
158 %tmp2 = extractvalue %struct.__neon_float32x4x4_t %tmp1, 0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
159 %tmp3 = extractvalue %struct.__neon_float32x4x4_t %tmp1, 2
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
160 %tmp4 = fadd <4 x float> %tmp2, %tmp3
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
161 ret <4 x float> %tmp4
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
162 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
163
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
164 declare %struct.__neon_int8x8x4_t @llvm.arm.neon.vld4.v8i8(i8*, i32) nounwind readonly
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
165 declare %struct.__neon_int16x4x4_t @llvm.arm.neon.vld4.v4i16(i8*, i32) nounwind readonly
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
166 declare %struct.__neon_int32x2x4_t @llvm.arm.neon.vld4.v2i32(i8*, i32) nounwind readonly
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
167 declare %struct.__neon_float32x2x4_t @llvm.arm.neon.vld4.v2f32(i8*, i32) nounwind readonly
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
168 declare %struct.__neon_int64x1x4_t @llvm.arm.neon.vld4.v1i64(i8*, i32) nounwind readonly
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
169
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
170 declare %struct.__neon_int8x16x4_t @llvm.arm.neon.vld4.v16i8(i8*, i32) nounwind readonly
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
171 declare %struct.__neon_int16x8x4_t @llvm.arm.neon.vld4.v8i16(i8*, i32) nounwind readonly
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
172 declare %struct.__neon_int32x4x4_t @llvm.arm.neon.vld4.v4i32(i8*, i32) nounwind readonly
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
173 declare %struct.__neon_float32x4x4_t @llvm.arm.neon.vld4.v4f32(i8*, i32) nounwind readonly