0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
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1 ;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=EG-CHECK %s
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
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2 ;RUN: llc < %s -march=r600 -mcpu=verde -verify-machineinstrs | FileCheck --check-prefix=SI-CHECK %s
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
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3
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
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4 ;EG-CHECK: @shl_v2i32
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
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5 ;EG-CHECK: LSHL {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
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6 ;EG-CHECK: LSHL {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
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7
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
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8 ;SI-CHECK: @shl_v2i32
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
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9 ;SI-CHECK: V_LSHL_B32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
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10 ;SI-CHECK: V_LSHL_B32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
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11
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
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12 define void @shl_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32> addrspace(1)* %in) {
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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13 %b_ptr = getelementptr <2 x i32> addrspace(1)* %in, i32 1
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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14 %a = load <2 x i32> addrspace(1) * %in
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
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15 %b = load <2 x i32> addrspace(1) * %b_ptr
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
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16 %result = shl <2 x i32> %a, %b
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
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17 store <2 x i32> %result, <2 x i32> addrspace(1)* %out
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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18 ret void
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
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19 }
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
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20
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
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21 ;EG-CHECK: @shl_v4i32
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
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22 ;EG-CHECK: LSHL {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
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23 ;EG-CHECK: LSHL {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
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24 ;EG-CHECK: LSHL {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
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25 ;EG-CHECK: LSHL {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
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26
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
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27 ;SI-CHECK: @shl_v4i32
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
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28 ;SI-CHECK: V_LSHL_B32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
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29 ;SI-CHECK: V_LSHL_B32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
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30 ;SI-CHECK: V_LSHL_B32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
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31 ;SI-CHECK: V_LSHL_B32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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32
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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33 define void @shl_v4i32(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %in) {
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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34 %b_ptr = getelementptr <4 x i32> addrspace(1)* %in, i32 1
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
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35 %a = load <4 x i32> addrspace(1) * %in
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
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36 %b = load <4 x i32> addrspace(1) * %b_ptr
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
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37 %result = shl <4 x i32> %a, %b
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
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38 store <4 x i32> %result, <4 x i32> addrspace(1)* %out
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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39 ret void
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
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40 }
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
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41
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77
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42 ;EG-CHECK: @shl_i64
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43 ;EG-CHECK: SUB_INT {{\*? *}}[[COMPSH:T[0-9]+\.[XYZW]]], {{literal.[xy]}}, [[SHIFT:T[0-9]+\.[XYZW]]]
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44 ;EG-CHECK: LSHR {{\* *}}[[TEMP:T[0-9]+\.[XYZW]]], [[OPLO:T[0-9]+\.[XYZW]]], {{[[COMPSH]]|PV.[XYZW]}}
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45 ;EG-CHECK: LSHR {{\*? *}}[[OVERF:T[0-9]+\.[XYZW]]], {{[[TEMP]]|PV.[XYZW]}}, 1
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46 ;EG_CHECK-DAG: ADD_INT {{\*? *}}[[BIGSH:T[0-9]+\.[XYZW]]], [[SHIFT]], literal
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47 ;EG-CHECK-DAG: LSHL {{\*? *}}[[HISMTMP:T[0-9]+\.[XYZW]]], [[OPHI:T[0-9]+\.[XYZW]]], [[SHIFT]]
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48 ;EG-CHECK-DAG: OR_INT {{\*? *}}[[HISM:T[0-9]+\.[XYZW]]], {{[[HISMTMP]]|PV.[XYZW]}}, {{[[OVERF]]|PV.[XYZW]}}
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49 ;EG-CHECK-DAG: LSHL {{\*? *}}[[LOSM:T[0-9]+\.[XYZW]]], [[OPLO]], {{PS|[[SHIFT]]}}
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50 ;EG-CHECK-DAG: SETGT_UINT {{\*? *}}[[RESC:T[0-9]+\.[XYZW]]], [[SHIFT]], literal
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51 ;EG-CHECK-DAG: CNDE_INT {{\*? *}}[[RESLO:T[0-9]+\.[XYZW]]], {{T[0-9]+\.[XYZW]}}
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52 ;EG-CHECK-DAG: CNDE_INT {{\*? *}}[[RESHI:T[0-9]+\.[XYZW]]], {{T[0-9]+\.[XYZW], .*}}, 0.0
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53
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54 ;SI-CHECK: @shl_i64
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55 ;SI-CHECK: V_LSHL_B64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v[0-9]+}}
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56
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57 define void @shl_i64(i64 addrspace(1)* %out, i64 addrspace(1)* %in) {
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58 %b_ptr = getelementptr i64 addrspace(1)* %in, i64 1
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59 %a = load i64 addrspace(1) * %in
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60 %b = load i64 addrspace(1) * %b_ptr
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61 %result = shl i64 %a, %b
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62 store i64 %result, i64 addrspace(1)* %out
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63 ret void
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64 }
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65
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66 ;EG-CHECK: @shl_v2i64
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67 ;EG-CHECK-DAG: SUB_INT {{\*? *}}[[COMPSHA:T[0-9]+\.[XYZW]]], {{literal.[xy]}}, [[SHA:T[0-9]+\.[XYZW]]]
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68 ;EG-CHECK-DAG: SUB_INT {{\*? *}}[[COMPSHB:T[0-9]+\.[XYZW]]], {{literal.[xy]}}, [[SHB:T[0-9]+\.[XYZW]]]
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69 ;EG-CHECK-DAG: LSHR {{\*? *}}[[COMPSHA]]
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70 ;EG-CHECK-DAG: LSHR {{\*? *}}[[COMPSHB]]
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71 ;EG-CHECK-DAG: LSHR {{.*}}, 1
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72 ;EG-CHECK-DAG: LSHR {{.*}}, 1
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73 ;EG-CHECK-DAG: ADD_INT {{\*? *}}[[BIGSHA:T[0-9]+\.[XYZW]]]{{.*}}, literal
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74 ;EG-CHECK-DAG: ADD_INT {{\*? *}}[[BIGSHB:T[0-9]+\.[XYZW]]]{{.*}}, literal
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75 ;EG-CHECK-DAG: LSHL {{.*}}, [[SHA]]
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76 ;EG-CHECK-DAG: LSHL {{.*}}, [[SHB]]
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77 ;EG-CHECK-DAG: LSHL {{.*}}, [[SHA]]
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78 ;EG-CHECK-DAG: LSHL {{.*}}, [[SHB]]
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79 ;EG-CHECK-DAG: LSHL
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80 ;EG-CHECK-DAG: LSHL
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81 ;EG-CHECK-DAG: SETGT_UINT {{\*? *T[0-9]\.[XYZW]}}, [[SHA]], literal
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82 ;EG-CHECK-DAG: SETGT_UINT {{\*? *T[0-9]\.[XYZW]}}, [[SHB]], literal
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83 ;EG-CHECK-DAG: CNDE_INT {{.*}}, 0.0
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84 ;EG-CHECK-DAG: CNDE_INT {{.*}}, 0.0
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85 ;EG-CHECK-DAG: CNDE_INT
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86 ;EG-CHECK-DAG: CNDE_INT
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87
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88 ;SI-CHECK: @shl_v2i64
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89 ;SI-CHECK: V_LSHL_B64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v[0-9]+}}
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90 ;SI-CHECK: V_LSHL_B64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v[0-9]+}}
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91
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92 define void @shl_v2i64(<2 x i64> addrspace(1)* %out, <2 x i64> addrspace(1)* %in) {
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93 %b_ptr = getelementptr <2 x i64> addrspace(1)* %in, i64 1
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94 %a = load <2 x i64> addrspace(1) * %in
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95 %b = load <2 x i64> addrspace(1) * %b_ptr
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96 %result = shl <2 x i64> %a, %b
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97 store <2 x i64> %result, <2 x i64> addrspace(1)* %out
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98 ret void
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99 }
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100
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101 ;EG-CHECK: @shl_v4i64
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102 ;EG-CHECK-DAG: SUB_INT {{\*? *}}[[COMPSHA:T[0-9]+\.[XYZW]]], {{literal.[xy]}}, [[SHA:T[0-9]+\.[XYZW]]]
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103 ;EG-CHECK-DAG: SUB_INT {{\*? *}}[[COMPSHB:T[0-9]+\.[XYZW]]], {{literal.[xy]}}, [[SHB:T[0-9]+\.[XYZW]]]
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104 ;EG-CHECK-DAG: SUB_INT {{\*? *}}[[COMPSHC:T[0-9]+\.[XYZW]]], {{literal.[xy]}}, [[SHC:T[0-9]+\.[XYZW]]]
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105 ;EG-CHECK-DAG: SUB_INT {{\*? *}}[[COMPSHD:T[0-9]+\.[XYZW]]], {{literal.[xy]}}, [[SHD:T[0-9]+\.[XYZW]]]
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106 ;EG-CHECK-DAG: LSHR {{\*? *}}[[COMPSHA]]
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107 ;EG-CHECK-DAG: LSHR {{\*? *}}[[COMPSHB]]
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108 ;EG-CHECK-DAG: LSHR {{\*? *}}[[COMPSHC]]
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109 ;EG-CHECK-DAG: LSHR {{\*? *}}[[COMPSHD]]
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110 ;EG-CHECK-DAG: LSHR {{.*}}, 1
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111 ;EG-CHECK-DAG: LSHR {{.*}}, 1
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112 ;EG-CHECK-DAG: LSHR {{.*}}, 1
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113 ;EG-CHECK-DAG: LSHR {{.*}}, 1
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114 ;EG-CHECK-DAG: ADD_INT {{\*? *}}[[BIGSHA:T[0-9]+\.[XYZW]]]{{.*}}, literal
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115 ;EG-CHECK-DAG: ADD_INT {{\*? *}}[[BIGSHB:T[0-9]+\.[XYZW]]]{{.*}}, literal
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116 ;EG-CHECK-DAG: ADD_INT {{\*? *}}[[BIGSHC:T[0-9]+\.[XYZW]]]{{.*}}, literal
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117 ;EG-CHECK-DAG: ADD_INT {{\*? *}}[[BIGSHD:T[0-9]+\.[XYZW]]]{{.*}}, literal
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118 ;EG-CHECK-DAG: LSHL {{.*}}, [[SHA]]
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119 ;EG-CHECK-DAG: LSHL {{.*}}, [[SHB]]
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120 ;EG-CHECK-DAG: LSHL {{.*}}, [[SHC]]
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121 ;EG-CHECK-DAG: LSHL {{.*}}, [[SHD]]
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122 ;EG-CHECK-DAG: LSHL {{.*}}, [[SHA]]
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123 ;EG-CHECK-DAG: LSHL {{.*}}, [[SHB]]
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124 ;EG-CHECK-DAG: LSHL {{.*}}, [[SHC]]
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125 ;EG-CHECK-DAG: LSHL {{.*}}, [[SHD]]
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126 ;EG-CHECK-DAG: LSHL
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127 ;EG-CHECK-DAG: LSHL
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128 ;EG-CHECK-DAG: LSHL
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129 ;EG-CHECK-DAG: LSHL
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130 ;EG-CHECK-DAG: SETGT_UINT {{\*? *T[0-9]\.[XYZW]}}, [[SHA]], literal
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131 ;EG-CHECK-DAG: SETGT_UINT {{\*? *T[0-9]\.[XYZW]}}, [[SHB]], literal
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132 ;EG-CHECK-DAG: SETGT_UINT {{\*? *T[0-9]\.[XYZW]}}, [[SHC]], literal
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133 ;EG-CHECK-DAG: SETGT_UINT {{\*? *T[0-9]\.[XYZW]}}, [[SHD]], literal
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134 ;EG-CHECK-DAG: CNDE_INT {{.*}}, 0.0
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135 ;EG-CHECK-DAG: CNDE_INT {{.*}}, 0.0
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136 ;EG-CHECK-DAG: CNDE_INT {{.*}}, 0.0
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137 ;EG-CHECK-DAG: CNDE_INT {{.*}}, 0.0
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138 ;EG-CHECK-DAG: CNDE_INT
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139 ;EG-CHECK-DAG: CNDE_INT
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140 ;EG-CHECK-DAG: CNDE_INT
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141 ;EG-CHECK-DAG: CNDE_INT
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142
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143 ;SI-CHECK: @shl_v4i64
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144 ;SI-CHECK: V_LSHL_B64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v[0-9]+}}
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145 ;SI-CHECK: V_LSHL_B64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v[0-9]+}}
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146 ;SI-CHECK: V_LSHL_B64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v[0-9]+}}
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147 ;SI-CHECK: V_LSHL_B64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v[0-9]+}}
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148
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149 define void @shl_v4i64(<4 x i64> addrspace(1)* %out, <4 x i64> addrspace(1)* %in) {
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150 %b_ptr = getelementptr <4 x i64> addrspace(1)* %in, i64 1
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151 %a = load <4 x i64> addrspace(1) * %in
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152 %b = load <4 x i64> addrspace(1) * %b_ptr
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153 %result = shl <4 x i64> %a, %b
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154 store <4 x i64> %result, <4 x i64> addrspace(1)* %out
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155 ret void
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156 }
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