221
|
1 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
|
|
2 # RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx906 -mattr=+xnack -run-pass=si-form-memory-clauses -verify-machineinstrs -o - %s | FileCheck %s
|
|
3
|
|
4 # Make sure that debug instructions do not change the bundling, and
|
|
5 # the dbg_values which break the clause are inserted after the new
|
|
6 # bundles.
|
|
7
|
|
8 ---
|
|
9 name: sgpr_clause_dbg_value
|
|
10 tracksRegLiveness: true
|
|
11 body: |
|
|
12 bb.0:
|
|
13 liveins: $sgpr4_sgpr5, $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15, $vgpr16, $vgpr17, $vgpr18, $vgpr19, $vgpr20, $vgpr21, $vgpr22, $vgpr23, $vgpr24
|
|
14 ; CHECK-LABEL: name: sgpr_clause_dbg_value
|
|
15 ; CHECK: liveins: $sgpr4_sgpr5, $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15, $vgpr16, $vgpr17, $vgpr18, $vgpr19, $vgpr20, $vgpr21, $vgpr22, $vgpr23, $vgpr24
|
|
16 ; CHECK: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr4_sgpr5
|
223
|
17 ; CHECK: [[S_LOAD_DWORD_IMM:%[0-9]+]]:sreg_32_xm0_xexec = S_LOAD_DWORD_IMM [[COPY]], 0, 0 :: (load (s32), addrspace 4)
|
221
|
18 ; CHECK: DBG_VALUE [[S_LOAD_DWORD_IMM]], 0, 0
|
223
|
19 ; CHECK: [[S_LOAD_DWORD_IMM1:%[0-9]+]]:sreg_32_xm0_xexec = S_LOAD_DWORD_IMM [[COPY]], 8, 0 :: (load (s32), addrspace 4)
|
221
|
20 ; CHECK: DBG_VALUE [[S_LOAD_DWORD_IMM1]], 0, 0
|
|
21 ; CHECK: S_NOP 0
|
|
22 ; CHECK: S_NOP 0
|
|
23 ; CHECK: S_NOP 0
|
223
|
24 ; CHECK: [[S_LOAD_DWORD_IMM2:%[0-9]+]]:sreg_32_xm0_xexec = S_LOAD_DWORD_IMM [[COPY]], 16, 0 :: (load (s32), addrspace 4)
|
|
25 ; CHECK: [[S_LOAD_DWORD_IMM3:%[0-9]+]]:sreg_32_xm0_xexec = S_LOAD_DWORD_IMM [[COPY]], 32, 0 :: (load (s32), addrspace 4)
|
221
|
26 ; CHECK: DBG_VALUE [[S_LOAD_DWORD_IMM2]], 0, 0
|
|
27 ; CHECK: DBG_VALUE [[S_LOAD_DWORD_IMM3]], 0, 0
|
223
|
28 ; CHECK: [[S_LOAD_DWORD_IMM4:%[0-9]+]]:sreg_32_xm0_xexec = S_LOAD_DWORD_IMM [[COPY]], 64, 0 :: (load (s32), addrspace 4)
|
221
|
29 ; CHECK: KILL [[COPY]]
|
|
30 ; CHECK: S_ENDPGM 0, implicit [[S_LOAD_DWORD_IMM]], implicit [[S_LOAD_DWORD_IMM1]], implicit [[S_LOAD_DWORD_IMM2]], implicit [[S_LOAD_DWORD_IMM3]], implicit [[S_LOAD_DWORD_IMM4]]
|
|
31 %0:sreg_64 = COPY $sgpr4_sgpr5
|
223
|
32 %1:sreg_32_xm0_xexec = S_LOAD_DWORD_IMM %0, 0, 0 :: (load (s32), align 4, addrspace 4)
|
221
|
33 DBG_VALUE %1, 0, 0
|
223
|
34 %2:sreg_32_xm0_xexec = S_LOAD_DWORD_IMM %0, 8, 0 :: (load (s32), align 4, addrspace 4)
|
221
|
35 DBG_VALUE %2, 0, 0
|
|
36 S_NOP 0
|
|
37 S_NOP 0
|
|
38 S_NOP 0
|
223
|
39 %3:sreg_32_xm0_xexec = S_LOAD_DWORD_IMM %0, 16, 0 :: (load (s32), align 4, addrspace 4)
|
|
40 %4:sreg_32_xm0_xexec = S_LOAD_DWORD_IMM %0, 32, 0 :: (load (s32), align 4, addrspace 4)
|
221
|
41 DBG_VALUE %3, 0, 0
|
|
42 DBG_VALUE %4, 0, 0
|
223
|
43 %5:sreg_32_xm0_xexec = S_LOAD_DWORD_IMM %0, 64, 0 :: (load (s32), align 4, addrspace 4)
|
221
|
44 S_ENDPGM 0, implicit %1, implicit %2, implicit %3, implicit %4, implicit %5
|
|
45
|
|
46 ...
|