annotate include/llvm/CodeGen/BasicTTIImpl.h @ 83:60c9769439b8 LLVM3.7

LLVM 3.7
author Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
date Wed, 18 Feb 2015 14:55:36 +0900
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children afa8332a0e37
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1 //===- BasicTTIImpl.h -------------------------------------------*- C++ -*-===//
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2 //
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3 // The LLVM Compiler Infrastructure
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4 //
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5 // This file is distributed under the University of Illinois Open Source
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6 // License. See LICENSE.TXT for details.
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7 //
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8 //===----------------------------------------------------------------------===//
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9 /// \file
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10 /// This file provides a helper that implements much of the TTI interface in
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11 /// terms of the target-independent code generator and TargetLowering
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12 /// interfaces.
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13 ///
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14 //===----------------------------------------------------------------------===//
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15
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16 #ifndef LLVM_CODEGEN_BASICTTIIMPL_H
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17 #define LLVM_CODEGEN_BASICTTIIMPL_H
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18
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19 #include "llvm/Analysis/LoopInfo.h"
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20 #include "llvm/Analysis/TargetTransformInfoImpl.h"
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21 #include "llvm/Support/CommandLine.h"
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22 #include "llvm/Target/TargetLowering.h"
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23 #include "llvm/Target/TargetSubtargetInfo.h"
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24
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25 namespace llvm {
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26
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27 extern cl::opt<unsigned> PartialUnrollingThreshold;
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28
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29 /// \brief Base class which can be used to help build a TTI implementation.
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30 ///
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31 /// This class provides as much implementation of the TTI interface as is
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32 /// possible using the target independent parts of the code generator.
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33 ///
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34 /// In order to subclass it, your class must implement a getST() method to
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35 /// return the subtarget, and a getTLI() method to return the target lowering.
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36 /// We need these methods implemented in the derived class so that this class
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37 /// doesn't have to duplicate storage for them.
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38 template <typename T>
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39 class BasicTTIImplBase : public TargetTransformInfoImplCRTPBase<T> {
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40 private:
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41 typedef TargetTransformInfoImplCRTPBase<T> BaseT;
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42 typedef TargetTransformInfo TTI;
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43
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44 /// Estimate the overhead of scalarizing an instruction. Insert and Extract
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45 /// are set if the result needs to be inserted and/or extracted from vectors.
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46 unsigned getScalarizationOverhead(Type *Ty, bool Insert, bool Extract) {
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47 assert(Ty->isVectorTy() && "Can only scalarize vectors");
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48 unsigned Cost = 0;
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49
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50 for (int i = 0, e = Ty->getVectorNumElements(); i < e; ++i) {
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51 if (Insert)
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52 Cost += static_cast<T *>(this)
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53 ->getVectorInstrCost(Instruction::InsertElement, Ty, i);
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54 if (Extract)
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55 Cost += static_cast<T *>(this)
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56 ->getVectorInstrCost(Instruction::ExtractElement, Ty, i);
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57 }
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58
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59 return Cost;
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60 }
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61
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62 /// Estimate the cost overhead of SK_Alternate shuffle.
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63 unsigned getAltShuffleOverhead(Type *Ty) {
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64 assert(Ty->isVectorTy() && "Can only shuffle vectors");
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65 unsigned Cost = 0;
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66 // Shuffle cost is equal to the cost of extracting element from its argument
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67 // plus the cost of inserting them onto the result vector.
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68
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69 // e.g. <4 x float> has a mask of <0,5,2,7> i.e we need to extract from
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70 // index 0 of first vector, index 1 of second vector,index 2 of first
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71 // vector and finally index 3 of second vector and insert them at index
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72 // <0,1,2,3> of result vector.
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73 for (int i = 0, e = Ty->getVectorNumElements(); i < e; ++i) {
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74 Cost += static_cast<T *>(this)
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75 ->getVectorInstrCost(Instruction::InsertElement, Ty, i);
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76 Cost += static_cast<T *>(this)
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77 ->getVectorInstrCost(Instruction::ExtractElement, Ty, i);
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78 }
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79 return Cost;
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80 }
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81
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82 /// \brief Local query method delegates up to T which *must* implement this!
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83 const TargetSubtargetInfo *getST() const {
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84 return static_cast<const T *>(this)->getST();
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85 }
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86
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87 /// \brief Local query method delegates up to T which *must* implement this!
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88 const TargetLoweringBase *getTLI() const {
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89 return static_cast<const T *>(this)->getTLI();
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90 }
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91
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92 protected:
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93 explicit BasicTTIImplBase(const TargetMachine *TM)
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94 : BaseT(TM->getDataLayout()) {}
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95
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96 public:
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97 // Provide value semantics. MSVC requires that we spell all of these out.
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98 BasicTTIImplBase(const BasicTTIImplBase &Arg)
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99 : BaseT(static_cast<const BaseT &>(Arg)) {}
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100 BasicTTIImplBase(BasicTTIImplBase &&Arg)
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101 : BaseT(std::move(static_cast<BaseT &>(Arg))) {}
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102 BasicTTIImplBase &operator=(const BasicTTIImplBase &RHS) {
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103 BaseT::operator=(static_cast<const BaseT &>(RHS));
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104 return *this;
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105 }
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106 BasicTTIImplBase &operator=(BasicTTIImplBase &&RHS) {
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107 BaseT::operator=(std::move(static_cast<BaseT &>(RHS)));
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108 return *this;
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109 }
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110
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111 /// \name Scalar TTI Implementations
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112 /// @{
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113
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114 bool hasBranchDivergence() { return false; }
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115
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116 bool isLegalAddImmediate(int64_t imm) {
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117 return getTLI()->isLegalAddImmediate(imm);
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118 }
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119
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120 bool isLegalICmpImmediate(int64_t imm) {
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121 return getTLI()->isLegalICmpImmediate(imm);
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122 }
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123
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124 bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset,
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125 bool HasBaseReg, int64_t Scale) {
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126 TargetLoweringBase::AddrMode AM;
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127 AM.BaseGV = BaseGV;
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128 AM.BaseOffs = BaseOffset;
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129 AM.HasBaseReg = HasBaseReg;
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130 AM.Scale = Scale;
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131 return getTLI()->isLegalAddressingMode(AM, Ty);
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132 }
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133
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134 int getScalingFactorCost(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset,
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
135 bool HasBaseReg, int64_t Scale) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
136 TargetLoweringBase::AddrMode AM;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
137 AM.BaseGV = BaseGV;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
138 AM.BaseOffs = BaseOffset;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
139 AM.HasBaseReg = HasBaseReg;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
140 AM.Scale = Scale;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
141 return getTLI()->getScalingFactorCost(AM, Ty);
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
142 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
143
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
144 bool isTruncateFree(Type *Ty1, Type *Ty2) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
145 return getTLI()->isTruncateFree(Ty1, Ty2);
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
146 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
147
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
148 bool isTypeLegal(Type *Ty) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
149 EVT VT = getTLI()->getValueType(Ty);
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
150 return getTLI()->isTypeLegal(VT);
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
151 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
152
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
153 unsigned getIntrinsicCost(Intrinsic::ID IID, Type *RetTy,
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
154 ArrayRef<const Value *> Arguments) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
155 return BaseT::getIntrinsicCost(IID, RetTy, Arguments);
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
156 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
157
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
158 unsigned getIntrinsicCost(Intrinsic::ID IID, Type *RetTy,
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
159 ArrayRef<Type *> ParamTys) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
160 if (IID == Intrinsic::cttz) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
161 if (getTLI()->isCheapToSpeculateCttz())
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
162 return TargetTransformInfo::TCC_Basic;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
163 return TargetTransformInfo::TCC_Expensive;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
164 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
165
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
166 if (IID == Intrinsic::ctlz) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
167 if (getTLI()->isCheapToSpeculateCtlz())
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
168 return TargetTransformInfo::TCC_Basic;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
169 return TargetTransformInfo::TCC_Expensive;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
170 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
171
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
172 return BaseT::getIntrinsicCost(IID, RetTy, ParamTys);
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
173 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
174
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
175 unsigned getJumpBufAlignment() { return getTLI()->getJumpBufAlignment(); }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
176
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
177 unsigned getJumpBufSize() { return getTLI()->getJumpBufSize(); }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
178
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
179 bool shouldBuildLookupTables() {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
180 const TargetLoweringBase *TLI = getTLI();
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
181 return TLI->isOperationLegalOrCustom(ISD::BR_JT, MVT::Other) ||
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
182 TLI->isOperationLegalOrCustom(ISD::BRIND, MVT::Other);
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
183 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
184
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
185 bool haveFastSqrt(Type *Ty) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
186 const TargetLoweringBase *TLI = getTLI();
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
187 EVT VT = TLI->getValueType(Ty);
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
188 return TLI->isTypeLegal(VT) &&
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
189 TLI->isOperationLegalOrCustom(ISD::FSQRT, VT);
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
190 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
191
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
192 unsigned getFPOpCost(Type *Ty) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
193 // By default, FP instructions are no more expensive since they are
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
194 // implemented in HW. Target specific TTI can override this.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
195 return TargetTransformInfo::TCC_Basic;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
196 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
197
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
198 unsigned getOperationCost(unsigned Opcode, Type *Ty, Type *OpTy) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
199 const TargetLoweringBase *TLI = getTLI();
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
200 switch (Opcode) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
201 default: break;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
202 case Instruction::Trunc: {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
203 if (TLI->isTruncateFree(OpTy, Ty))
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
204 return TargetTransformInfo::TCC_Free;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
205 return TargetTransformInfo::TCC_Basic;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
206 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
207 case Instruction::ZExt: {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
208 if (TLI->isZExtFree(OpTy, Ty))
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
209 return TargetTransformInfo::TCC_Free;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
210 return TargetTransformInfo::TCC_Basic;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
211 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
212 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
213
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
214 return BaseT::getOperationCost(Opcode, Ty, OpTy);
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
215 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
216
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
217 void getUnrollingPreferences(Loop *L, TTI::UnrollingPreferences &UP) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
218 // This unrolling functionality is target independent, but to provide some
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
219 // motivation for its intended use, for x86:
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
220
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
221 // According to the Intel 64 and IA-32 Architectures Optimization Reference
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
222 // Manual, Intel Core models and later have a loop stream detector (and
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
223 // associated uop queue) that can benefit from partial unrolling.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
224 // The relevant requirements are:
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
225 // - The loop must have no more than 4 (8 for Nehalem and later) branches
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
226 // taken, and none of them may be calls.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
227 // - The loop can have no more than 18 (28 for Nehalem and later) uops.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
228
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
229 // According to the Software Optimization Guide for AMD Family 15h
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
230 // Processors, models 30h-4fh (Steamroller and later) have a loop predictor
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
231 // and loop buffer which can benefit from partial unrolling.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
232 // The relevant requirements are:
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
233 // - The loop must have fewer than 16 branches
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
234 // - The loop must have less than 40 uops in all executed loop branches
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
235
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
236 // The number of taken branches in a loop is hard to estimate here, and
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
237 // benchmarking has revealed that it is better not to be conservative when
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
238 // estimating the branch count. As a result, we'll ignore the branch limits
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
239 // until someone finds a case where it matters in practice.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
240
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
241 unsigned MaxOps;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
242 const TargetSubtargetInfo *ST = getST();
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
243 if (PartialUnrollingThreshold.getNumOccurrences() > 0)
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
244 MaxOps = PartialUnrollingThreshold;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
245 else if (ST->getSchedModel().LoopMicroOpBufferSize > 0)
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
246 MaxOps = ST->getSchedModel().LoopMicroOpBufferSize;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
247 else
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
248 return;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
249
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
250 // Scan the loop: don't unroll loops with calls.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
251 for (Loop::block_iterator I = L->block_begin(), E = L->block_end(); I != E;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
252 ++I) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
253 BasicBlock *BB = *I;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
254
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
255 for (BasicBlock::iterator J = BB->begin(), JE = BB->end(); J != JE; ++J)
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
256 if (isa<CallInst>(J) || isa<InvokeInst>(J)) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
257 ImmutableCallSite CS(J);
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
258 if (const Function *F = CS.getCalledFunction()) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
259 if (!static_cast<T *>(this)->isLoweredToCall(F))
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
260 continue;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
261 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
262
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
263 return;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
264 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
265 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
266
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
267 // Enable runtime and partial unrolling up to the specified size.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
268 UP.Partial = UP.Runtime = true;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
269 UP.PartialThreshold = UP.PartialOptSizeThreshold = MaxOps;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
270 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
271
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
272 /// @}
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
273
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
274 /// \name Vector TTI Implementations
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
275 /// @{
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
276
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
277 unsigned getNumberOfRegisters(bool Vector) { return 1; }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
278
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
279 unsigned getRegisterBitWidth(bool Vector) { return 32; }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
280
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
281 unsigned getMaxInterleaveFactor() { return 1; }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
282
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
283 unsigned getArithmeticInstrCost(
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
284 unsigned Opcode, Type *Ty,
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
285 TTI::OperandValueKind Opd1Info = TTI::OK_AnyValue,
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
286 TTI::OperandValueKind Opd2Info = TTI::OK_AnyValue,
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
287 TTI::OperandValueProperties Opd1PropInfo = TTI::OP_None,
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
288 TTI::OperandValueProperties Opd2PropInfo = TTI::OP_None) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
289 // Check if any of the operands are vector operands.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
290 const TargetLoweringBase *TLI = getTLI();
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
291 int ISD = TLI->InstructionOpcodeToISD(Opcode);
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
292 assert(ISD && "Invalid opcode");
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
293
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
294 std::pair<unsigned, MVT> LT = TLI->getTypeLegalizationCost(Ty);
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
295
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
296 bool IsFloat = Ty->getScalarType()->isFloatingPointTy();
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
297 // Assume that floating point arithmetic operations cost twice as much as
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
298 // integer operations.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
299 unsigned OpCost = (IsFloat ? 2 : 1);
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
300
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
301 if (TLI->isOperationLegalOrPromote(ISD, LT.second)) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
302 // The operation is legal. Assume it costs 1.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
303 // If the type is split to multiple registers, assume that there is some
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
304 // overhead to this.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
305 // TODO: Once we have extract/insert subvector cost we need to use them.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
306 if (LT.first > 1)
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
307 return LT.first * 2 * OpCost;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
308 return LT.first * 1 * OpCost;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
309 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
310
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
311 if (!TLI->isOperationExpand(ISD, LT.second)) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
312 // If the operation is custom lowered then assume
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
313 // thare the code is twice as expensive.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
314 return LT.first * 2 * OpCost;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
315 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
316
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
317 // Else, assume that we need to scalarize this op.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
318 if (Ty->isVectorTy()) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
319 unsigned Num = Ty->getVectorNumElements();
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
320 unsigned Cost = static_cast<T *>(this)
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
321 ->getArithmeticInstrCost(Opcode, Ty->getScalarType());
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
322 // return the cost of multiple scalar invocation plus the cost of
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
323 // inserting
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
324 // and extracting the values.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
325 return getScalarizationOverhead(Ty, true, true) + Num * Cost;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
326 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
327
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
328 // We don't know anything about this scalar instruction.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
329 return OpCost;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
330 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
331
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
332 unsigned getShuffleCost(TTI::ShuffleKind Kind, Type *Tp, int Index,
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
333 Type *SubTp) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
334 if (Kind == TTI::SK_Alternate) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
335 return getAltShuffleOverhead(Tp);
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
336 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
337 return 1;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
338 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
339
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
340 unsigned getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
341 const TargetLoweringBase *TLI = getTLI();
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
342 int ISD = TLI->InstructionOpcodeToISD(Opcode);
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
343 assert(ISD && "Invalid opcode");
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
344
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
345 std::pair<unsigned, MVT> SrcLT = TLI->getTypeLegalizationCost(Src);
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
346 std::pair<unsigned, MVT> DstLT = TLI->getTypeLegalizationCost(Dst);
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
347
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
348 // Check for NOOP conversions.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
349 if (SrcLT.first == DstLT.first &&
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
350 SrcLT.second.getSizeInBits() == DstLT.second.getSizeInBits()) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
351
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
352 // Bitcast between types that are legalized to the same type are free.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
353 if (Opcode == Instruction::BitCast || Opcode == Instruction::Trunc)
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
354 return 0;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
355 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
356
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
357 if (Opcode == Instruction::Trunc &&
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
358 TLI->isTruncateFree(SrcLT.second, DstLT.second))
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
359 return 0;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
360
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
361 if (Opcode == Instruction::ZExt &&
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
362 TLI->isZExtFree(SrcLT.second, DstLT.second))
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
363 return 0;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
364
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
365 // If the cast is marked as legal (or promote) then assume low cost.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
366 if (SrcLT.first == DstLT.first &&
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
367 TLI->isOperationLegalOrPromote(ISD, DstLT.second))
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
368 return 1;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
369
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
370 // Handle scalar conversions.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
371 if (!Src->isVectorTy() && !Dst->isVectorTy()) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
372
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
373 // Scalar bitcasts are usually free.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
374 if (Opcode == Instruction::BitCast)
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
375 return 0;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
376
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
377 // Just check the op cost. If the operation is legal then assume it costs
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
378 // 1.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
379 if (!TLI->isOperationExpand(ISD, DstLT.second))
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
380 return 1;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
381
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
382 // Assume that illegal scalar instruction are expensive.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
383 return 4;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
384 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
385
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
386 // Check vector-to-vector casts.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
387 if (Dst->isVectorTy() && Src->isVectorTy()) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
388
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
389 // If the cast is between same-sized registers, then the check is simple.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
390 if (SrcLT.first == DstLT.first &&
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
391 SrcLT.second.getSizeInBits() == DstLT.second.getSizeInBits()) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
392
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
393 // Assume that Zext is done using AND.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
394 if (Opcode == Instruction::ZExt)
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
395 return 1;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
396
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
397 // Assume that sext is done using SHL and SRA.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
398 if (Opcode == Instruction::SExt)
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
399 return 2;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
400
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
401 // Just check the op cost. If the operation is legal then assume it
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
402 // costs
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
403 // 1 and multiply by the type-legalization overhead.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
404 if (!TLI->isOperationExpand(ISD, DstLT.second))
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
405 return SrcLT.first * 1;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
406 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
407
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
408 // If we are converting vectors and the operation is illegal, or
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
409 // if the vectors are legalized to different types, estimate the
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
410 // scalarization costs.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
411 unsigned Num = Dst->getVectorNumElements();
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
412 unsigned Cost = static_cast<T *>(this)->getCastInstrCost(
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
413 Opcode, Dst->getScalarType(), Src->getScalarType());
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
414
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
415 // Return the cost of multiple scalar invocation plus the cost of
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
416 // inserting and extracting the values.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
417 return getScalarizationOverhead(Dst, true, true) + Num * Cost;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
418 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
419
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
420 // We already handled vector-to-vector and scalar-to-scalar conversions.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
421 // This
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
422 // is where we handle bitcast between vectors and scalars. We need to assume
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
423 // that the conversion is scalarized in one way or another.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
424 if (Opcode == Instruction::BitCast)
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
425 // Illegal bitcasts are done by storing and loading from a stack slot.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
426 return (Src->isVectorTy() ? getScalarizationOverhead(Src, false, true)
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
427 : 0) +
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
428 (Dst->isVectorTy() ? getScalarizationOverhead(Dst, true, false)
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
429 : 0);
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
430
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
431 llvm_unreachable("Unhandled cast");
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
432 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
433
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
434 unsigned getCFInstrCost(unsigned Opcode) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
435 // Branches are assumed to be predicted.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
436 return 0;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
437 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
438
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
439 unsigned getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
440 const TargetLoweringBase *TLI = getTLI();
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
441 int ISD = TLI->InstructionOpcodeToISD(Opcode);
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
442 assert(ISD && "Invalid opcode");
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
443
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
444 // Selects on vectors are actually vector selects.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
445 if (ISD == ISD::SELECT) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
446 assert(CondTy && "CondTy must exist");
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
447 if (CondTy->isVectorTy())
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
448 ISD = ISD::VSELECT;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
449 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
450
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
451 std::pair<unsigned, MVT> LT = TLI->getTypeLegalizationCost(ValTy);
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
452
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
453 if (!(ValTy->isVectorTy() && !LT.second.isVector()) &&
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
454 !TLI->isOperationExpand(ISD, LT.second)) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
455 // The operation is legal. Assume it costs 1. Multiply
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
456 // by the type-legalization overhead.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
457 return LT.first * 1;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
458 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
459
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
460 // Otherwise, assume that the cast is scalarized.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
461 if (ValTy->isVectorTy()) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
462 unsigned Num = ValTy->getVectorNumElements();
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
463 if (CondTy)
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
464 CondTy = CondTy->getScalarType();
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
465 unsigned Cost = static_cast<T *>(this)->getCmpSelInstrCost(
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
466 Opcode, ValTy->getScalarType(), CondTy);
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
467
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
468 // Return the cost of multiple scalar invocation plus the cost of
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
469 // inserting
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
470 // and extracting the values.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
471 return getScalarizationOverhead(ValTy, true, false) + Num * Cost;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
472 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
473
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
474 // Unknown scalar opcode.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
475 return 1;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
476 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
477
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
478 unsigned getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
479 std::pair<unsigned, MVT> LT =
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
480 getTLI()->getTypeLegalizationCost(Val->getScalarType());
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
481
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
482 return LT.first;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
483 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
484
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
485 unsigned getMemoryOpCost(unsigned Opcode, Type *Src, unsigned Alignment,
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
486 unsigned AddressSpace) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
487 assert(!Src->isVoidTy() && "Invalid type");
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
488 std::pair<unsigned, MVT> LT = getTLI()->getTypeLegalizationCost(Src);
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
489
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
490 // Assuming that all loads of legal types cost 1.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
491 unsigned Cost = LT.first;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
492
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
493 if (Src->isVectorTy() &&
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
494 Src->getPrimitiveSizeInBits() < LT.second.getSizeInBits()) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
495 // This is a vector load that legalizes to a larger type than the vector
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
496 // itself. Unless the corresponding extending load or truncating store is
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
497 // legal, then this will scalarize.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
498 TargetLowering::LegalizeAction LA = TargetLowering::Expand;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
499 EVT MemVT = getTLI()->getValueType(Src, true);
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
500 if (MemVT.isSimple() && MemVT != MVT::Other) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
501 if (Opcode == Instruction::Store)
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
502 LA = getTLI()->getTruncStoreAction(LT.second, MemVT.getSimpleVT());
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
503 else
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
504 LA = getTLI()->getLoadExtAction(ISD::EXTLOAD, LT.second, MemVT);
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
505 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
506
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
507 if (LA != TargetLowering::Legal && LA != TargetLowering::Custom) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
508 // This is a vector load/store for some illegal type that is scalarized.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
509 // We must account for the cost of building or decomposing the vector.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
510 Cost += getScalarizationOverhead(Src, Opcode != Instruction::Store,
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
511 Opcode == Instruction::Store);
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
512 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
513 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
514
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
515 return Cost;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
516 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
517
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
518 unsigned getIntrinsicInstrCost(Intrinsic::ID IID, Type *RetTy,
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
519 ArrayRef<Type *> Tys) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
520 unsigned ISD = 0;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
521 switch (IID) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
522 default: {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
523 // Assume that we need to scalarize this intrinsic.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
524 unsigned ScalarizationCost = 0;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
525 unsigned ScalarCalls = 1;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
526 if (RetTy->isVectorTy()) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
527 ScalarizationCost = getScalarizationOverhead(RetTy, true, false);
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
528 ScalarCalls = std::max(ScalarCalls, RetTy->getVectorNumElements());
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
529 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
530 for (unsigned i = 0, ie = Tys.size(); i != ie; ++i) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
531 if (Tys[i]->isVectorTy()) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
532 ScalarizationCost += getScalarizationOverhead(Tys[i], false, true);
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
533 ScalarCalls = std::max(ScalarCalls, RetTy->getVectorNumElements());
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
534 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
535 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
536
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
537 return ScalarCalls + ScalarizationCost;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
538 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
539 // Look for intrinsics that can be lowered directly or turned into a scalar
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
540 // intrinsic call.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
541 case Intrinsic::sqrt:
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
542 ISD = ISD::FSQRT;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
543 break;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
544 case Intrinsic::sin:
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
545 ISD = ISD::FSIN;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
546 break;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
547 case Intrinsic::cos:
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
548 ISD = ISD::FCOS;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
549 break;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
550 case Intrinsic::exp:
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
551 ISD = ISD::FEXP;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
552 break;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
553 case Intrinsic::exp2:
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
554 ISD = ISD::FEXP2;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
555 break;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
556 case Intrinsic::log:
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
557 ISD = ISD::FLOG;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
558 break;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
559 case Intrinsic::log10:
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
560 ISD = ISD::FLOG10;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
561 break;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
562 case Intrinsic::log2:
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
563 ISD = ISD::FLOG2;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
564 break;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
565 case Intrinsic::fabs:
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
566 ISD = ISD::FABS;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
567 break;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
568 case Intrinsic::minnum:
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
569 ISD = ISD::FMINNUM;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
570 break;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
571 case Intrinsic::maxnum:
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
572 ISD = ISD::FMAXNUM;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
573 break;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
574 case Intrinsic::copysign:
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
575 ISD = ISD::FCOPYSIGN;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
576 break;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
577 case Intrinsic::floor:
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
578 ISD = ISD::FFLOOR;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
579 break;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
580 case Intrinsic::ceil:
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
581 ISD = ISD::FCEIL;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
582 break;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
583 case Intrinsic::trunc:
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
584 ISD = ISD::FTRUNC;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
585 break;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
586 case Intrinsic::nearbyint:
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
587 ISD = ISD::FNEARBYINT;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
588 break;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
589 case Intrinsic::rint:
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
590 ISD = ISD::FRINT;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
591 break;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
592 case Intrinsic::round:
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
593 ISD = ISD::FROUND;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
594 break;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
595 case Intrinsic::pow:
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
596 ISD = ISD::FPOW;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
597 break;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
598 case Intrinsic::fma:
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
599 ISD = ISD::FMA;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
600 break;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
601 case Intrinsic::fmuladd:
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
602 ISD = ISD::FMA;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
603 break;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
604 // FIXME: We should return 0 whenever getIntrinsicCost == TCC_Free.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
605 case Intrinsic::lifetime_start:
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
606 case Intrinsic::lifetime_end:
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
607 return 0;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
608 case Intrinsic::masked_store:
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
609 return static_cast<T *>(this)
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
610 ->getMaskedMemoryOpCost(Instruction::Store, Tys[0], 0, 0);
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
611 case Intrinsic::masked_load:
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
612 return static_cast<T *>(this)
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
613 ->getMaskedMemoryOpCost(Instruction::Load, RetTy, 0, 0);
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
614 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
615
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
616 const TargetLoweringBase *TLI = getTLI();
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
617 std::pair<unsigned, MVT> LT = TLI->getTypeLegalizationCost(RetTy);
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
618
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
619 if (TLI->isOperationLegalOrPromote(ISD, LT.second)) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
620 // The operation is legal. Assume it costs 1.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
621 // If the type is split to multiple registers, assume that there is some
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
622 // overhead to this.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
623 // TODO: Once we have extract/insert subvector cost we need to use them.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
624 if (LT.first > 1)
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
625 return LT.first * 2;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
626 return LT.first * 1;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
627 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
628
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
629 if (!TLI->isOperationExpand(ISD, LT.second)) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
630 // If the operation is custom lowered then assume
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
631 // thare the code is twice as expensive.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
632 return LT.first * 2;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
633 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
634
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
635 // If we can't lower fmuladd into an FMA estimate the cost as a floating
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
636 // point mul followed by an add.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
637 if (IID == Intrinsic::fmuladd)
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
638 return static_cast<T *>(this)
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
639 ->getArithmeticInstrCost(BinaryOperator::FMul, RetTy) +
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
640 static_cast<T *>(this)
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
641 ->getArithmeticInstrCost(BinaryOperator::FAdd, RetTy);
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
642
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
643 // Else, assume that we need to scalarize this intrinsic. For math builtins
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
644 // this will emit a costly libcall, adding call overhead and spills. Make it
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
645 // very expensive.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
646 if (RetTy->isVectorTy()) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
647 unsigned Num = RetTy->getVectorNumElements();
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
648 unsigned Cost = static_cast<T *>(this)->getIntrinsicInstrCost(
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
649 IID, RetTy->getScalarType(), Tys);
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
650 return 10 * Cost * Num;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
651 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
652
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
653 // This is going to be turned into a library call, make it expensive.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
654 return 10;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
655 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
656
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
657 unsigned getNumberOfParts(Type *Tp) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
658 std::pair<unsigned, MVT> LT = getTLI()->getTypeLegalizationCost(Tp);
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
659 return LT.first;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
660 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
661
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
662 unsigned getAddressComputationCost(Type *Ty, bool IsComplex) { return 0; }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
663
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
664 unsigned getReductionCost(unsigned Opcode, Type *Ty, bool IsPairwise) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
665 assert(Ty->isVectorTy() && "Expect a vector type");
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
666 unsigned NumVecElts = Ty->getVectorNumElements();
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
667 unsigned NumReduxLevels = Log2_32(NumVecElts);
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
668 unsigned ArithCost =
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
669 NumReduxLevels *
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
670 static_cast<T *>(this)->getArithmeticInstrCost(Opcode, Ty);
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
671 // Assume the pairwise shuffles add a cost.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
672 unsigned ShuffleCost =
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
673 NumReduxLevels * (IsPairwise + 1) *
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
674 static_cast<T *>(this)
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
675 ->getShuffleCost(TTI::SK_ExtractSubvector, Ty, NumVecElts / 2, Ty);
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
676 return ShuffleCost + ArithCost + getScalarizationOverhead(Ty, false, true);
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
677 }
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
678
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
679 /// @}
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents:
diff changeset
680 };
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681
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682 /// \brief Concrete BasicTTIImpl that can be used if no further customization
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683 /// is needed.
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684 class BasicTTIImpl : public BasicTTIImplBase<BasicTTIImpl> {
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685 typedef BasicTTIImplBase<BasicTTIImpl> BaseT;
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686 friend class BasicTTIImplBase<BasicTTIImpl>;
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687
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688 const TargetSubtargetInfo *ST;
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689 const TargetLoweringBase *TLI;
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690
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691 const TargetSubtargetInfo *getST() const { return ST; }
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692 const TargetLoweringBase *getTLI() const { return TLI; }
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693
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694 public:
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695 explicit BasicTTIImpl(const TargetMachine *ST, Function &F);
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696
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697 // Provide value semantics. MSVC requires that we spell all of these out.
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698 BasicTTIImpl(const BasicTTIImpl &Arg)
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699 : BaseT(static_cast<const BaseT &>(Arg)), ST(Arg.ST), TLI(Arg.TLI) {}
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700 BasicTTIImpl(BasicTTIImpl &&Arg)
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701 : BaseT(std::move(static_cast<BaseT &>(Arg))), ST(std::move(Arg.ST)),
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702 TLI(std::move(Arg.TLI)) {}
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703 BasicTTIImpl &operator=(const BasicTTIImpl &RHS) {
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704 BaseT::operator=(static_cast<const BaseT &>(RHS));
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705 ST = RHS.ST;
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706 TLI = RHS.TLI;
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707 return *this;
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708 }
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709 BasicTTIImpl &operator=(BasicTTIImpl &&RHS) {
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710 BaseT::operator=(std::move(static_cast<BaseT &>(RHS)));
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711 ST = std::move(RHS.ST);
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712 TLI = std::move(RHS.TLI);
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713 return *this;
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714 }
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715 };
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716
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717 }
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718
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719 #endif