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annotate test/CodeGen/X86/vec_set-3.ll @ 83:60c9769439b8 LLVM3.7

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LLVM 3.7
author Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
date Wed, 18 Feb 2015 14:55:36 +0900
parents 54457678186b
children 1172e4bd9c6f
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1 ; RUN: llc < %s -march=x86 -mattr=+sse2 -mcpu=penryn | FileCheck %s
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3 define <4 x float> @test(float %a) {
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4 ; CHECK-LABEL: test:
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5 ; CHECK: insertps $29, {{.*}}, %xmm0
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6 ; CHECK-NEXT: retl
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8 entry:
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9 %tmp = insertelement <4 x float> zeroinitializer, float %a, i32 1
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10 %tmp5 = insertelement <4 x float> %tmp, float 0.000000e+00, i32 2
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11 %tmp6 = insertelement <4 x float> %tmp5, float 0.000000e+00, i32 3
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12 ret <4 x float> %tmp6
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13 }
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15 define <2 x i64> @test2(i32 %a) {
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16 ; CHECK-LABEL: test2:
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17 ; CHECK: movd {{.*}}, %xmm0
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18 ; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,0,1]
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19 ; CHECK-NEXT: retl
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21 entry:
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22 %tmp7 = insertelement <4 x i32> zeroinitializer, i32 %a, i32 2
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23 %tmp9 = insertelement <4 x i32> %tmp7, i32 0, i32 3
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24 %tmp10 = bitcast <4 x i32> %tmp9 to <2 x i64>
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25 ret <2 x i64> %tmp10
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26 }
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28 define <4 x float> @test3(<4 x float> %A) {
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29 ; CHECK-LABEL: test3:
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30 ; CHECK: insertps {{.*#+}} xmm0 = zero,xmm0[0],zero,zero
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31 ; CHECK-NEXT: retl
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32
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33 %tmp0 = extractelement <4 x float> %A, i32 0
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34 %tmp1 = insertelement <4 x float> <float 0.000000e+00, float undef, float undef, float undef >, float %tmp0, i32 1
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35 %tmp2 = insertelement <4 x float> %tmp1, float 0.000000e+00, i32 2
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36 ret <4 x float> %tmp2
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37 }