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1 //===- Target.h -------------------------------------------------*- C++ -*-===//
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2 //
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3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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4 // See https://llvm.org/LICENSE.txt for license information.
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5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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6 //
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7 //===----------------------------------------------------------------------===//
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8
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9 #ifndef LLD_ELF_TARGET_H
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10 #define LLD_ELF_TARGET_H
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11
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12 #include "InputSection.h"
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13 #include "lld/Common/ErrorHandler.h"
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14 #include "llvm/Object/ELF.h"
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15 #include "llvm/Support/MathExtras.h"
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16 #include <array>
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17
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18 namespace lld {
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19 std::string toString(elf::RelType type);
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20
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21 namespace elf {
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22 class Defined;
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23 class InputFile;
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24 class Symbol;
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25
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26 class TargetInfo {
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27 public:
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28 virtual uint32_t calcEFlags() const { return 0; }
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29 virtual RelExpr getRelExpr(RelType type, const Symbol &s,
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30 const uint8_t *loc) const = 0;
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31 virtual RelType getDynRel(RelType type) const { return 0; }
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32 virtual void writeGotPltHeader(uint8_t *buf) const {}
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33 virtual void writeGotHeader(uint8_t *buf) const {}
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34 virtual void writeGotPlt(uint8_t *buf, const Symbol &s) const {};
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35 virtual void writeIgotPlt(uint8_t *buf, const Symbol &s) const {}
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36 virtual int64_t getImplicitAddend(const uint8_t *buf, RelType type) const;
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37 virtual int getTlsGdRelaxSkip(RelType type) const { return 1; }
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38
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39 // If lazy binding is supported, the first entry of the PLT has code
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40 // to call the dynamic linker to resolve PLT entries the first time
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41 // they are called. This function writes that code.
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42 virtual void writePltHeader(uint8_t *buf) const {}
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43
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44 virtual void writePlt(uint8_t *buf, const Symbol &sym,
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45 uint64_t pltEntryAddr) const {}
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46 virtual void writeIplt(uint8_t *buf, const Symbol &sym,
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47 uint64_t pltEntryAddr) const {
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48 // All but PPC32 and PPC64 use the same format for .plt and .iplt entries.
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49 writePlt(buf, sym, pltEntryAddr);
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50 }
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51 virtual void writeIBTPlt(uint8_t *buf, size_t numEntries) const {}
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52 virtual void addPltHeaderSymbols(InputSection &isec) const {}
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53 virtual void addPltSymbols(InputSection &isec, uint64_t off) const {}
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54
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55 // Returns true if a relocation only uses the low bits of a value such that
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56 // all those bits are in the same page. For example, if the relocation
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57 // only uses the low 12 bits in a system with 4k pages. If this is true, the
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58 // bits will always have the same value at runtime and we don't have to emit
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59 // a dynamic relocation.
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60 virtual bool usesOnlyLowPageBits(RelType type) const;
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61
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62 // Decide whether a Thunk is needed for the relocation from File
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63 // targeting S.
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64 virtual bool needsThunk(RelExpr expr, RelType relocType,
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65 const InputFile *file, uint64_t branchAddr,
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66 const Symbol &s, int64_t a) const;
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67
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68 // On systems with range extensions we place collections of Thunks at
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69 // regular spacings that enable the majority of branches reach the Thunks.
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70 // a value of 0 means range extension thunks are not supported.
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71 virtual uint32_t getThunkSectionSpacing() const { return 0; }
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72
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73 // The function with a prologue starting at Loc was compiled with
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74 // -fsplit-stack and it calls a function compiled without. Adjust the prologue
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75 // to do the right thing. See https://gcc.gnu.org/wiki/SplitStacks.
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76 // The symbols st_other flags are needed on PowerPC64 for determining the
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77 // offset to the split-stack prologue.
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78 virtual bool adjustPrologueForCrossSplitStack(uint8_t *loc, uint8_t *end,
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79 uint8_t stOther) const;
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80
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81 // Return true if we can reach dst from src with RelType type.
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82 virtual bool inBranchRange(RelType type, uint64_t src,
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83 uint64_t dst) const;
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84
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85 virtual void relocate(uint8_t *loc, const Relocation &rel,
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86 uint64_t val) const = 0;
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87 void relocateNoSym(uint8_t *loc, RelType type, uint64_t val) const {
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88 relocate(loc, Relocation{R_NONE, type, 0, 0, nullptr}, val);
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89 }
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90
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173
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91 virtual void applyJumpInstrMod(uint8_t *loc, JumpModType type,
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92 JumpModType val) const {}
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93
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150
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94 virtual ~TargetInfo();
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95
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173
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96 // This deletes a jump insn at the end of the section if it is a fall thru to
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97 // the next section. Further, if there is a conditional jump and a direct
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98 // jump consecutively, it tries to flip the conditional jump to convert the
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99 // direct jump into a fall thru and delete it. Returns true if a jump
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100 // instruction can be deleted.
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101 virtual bool deleteFallThruJmpInsn(InputSection &is, InputFile *file,
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102 InputSection *nextIS) const {
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103 return false;
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104 }
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105
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150
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106 unsigned defaultCommonPageSize = 4096;
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107 unsigned defaultMaxPageSize = 4096;
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108
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109 uint64_t getImageBase() const;
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110
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111 // True if _GLOBAL_OFFSET_TABLE_ is relative to .got.plt, false if .got.
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112 bool gotBaseSymInGotPlt = true;
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113
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114 RelType copyRel;
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115 RelType gotRel;
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116 RelType noneRel;
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117 RelType pltRel;
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118 RelType relativeRel;
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119 RelType iRelativeRel;
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120 RelType symbolicRel;
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121 RelType tlsDescRel;
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122 RelType tlsGotRel;
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123 RelType tlsModuleIndexRel;
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124 RelType tlsOffsetRel;
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221
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125 unsigned gotEntrySize = config->wordsize;
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150
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126 unsigned pltEntrySize;
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127 unsigned pltHeaderSize;
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128 unsigned ipltEntrySize;
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129
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130 // At least on x86_64 positions 1 and 2 are used by the first plt entry
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131 // to support lazy loading.
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132 unsigned gotPltHeaderEntriesNum = 3;
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133
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134 // On PPC ELF V2 abi, the first entry in the .got is the .TOC.
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135 unsigned gotHeaderEntriesNum = 0;
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136
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137 bool needsThunks = false;
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138
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139 // A 4-byte field corresponding to one or more trap instructions, used to pad
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140 // executable OutputSections.
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141 std::array<uint8_t, 4> trapInstr;
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142
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173
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143 // Stores the NOP instructions of different sizes for the target and is used
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144 // to pad sections that are relaxed.
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145 llvm::Optional<std::vector<std::vector<uint8_t>>> nopInstrs;
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146
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150
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147 // If a target needs to rewrite calls to __morestack to instead call
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148 // __morestack_non_split when a split-stack enabled caller calls a
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149 // non-split-stack callee this will return true. Otherwise returns false.
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150 bool needsMoreStackNonSplit = true;
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151
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221
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152 virtual RelExpr adjustTlsExpr(RelType type, RelExpr expr) const;
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153 virtual RelExpr adjustGotPcExpr(RelType type, int64_t addend,
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154 const uint8_t *loc) const;
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150
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155 virtual void relaxGot(uint8_t *loc, const Relocation &rel,
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156 uint64_t val) const;
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157 virtual void relaxTlsGdToIe(uint8_t *loc, const Relocation &rel,
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158 uint64_t val) const;
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159 virtual void relaxTlsGdToLe(uint8_t *loc, const Relocation &rel,
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160 uint64_t val) const;
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161 virtual void relaxTlsIeToLe(uint8_t *loc, const Relocation &rel,
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162 uint64_t val) const;
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163 virtual void relaxTlsLdToLe(uint8_t *loc, const Relocation &rel,
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164 uint64_t val) const;
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165
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166 protected:
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167 // On FreeBSD x86_64 the first page cannot be mmaped.
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168 // On Linux this is controlled by vm.mmap_min_addr. At least on some x86_64
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169 // installs this is set to 65536, so the first 15 pages cannot be used.
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170 // Given that, the smallest value that can be used in here is 0x10000.
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171 uint64_t defaultImageBase = 0x10000;
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172 };
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173
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174 TargetInfo *getAArch64TargetInfo();
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175 TargetInfo *getAMDGPUTargetInfo();
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176 TargetInfo *getARMTargetInfo();
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177 TargetInfo *getAVRTargetInfo();
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178 TargetInfo *getHexagonTargetInfo();
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179 TargetInfo *getMSP430TargetInfo();
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180 TargetInfo *getPPC64TargetInfo();
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181 TargetInfo *getPPCTargetInfo();
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182 TargetInfo *getRISCVTargetInfo();
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183 TargetInfo *getSPARCV9TargetInfo();
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184 TargetInfo *getX86TargetInfo();
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185 TargetInfo *getX86_64TargetInfo();
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186 template <class ELFT> TargetInfo *getMipsTargetInfo();
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187
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188 struct ErrorPlace {
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189 InputSectionBase *isec;
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190 std::string loc;
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191 };
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192
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193 // Returns input section and corresponding source string for the given location.
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194 ErrorPlace getErrorPlace(const uint8_t *loc);
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195
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196 static inline std::string getErrorLocation(const uint8_t *loc) {
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197 return getErrorPlace(loc).loc;
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198 }
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199
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200 void writePPC32GlinkSection(uint8_t *buf, size_t numEntries);
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201
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202 bool tryRelaxPPC64TocIndirection(const Relocation &rel, uint8_t *bufLoc);
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203 unsigned getPPCDFormOp(unsigned secondaryOp);
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204
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205 // In the PowerPC64 Elf V2 abi a function can have 2 entry points. The first
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206 // is a global entry point (GEP) which typically is used to initialize the TOC
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207 // pointer in general purpose register 2. The second is a local entry
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208 // point (LEP) which bypasses the TOC pointer initialization code. The
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209 // offset between GEP and LEP is encoded in a function's st_other flags.
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210 // This function will return the offset (in bytes) from the global entry-point
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211 // to the local entry-point.
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212 unsigned getPPC64GlobalEntryToLocalEntryOffset(uint8_t stOther);
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213
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214 // Returns true if a relocation is a small code model relocation that accesses
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215 // the .toc section.
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216 bool isPPC64SmallCodeModelTocReloc(RelType type);
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217
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221
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218 // Write a prefixed instruction, which is a 4-byte prefix followed by a 4-byte
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219 // instruction (regardless of endianness). Therefore, the prefix is always in
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220 // lower memory than the instruction.
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221 void writePrefixedInstruction(uint8_t *loc, uint64_t insn);
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222
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223 void addPPC64SaveRestore();
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150
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224 uint64_t getPPC64TocBase();
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225 uint64_t getAArch64Page(uint64_t expr);
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226
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227 extern const TargetInfo *target;
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228 TargetInfo *getTarget();
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229
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230 template <class ELFT> bool isMipsPIC(const Defined *sym);
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231
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232 void reportRangeError(uint8_t *loc, const Relocation &rel, const Twine &v,
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233 int64_t min, uint64_t max);
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221
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234 void reportRangeError(uint8_t *loc, int64_t v, int n, const Symbol &sym,
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235 const Twine &msg);
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150
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236
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237 // Make sure that V can be represented as an N bit signed integer.
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238 inline void checkInt(uint8_t *loc, int64_t v, int n, const Relocation &rel) {
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239 if (v != llvm::SignExtend64(v, n))
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240 reportRangeError(loc, rel, Twine(v), llvm::minIntN(n), llvm::maxIntN(n));
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241 }
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242
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243 // Make sure that V can be represented as an N bit unsigned integer.
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244 inline void checkUInt(uint8_t *loc, uint64_t v, int n, const Relocation &rel) {
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245 if ((v >> n) != 0)
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246 reportRangeError(loc, rel, Twine(v), 0, llvm::maxUIntN(n));
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247 }
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248
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249 // Make sure that V can be represented as an N bit signed or unsigned integer.
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250 inline void checkIntUInt(uint8_t *loc, uint64_t v, int n,
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251 const Relocation &rel) {
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252 // For the error message we should cast V to a signed integer so that error
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253 // messages show a small negative value rather than an extremely large one
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254 if (v != (uint64_t)llvm::SignExtend64(v, n) && (v >> n) != 0)
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255 reportRangeError(loc, rel, Twine((int64_t)v), llvm::minIntN(n),
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256 llvm::maxUIntN(n));
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257 }
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258
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259 inline void checkAlignment(uint8_t *loc, uint64_t v, int n,
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260 const Relocation &rel) {
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261 if ((v & (n - 1)) != 0)
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262 error(getErrorLocation(loc) + "improper alignment for relocation " +
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263 lld::toString(rel.type) + ": 0x" + llvm::utohexstr(v) +
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264 " is not aligned to " + Twine(n) + " bytes");
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265 }
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266
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267 // Endianness-aware read/write.
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268 inline uint16_t read16(const void *p) {
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269 return llvm::support::endian::read16(p, config->endianness);
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270 }
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271
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272 inline uint32_t read32(const void *p) {
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273 return llvm::support::endian::read32(p, config->endianness);
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274 }
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275
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276 inline uint64_t read64(const void *p) {
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277 return llvm::support::endian::read64(p, config->endianness);
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278 }
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279
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280 inline void write16(void *p, uint16_t v) {
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281 llvm::support::endian::write16(p, v, config->endianness);
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282 }
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283
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284 inline void write32(void *p, uint32_t v) {
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285 llvm::support::endian::write32(p, v, config->endianness);
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286 }
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287
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288 inline void write64(void *p, uint64_t v) {
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289 llvm::support::endian::write64(p, v, config->endianness);
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290 }
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291 } // namespace elf
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292 } // namespace lld
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293
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294 #endif
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