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150
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1 ;RUN: llc < %s -march=amdgcn -verify-machineinstrs | FileCheck --check-prefix=SI --check-prefix=FUNC %s
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221
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2 ;RUN: llc < %s -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs | FileCheck --check-prefix=VI --check-prefix=FUNC %s
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150
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3 ;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=EG --check-prefix=FUNC %s
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4
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5 ; FUNC-LABEL: {{^}}test_select_v2i32:
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6
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7 ; EG-DAG: CNDE_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW], T[0-9]+\.[XYZW]}}, KC0[3].Z
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8 ; EG-DAG: CNDE_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW], T[0-9]+\.[XYZW]}}, KC0[3].Y
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9
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221
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10 ; VI: s_cmp_gt_i32
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11 ; VI: s_cselect_b32
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12 ; VI: s_cmp_gt_i32
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13 ; VI: s_cselect_b32
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14
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150
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15 ; SI: v_cmp_gt_i32_e32 vcc
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16 ; SI: v_cndmask_b32_e32
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17 ; SI: v_cmp_gt_i32_e32 vcc
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18 ; SI: v_cndmask_b32_e32
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19
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20 define amdgpu_kernel void @test_select_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32> addrspace(1)* %in0, <2 x i32> addrspace(1)* %in1, <2 x i32> %val) {
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21 entry:
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22 %load0 = load <2 x i32>, <2 x i32> addrspace(1)* %in0
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23 %load1 = load <2 x i32>, <2 x i32> addrspace(1)* %in1
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24 %cmp = icmp sgt <2 x i32> %load0, %load1
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25 %result = select <2 x i1> %cmp, <2 x i32> %val, <2 x i32> %load0
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26 store <2 x i32> %result, <2 x i32> addrspace(1)* %out
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27 ret void
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28 }
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29
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30 ; FUNC-LABEL: {{^}}test_select_v2f32:
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31
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32 ; EG: CNDE_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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33 ; EG: CNDE_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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34
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35 ; SI: v_cmp_neq_f32_e32 vcc
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36 ; SI: v_cndmask_b32_e32
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37 ; SI: v_cmp_neq_f32_e32 vcc
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38 ; SI: v_cndmask_b32_e32
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39
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40 define amdgpu_kernel void @test_select_v2f32(<2 x float> addrspace(1)* %out, <2 x float> addrspace(1)* %in0, <2 x float> addrspace(1)* %in1) {
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41 entry:
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42 %0 = load <2 x float>, <2 x float> addrspace(1)* %in0
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43 %1 = load <2 x float>, <2 x float> addrspace(1)* %in1
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44 %cmp = fcmp une <2 x float> %0, %1
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45 %result = select <2 x i1> %cmp, <2 x float> %0, <2 x float> %1
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46 store <2 x float> %result, <2 x float> addrspace(1)* %out
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47 ret void
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48 }
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49
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50 ;FUNC-LABEL: {{^}}test_select_v4i32:
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51
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52 ; EG-DAG: CNDE_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW], T[0-9]+\.[XYZW]}}, KC0[4].X
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53 ; EG-DAG: CNDE_INT {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}, KC0[3].W
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54 ; EG-DAG: CNDE_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW], T[0-9]+\.[XYZW]}}, KC0[3].Z
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55 ; EG-DAG: CNDE_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW], T[0-9]+\.[XYZW]}}, KC0[3].Y
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56
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221
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57 ; VI: s_cselect_b32
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58 ; VI: s_cselect_b32
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59 ; VI: s_cselect_b32
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60 ; VI: s_cselect_b32
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61
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150
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62 ; SI: v_cndmask_b32_e32
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63 ; SI: v_cndmask_b32_e32
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64 ; SI: v_cndmask_b32_e32
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65 ; SI: v_cndmask_b32_e32
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66
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67 define amdgpu_kernel void @test_select_v4i32(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %in0, <4 x i32> addrspace(1)* %in1, <4 x i32> %val) {
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68 entry:
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69 %load0 = load <4 x i32>, <4 x i32> addrspace(1)* %in0
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70 %load1 = load <4 x i32>, <4 x i32> addrspace(1)* %in1
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71 %cmp = icmp sgt <4 x i32> %load0, %load1
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72 %result = select <4 x i1> %cmp, <4 x i32> %val, <4 x i32> %load0
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73 store <4 x i32> %result, <4 x i32> addrspace(1)* %out
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74 ret void
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75 }
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76
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77 ;FUNC-LABEL: {{^}}test_select_v4f32:
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78 ;EG: CNDE_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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79 ;EG: CNDE_INT {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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80 ;EG: CNDE_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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81 ;EG: CNDE_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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82
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83 ; SI: v_cndmask_b32_e32
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84 ; SI: v_cndmask_b32_e32
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85 ; SI: v_cndmask_b32_e32
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86 ; SI: v_cndmask_b32_e32
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87 define amdgpu_kernel void @test_select_v4f32(<4 x float> addrspace(1)* %out, <4 x float> addrspace(1)* %in0, <4 x float> addrspace(1)* %in1) {
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88 entry:
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89 %0 = load <4 x float>, <4 x float> addrspace(1)* %in0
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90 %1 = load <4 x float>, <4 x float> addrspace(1)* %in1
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91 %cmp = fcmp une <4 x float> %0, %1
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92 %result = select <4 x i1> %cmp, <4 x float> %0, <4 x float> %1
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93 store <4 x float> %result, <4 x float> addrspace(1)* %out
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94 ret void
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95 }
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