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1 //===-- HexagonIntrinsics.td - Instruction intrinsics ------*- tablegen -*-===//
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2 //
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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3 // The LLVM Compiler Infrastructure
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4 //
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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5 // This file is distributed under the University of Illinois Open Source
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6 // License. See LICENSE.TXT for details.
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7 //
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8 //===----------------------------------------------------------------------===//
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9 // This is populated based on the following specs:
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10 // Hexagon V2 Architecture
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11 // Application-Level Specification
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12 // 80-V9418-8 Rev. B
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13 // March 4, 2008
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14 //===----------------------------------------------------------------------===//
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15
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83
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16 class T_I_pat <InstHexagon MI, Intrinsic IntID>
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17 : Pat <(IntID imm:$Is),
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18 (MI imm:$Is)>;
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19
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83
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20 class T_R_pat <InstHexagon MI, Intrinsic IntID>
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21 : Pat <(IntID I32:$Rs),
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22 (MI I32:$Rs)>;
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23
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83
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24 class T_P_pat <InstHexagon MI, Intrinsic IntID>
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25 : Pat <(IntID I64:$Rs),
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26 (MI DoubleRegs:$Rs)>;
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27
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83
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28 class T_II_pat <InstHexagon MI, Intrinsic IntID, PatFrag Imm1, PatFrag Imm2>
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29 : Pat<(IntID Imm1:$Is, Imm2:$It),
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30 (MI Imm1:$Is, Imm2:$It)>;
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31
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32 class T_RI_pat <InstHexagon MI, Intrinsic IntID, PatLeaf ImmPred = PatLeaf<(i32 imm)>>
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33 : Pat<(IntID I32:$Rs, ImmPred:$It),
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34 (MI I32:$Rs, ImmPred:$It)>;
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35
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83
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36 class T_IR_pat <InstHexagon MI, Intrinsic IntID, PatFrag ImmPred = PatLeaf<(i32 imm)>>
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37 : Pat<(IntID ImmPred:$Is, I32:$Rt),
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38 (MI ImmPred:$Is, I32:$Rt)>;
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39
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83
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40 class T_PI_pat <InstHexagon MI, Intrinsic IntID>
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41 : Pat<(IntID I64:$Rs, imm:$It),
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42 (MI DoubleRegs:$Rs, imm:$It)>;
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43
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83
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44 class T_RP_pat <InstHexagon MI, Intrinsic IntID>
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45 : Pat<(IntID I32:$Rs, I64:$Rt),
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46 (MI I32:$Rs, DoubleRegs:$Rt)>;
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47
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83
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48 class T_RR_pat <InstHexagon MI, Intrinsic IntID>
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49 : Pat <(IntID I32:$Rs, I32:$Rt),
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50 (MI I32:$Rs, I32:$Rt)>;
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51
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83
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52 class T_PP_pat <InstHexagon MI, Intrinsic IntID>
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53 : Pat <(IntID I64:$Rs, I64:$Rt),
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54 (MI DoubleRegs:$Rs, DoubleRegs:$Rt)>;
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55
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83
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56 class T_QII_pat <InstHexagon MI, Intrinsic IntID, PatFrag Imm1, PatFrag Imm2>
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57 : Pat <(IntID (i32 PredRegs:$Ps), Imm1:$Is, Imm2:$It),
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58 (MI PredRegs:$Ps, Imm1:$Is, Imm2:$It)>;
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59
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83
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60 class T_QRI_pat <InstHexagon MI, Intrinsic IntID, PatFrag ImmPred>
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61 : Pat <(IntID (i32 PredRegs:$Ps), I32:$Rs, ImmPred:$Is),
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62 (MI PredRegs:$Ps, I32:$Rs, ImmPred:$Is)>;
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63
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83
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64 class T_QIR_pat <InstHexagon MI, Intrinsic IntID, PatFrag ImmPred>
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65 : Pat <(IntID (i32 PredRegs:$Ps), ImmPred:$Is, I32:$Rs),
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66 (MI PredRegs:$Ps, ImmPred:$Is, I32:$Rs)>;
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67
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83
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68 class T_RRI_pat <InstHexagon MI, Intrinsic IntID>
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69 : Pat <(IntID I32:$Rs, I32:$Rt, imm:$Iu),
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70 (MI I32:$Rs, I32:$Rt, imm:$Iu)>;
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71
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83
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72 class T_RII_pat <InstHexagon MI, Intrinsic IntID>
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73 : Pat <(IntID I32:$Rs, imm:$It, imm:$Iu),
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74 (MI I32:$Rs, imm:$It, imm:$Iu)>;
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75
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83
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76 class T_IRI_pat <InstHexagon MI, Intrinsic IntID>
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77 : Pat <(IntID imm:$It, I32:$Rs, imm:$Iu),
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78 (MI imm:$It, I32:$Rs, imm:$Iu)>;
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79
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83
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80 class T_IRR_pat <InstHexagon MI, Intrinsic IntID>
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81 : Pat <(IntID imm:$Is, I32:$Rs, I32:$Rt),
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82 (MI imm:$Is, I32:$Rs, I32:$Rt)>;
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83
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83
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84 class T_RIR_pat <InstHexagon MI, Intrinsic IntID>
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85 : Pat <(IntID I32:$Rs, imm:$Is, I32:$Rt),
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86 (MI I32:$Rs, imm:$Is, I32:$Rt)>;
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87
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83
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88 class T_RRR_pat <InstHexagon MI, Intrinsic IntID>
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89 : Pat <(IntID I32:$Rs, I32:$Rt, I32:$Ru),
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90 (MI I32:$Rs, I32:$Rt, I32:$Ru)>;
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91
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83
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92 class T_PPI_pat <InstHexagon MI, Intrinsic IntID>
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93 : Pat <(IntID I64:$Rs, I64:$Rt, imm:$Iu),
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94 (MI DoubleRegs:$Rs, DoubleRegs:$Rt, imm:$Iu)>;
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95
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83
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96 class T_PII_pat <InstHexagon MI, Intrinsic IntID>
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97 : Pat <(IntID I64:$Rs, imm:$It, imm:$Iu),
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98 (MI DoubleRegs:$Rs, imm:$It, imm:$Iu)>;
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99
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100 class T_PPP_pat <InstHexagon MI, Intrinsic IntID>
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101 : Pat <(IntID I64:$Rs, I64:$Rt, I64:$Ru),
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102 (MI DoubleRegs:$Rs, DoubleRegs:$Rt, DoubleRegs:$Ru)>;
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103
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104 class T_PPR_pat <InstHexagon MI, Intrinsic IntID>
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105 : Pat <(IntID I64:$Rs, I64:$Rt, I32:$Ru),
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106 (MI DoubleRegs:$Rs, DoubleRegs:$Rt, I32:$Ru)>;
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107
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108 class T_PRR_pat <InstHexagon MI, Intrinsic IntID>
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109 : Pat <(IntID I64:$Rs, I32:$Rt, I32:$Ru),
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110 (MI DoubleRegs:$Rs, I32:$Rt, I32:$Ru)>;
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111
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112 class T_PPQ_pat <InstHexagon MI, Intrinsic IntID>
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113 : Pat <(IntID I64:$Rs, I64:$Rt, (i32 PredRegs:$Ru)),
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114 (MI DoubleRegs:$Rs, DoubleRegs:$Rt, PredRegs:$Ru)>;
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115
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116 class T_PR_pat <InstHexagon MI, Intrinsic IntID>
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117 : Pat <(IntID I64:$Rs, I32:$Rt),
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118 (MI DoubleRegs:$Rs, I32:$Rt)>;
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119
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120 class T_D_pat <InstHexagon MI, Intrinsic IntID>
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121 : Pat<(IntID (F64:$Rs)),
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122 (MI (F64:$Rs))>;
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123
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124 class T_DI_pat <InstHexagon MI, Intrinsic IntID,
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125 PatLeaf ImmPred = PatLeaf<(i32 imm)>>
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126 : Pat<(IntID F64:$Rs, ImmPred:$It),
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127 (MI F64:$Rs, ImmPred:$It)>;
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128
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129 class T_F_pat <InstHexagon MI, Intrinsic IntID>
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130 : Pat<(IntID F32:$Rs),
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131 (MI F32:$Rs)>;
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132
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133 class T_FI_pat <InstHexagon MI, Intrinsic IntID,
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134 PatLeaf ImmPred = PatLeaf<(i32 imm)>>
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135 : Pat<(IntID F32:$Rs, ImmPred:$It),
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136 (MI F32:$Rs, ImmPred:$It)>;
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137
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83
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138 class T_FF_pat <InstHexagon MI, Intrinsic IntID>
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139 : Pat<(IntID F32:$Rs, F32:$Rt),
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140 (MI F32:$Rs, F32:$Rt)>;
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141
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83
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142 class T_DD_pat <InstHexagon MI, Intrinsic IntID>
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143 : Pat<(IntID F64:$Rs, F64:$Rt),
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144 (MI F64:$Rs, F64:$Rt)>;
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145
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146 class T_FFF_pat <InstHexagon MI, Intrinsic IntID>
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147 : Pat<(IntID F32:$Rs, F32:$Rt, F32:$Ru),
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148 (MI F32:$Rs, F32:$Rt, F32:$Ru)>;
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149
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150 class T_FFFQ_pat <InstHexagon MI, Intrinsic IntID>
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151 : Pat <(IntID F32:$Rs, F32:$Rt, F32:$Ru, (i32 PredRegs:$Rx)),
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152 (MI F32:$Rs, F32:$Rt, F32:$Ru, PredRegs:$Rx)>;
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153
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83
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154 //===----------------------------------------------------------------------===//
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155 // MPYS / Multipy signed/unsigned halfwords
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156 //Rd=mpy[u](Rs.[H|L],Rt.[H|L])[:<<1][:rnd][:sat]
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157 //===----------------------------------------------------------------------===//
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158
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159 def : T_RR_pat <M2_mpy_ll_s1, int_hexagon_M2_mpy_ll_s1>;
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160 def : T_RR_pat <M2_mpy_ll_s0, int_hexagon_M2_mpy_ll_s0>;
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161 def : T_RR_pat <M2_mpy_lh_s1, int_hexagon_M2_mpy_lh_s1>;
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162 def : T_RR_pat <M2_mpy_lh_s0, int_hexagon_M2_mpy_lh_s0>;
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163 def : T_RR_pat <M2_mpy_hl_s1, int_hexagon_M2_mpy_hl_s1>;
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164 def : T_RR_pat <M2_mpy_hl_s0, int_hexagon_M2_mpy_hl_s0>;
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165 def : T_RR_pat <M2_mpy_hh_s1, int_hexagon_M2_mpy_hh_s1>;
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166 def : T_RR_pat <M2_mpy_hh_s0, int_hexagon_M2_mpy_hh_s0>;
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167
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168 def : T_RR_pat <M2_mpyu_ll_s1, int_hexagon_M2_mpyu_ll_s1>;
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169 def : T_RR_pat <M2_mpyu_ll_s0, int_hexagon_M2_mpyu_ll_s0>;
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170 def : T_RR_pat <M2_mpyu_lh_s1, int_hexagon_M2_mpyu_lh_s1>;
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171 def : T_RR_pat <M2_mpyu_lh_s0, int_hexagon_M2_mpyu_lh_s0>;
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172 def : T_RR_pat <M2_mpyu_hl_s1, int_hexagon_M2_mpyu_hl_s1>;
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173 def : T_RR_pat <M2_mpyu_hl_s0, int_hexagon_M2_mpyu_hl_s0>;
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174 def : T_RR_pat <M2_mpyu_hh_s1, int_hexagon_M2_mpyu_hh_s1>;
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175 def : T_RR_pat <M2_mpyu_hh_s0, int_hexagon_M2_mpyu_hh_s0>;
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176
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83
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177 def : T_RR_pat <M2_mpy_sat_ll_s1, int_hexagon_M2_mpy_sat_ll_s1>;
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178 def : T_RR_pat <M2_mpy_sat_ll_s0, int_hexagon_M2_mpy_sat_ll_s0>;
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179 def : T_RR_pat <M2_mpy_sat_lh_s1, int_hexagon_M2_mpy_sat_lh_s1>;
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180 def : T_RR_pat <M2_mpy_sat_lh_s0, int_hexagon_M2_mpy_sat_lh_s0>;
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181 def : T_RR_pat <M2_mpy_sat_hl_s1, int_hexagon_M2_mpy_sat_hl_s1>;
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182 def : T_RR_pat <M2_mpy_sat_hl_s0, int_hexagon_M2_mpy_sat_hl_s0>;
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183 def : T_RR_pat <M2_mpy_sat_hh_s1, int_hexagon_M2_mpy_sat_hh_s1>;
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184 def : T_RR_pat <M2_mpy_sat_hh_s0, int_hexagon_M2_mpy_sat_hh_s0>;
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185
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186 def : T_RR_pat <M2_mpy_rnd_ll_s1, int_hexagon_M2_mpy_rnd_ll_s1>;
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187 def : T_RR_pat <M2_mpy_rnd_ll_s0, int_hexagon_M2_mpy_rnd_ll_s0>;
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188 def : T_RR_pat <M2_mpy_rnd_lh_s1, int_hexagon_M2_mpy_rnd_lh_s1>;
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189 def : T_RR_pat <M2_mpy_rnd_lh_s0, int_hexagon_M2_mpy_rnd_lh_s0>;
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190 def : T_RR_pat <M2_mpy_rnd_hl_s1, int_hexagon_M2_mpy_rnd_hl_s1>;
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191 def : T_RR_pat <M2_mpy_rnd_hl_s0, int_hexagon_M2_mpy_rnd_hl_s0>;
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192 def : T_RR_pat <M2_mpy_rnd_hh_s1, int_hexagon_M2_mpy_rnd_hh_s1>;
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193 def : T_RR_pat <M2_mpy_rnd_hh_s0, int_hexagon_M2_mpy_rnd_hh_s0>;
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194
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195 def : T_RR_pat <M2_mpy_sat_rnd_ll_s1, int_hexagon_M2_mpy_sat_rnd_ll_s1>;
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196 def : T_RR_pat <M2_mpy_sat_rnd_ll_s0, int_hexagon_M2_mpy_sat_rnd_ll_s0>;
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197 def : T_RR_pat <M2_mpy_sat_rnd_lh_s1, int_hexagon_M2_mpy_sat_rnd_lh_s1>;
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198 def : T_RR_pat <M2_mpy_sat_rnd_lh_s0, int_hexagon_M2_mpy_sat_rnd_lh_s0>;
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199 def : T_RR_pat <M2_mpy_sat_rnd_hl_s1, int_hexagon_M2_mpy_sat_rnd_hl_s1>;
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200 def : T_RR_pat <M2_mpy_sat_rnd_hl_s0, int_hexagon_M2_mpy_sat_rnd_hl_s0>;
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201 def : T_RR_pat <M2_mpy_sat_rnd_hh_s1, int_hexagon_M2_mpy_sat_rnd_hh_s1>;
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202 def : T_RR_pat <M2_mpy_sat_rnd_hh_s0, int_hexagon_M2_mpy_sat_rnd_hh_s0>;
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203
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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204
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205 //===----------------------------------------------------------------------===//
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206 // MPYS / Multipy signed/unsigned halfwords and add/subtract the
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207 // result from the accumulator.
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208 //Rx [-+]= mpy[u](Rs.[H|L],Rt.[H|L])[:<<1][:sat]
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209 //===----------------------------------------------------------------------===//
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210
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211 def : T_RRR_pat <M2_mpy_acc_ll_s1, int_hexagon_M2_mpy_acc_ll_s1>;
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212 def : T_RRR_pat <M2_mpy_acc_ll_s0, int_hexagon_M2_mpy_acc_ll_s0>;
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213 def : T_RRR_pat <M2_mpy_acc_lh_s1, int_hexagon_M2_mpy_acc_lh_s1>;
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214 def : T_RRR_pat <M2_mpy_acc_lh_s0, int_hexagon_M2_mpy_acc_lh_s0>;
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215 def : T_RRR_pat <M2_mpy_acc_hl_s1, int_hexagon_M2_mpy_acc_hl_s1>;
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216 def : T_RRR_pat <M2_mpy_acc_hl_s0, int_hexagon_M2_mpy_acc_hl_s0>;
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217 def : T_RRR_pat <M2_mpy_acc_hh_s1, int_hexagon_M2_mpy_acc_hh_s1>;
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218 def : T_RRR_pat <M2_mpy_acc_hh_s0, int_hexagon_M2_mpy_acc_hh_s0>;
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219
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220 def : T_RRR_pat <M2_mpyu_acc_ll_s1, int_hexagon_M2_mpyu_acc_ll_s1>;
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221 def : T_RRR_pat <M2_mpyu_acc_ll_s0, int_hexagon_M2_mpyu_acc_ll_s0>;
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222 def : T_RRR_pat <M2_mpyu_acc_lh_s1, int_hexagon_M2_mpyu_acc_lh_s1>;
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223 def : T_RRR_pat <M2_mpyu_acc_lh_s0, int_hexagon_M2_mpyu_acc_lh_s0>;
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224 def : T_RRR_pat <M2_mpyu_acc_hl_s1, int_hexagon_M2_mpyu_acc_hl_s1>;
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225 def : T_RRR_pat <M2_mpyu_acc_hl_s0, int_hexagon_M2_mpyu_acc_hl_s0>;
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226 def : T_RRR_pat <M2_mpyu_acc_hh_s1, int_hexagon_M2_mpyu_acc_hh_s1>;
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227 def : T_RRR_pat <M2_mpyu_acc_hh_s0, int_hexagon_M2_mpyu_acc_hh_s0>;
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228
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229 def : T_RRR_pat <M2_mpy_nac_ll_s1, int_hexagon_M2_mpy_nac_ll_s1>;
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230 def : T_RRR_pat <M2_mpy_nac_ll_s0, int_hexagon_M2_mpy_nac_ll_s0>;
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231 def : T_RRR_pat <M2_mpy_nac_lh_s1, int_hexagon_M2_mpy_nac_lh_s1>;
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232 def : T_RRR_pat <M2_mpy_nac_lh_s0, int_hexagon_M2_mpy_nac_lh_s0>;
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233 def : T_RRR_pat <M2_mpy_nac_hl_s1, int_hexagon_M2_mpy_nac_hl_s1>;
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234 def : T_RRR_pat <M2_mpy_nac_hl_s0, int_hexagon_M2_mpy_nac_hl_s0>;
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235 def : T_RRR_pat <M2_mpy_nac_hh_s1, int_hexagon_M2_mpy_nac_hh_s1>;
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236 def : T_RRR_pat <M2_mpy_nac_hh_s0, int_hexagon_M2_mpy_nac_hh_s0>;
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237
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238 def : T_RRR_pat <M2_mpyu_nac_ll_s1, int_hexagon_M2_mpyu_nac_ll_s1>;
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239 def : T_RRR_pat <M2_mpyu_nac_ll_s0, int_hexagon_M2_mpyu_nac_ll_s0>;
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240 def : T_RRR_pat <M2_mpyu_nac_lh_s1, int_hexagon_M2_mpyu_nac_lh_s1>;
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241 def : T_RRR_pat <M2_mpyu_nac_lh_s0, int_hexagon_M2_mpyu_nac_lh_s0>;
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242 def : T_RRR_pat <M2_mpyu_nac_hl_s1, int_hexagon_M2_mpyu_nac_hl_s1>;
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243 def : T_RRR_pat <M2_mpyu_nac_hl_s0, int_hexagon_M2_mpyu_nac_hl_s0>;
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244 def : T_RRR_pat <M2_mpyu_nac_hh_s1, int_hexagon_M2_mpyu_nac_hh_s1>;
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245 def : T_RRR_pat <M2_mpyu_nac_hh_s0, int_hexagon_M2_mpyu_nac_hh_s0>;
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246
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247 def : T_RRR_pat <M2_mpy_acc_sat_ll_s1, int_hexagon_M2_mpy_acc_sat_ll_s1>;
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248 def : T_RRR_pat <M2_mpy_acc_sat_ll_s0, int_hexagon_M2_mpy_acc_sat_ll_s0>;
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249 def : T_RRR_pat <M2_mpy_acc_sat_lh_s1, int_hexagon_M2_mpy_acc_sat_lh_s1>;
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250 def : T_RRR_pat <M2_mpy_acc_sat_lh_s0, int_hexagon_M2_mpy_acc_sat_lh_s0>;
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251 def : T_RRR_pat <M2_mpy_acc_sat_hl_s1, int_hexagon_M2_mpy_acc_sat_hl_s1>;
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252 def : T_RRR_pat <M2_mpy_acc_sat_hl_s0, int_hexagon_M2_mpy_acc_sat_hl_s0>;
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253 def : T_RRR_pat <M2_mpy_acc_sat_hh_s1, int_hexagon_M2_mpy_acc_sat_hh_s1>;
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254 def : T_RRR_pat <M2_mpy_acc_sat_hh_s0, int_hexagon_M2_mpy_acc_sat_hh_s0>;
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255
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256 def : T_RRR_pat <M2_mpy_nac_sat_ll_s1, int_hexagon_M2_mpy_nac_sat_ll_s1>;
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257 def : T_RRR_pat <M2_mpy_nac_sat_ll_s0, int_hexagon_M2_mpy_nac_sat_ll_s0>;
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258 def : T_RRR_pat <M2_mpy_nac_sat_lh_s1, int_hexagon_M2_mpy_nac_sat_lh_s1>;
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259 def : T_RRR_pat <M2_mpy_nac_sat_lh_s0, int_hexagon_M2_mpy_nac_sat_lh_s0>;
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260 def : T_RRR_pat <M2_mpy_nac_sat_hl_s1, int_hexagon_M2_mpy_nac_sat_hl_s1>;
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261 def : T_RRR_pat <M2_mpy_nac_sat_hl_s0, int_hexagon_M2_mpy_nac_sat_hl_s0>;
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262 def : T_RRR_pat <M2_mpy_nac_sat_hh_s1, int_hexagon_M2_mpy_nac_sat_hh_s1>;
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263 def : T_RRR_pat <M2_mpy_nac_sat_hh_s0, int_hexagon_M2_mpy_nac_sat_hh_s0>;
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264
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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265
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83
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266 //===----------------------------------------------------------------------===//
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267 // Multiply signed/unsigned halfwords with and without saturation and rounding
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268 // into a 64-bits destination register.
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269 //===----------------------------------------------------------------------===//
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270
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271 def : T_RR_pat <M2_mpyd_hh_s0, int_hexagon_M2_mpyd_hh_s0>;
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272 def : T_RR_pat <M2_mpyd_hl_s0, int_hexagon_M2_mpyd_hl_s0>;
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273 def : T_RR_pat <M2_mpyd_lh_s0, int_hexagon_M2_mpyd_lh_s0>;
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274 def : T_RR_pat <M2_mpyd_ll_s0, int_hexagon_M2_mpyd_ll_s0>;
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275 def : T_RR_pat <M2_mpyd_hh_s1, int_hexagon_M2_mpyd_hh_s1>;
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276 def : T_RR_pat <M2_mpyd_hl_s1, int_hexagon_M2_mpyd_hl_s1>;
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277 def : T_RR_pat <M2_mpyd_lh_s1, int_hexagon_M2_mpyd_lh_s1>;
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278 def : T_RR_pat <M2_mpyd_ll_s1, int_hexagon_M2_mpyd_ll_s1>;
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279
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280 def : T_RR_pat <M2_mpyd_rnd_hh_s0, int_hexagon_M2_mpyd_rnd_hh_s0>;
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281 def : T_RR_pat <M2_mpyd_rnd_hl_s0, int_hexagon_M2_mpyd_rnd_hl_s0>;
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282 def : T_RR_pat <M2_mpyd_rnd_lh_s0, int_hexagon_M2_mpyd_rnd_lh_s0>;
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283 def : T_RR_pat <M2_mpyd_rnd_ll_s0, int_hexagon_M2_mpyd_rnd_ll_s0>;
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284 def : T_RR_pat <M2_mpyd_rnd_hh_s1, int_hexagon_M2_mpyd_rnd_hh_s1>;
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285 def : T_RR_pat <M2_mpyd_rnd_hl_s1, int_hexagon_M2_mpyd_rnd_hl_s1>;
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286 def : T_RR_pat <M2_mpyd_rnd_lh_s1, int_hexagon_M2_mpyd_rnd_lh_s1>;
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287 def : T_RR_pat <M2_mpyd_rnd_ll_s1, int_hexagon_M2_mpyd_rnd_ll_s1>;
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288
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289 def : T_RR_pat <M2_mpyud_hh_s0, int_hexagon_M2_mpyud_hh_s0>;
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290 def : T_RR_pat <M2_mpyud_hl_s0, int_hexagon_M2_mpyud_hl_s0>;
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291 def : T_RR_pat <M2_mpyud_lh_s0, int_hexagon_M2_mpyud_lh_s0>;
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292 def : T_RR_pat <M2_mpyud_ll_s0, int_hexagon_M2_mpyud_ll_s0>;
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293 def : T_RR_pat <M2_mpyud_hh_s1, int_hexagon_M2_mpyud_hh_s1>;
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294 def : T_RR_pat <M2_mpyud_hl_s1, int_hexagon_M2_mpyud_hl_s1>;
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295 def : T_RR_pat <M2_mpyud_lh_s1, int_hexagon_M2_mpyud_lh_s1>;
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296 def : T_RR_pat <M2_mpyud_ll_s1, int_hexagon_M2_mpyud_ll_s1>;
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297
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83
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298 //===----------------------------------------------------------------------===//
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299 // MPYS / Multipy signed/unsigned halfwords and add/subtract the
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300 // result from the 64-bit destination register.
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301 //Rxx [-+]= mpy[u](Rs.[H|L],Rt.[H|L])[:<<1][:sat]
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302 //===----------------------------------------------------------------------===//
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303
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83
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304 def : T_PRR_pat <M2_mpyd_acc_hh_s0, int_hexagon_M2_mpyd_acc_hh_s0>;
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305 def : T_PRR_pat <M2_mpyd_acc_hl_s0, int_hexagon_M2_mpyd_acc_hl_s0>;
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306 def : T_PRR_pat <M2_mpyd_acc_lh_s0, int_hexagon_M2_mpyd_acc_lh_s0>;
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307 def : T_PRR_pat <M2_mpyd_acc_ll_s0, int_hexagon_M2_mpyd_acc_ll_s0>;
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parents:
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308
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83
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309 def : T_PRR_pat <M2_mpyd_acc_hh_s1, int_hexagon_M2_mpyd_acc_hh_s1>;
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310 def : T_PRR_pat <M2_mpyd_acc_hl_s1, int_hexagon_M2_mpyd_acc_hl_s1>;
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311 def : T_PRR_pat <M2_mpyd_acc_lh_s1, int_hexagon_M2_mpyd_acc_lh_s1>;
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312 def : T_PRR_pat <M2_mpyd_acc_ll_s1, int_hexagon_M2_mpyd_acc_ll_s1>;
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313
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83
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314 def : T_PRR_pat <M2_mpyd_nac_hh_s0, int_hexagon_M2_mpyd_nac_hh_s0>;
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315 def : T_PRR_pat <M2_mpyd_nac_hl_s0, int_hexagon_M2_mpyd_nac_hl_s0>;
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316 def : T_PRR_pat <M2_mpyd_nac_lh_s0, int_hexagon_M2_mpyd_nac_lh_s0>;
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317 def : T_PRR_pat <M2_mpyd_nac_ll_s0, int_hexagon_M2_mpyd_nac_ll_s0>;
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318
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83
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319 def : T_PRR_pat <M2_mpyd_nac_hh_s1, int_hexagon_M2_mpyd_nac_hh_s1>;
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320 def : T_PRR_pat <M2_mpyd_nac_hl_s1, int_hexagon_M2_mpyd_nac_hl_s1>;
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321 def : T_PRR_pat <M2_mpyd_nac_lh_s1, int_hexagon_M2_mpyd_nac_lh_s1>;
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322 def : T_PRR_pat <M2_mpyd_nac_ll_s1, int_hexagon_M2_mpyd_nac_ll_s1>;
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parents:
diff
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323
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83
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324 def : T_PRR_pat <M2_mpyud_acc_hh_s0, int_hexagon_M2_mpyud_acc_hh_s0>;
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325 def : T_PRR_pat <M2_mpyud_acc_hl_s0, int_hexagon_M2_mpyud_acc_hl_s0>;
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326 def : T_PRR_pat <M2_mpyud_acc_lh_s0, int_hexagon_M2_mpyud_acc_lh_s0>;
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327 def : T_PRR_pat <M2_mpyud_acc_ll_s0, int_hexagon_M2_mpyud_acc_ll_s0>;
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
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328
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83
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329 def : T_PRR_pat <M2_mpyud_acc_hh_s1, int_hexagon_M2_mpyud_acc_hh_s1>;
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330 def : T_PRR_pat <M2_mpyud_acc_hl_s1, int_hexagon_M2_mpyud_acc_hl_s1>;
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331 def : T_PRR_pat <M2_mpyud_acc_lh_s1, int_hexagon_M2_mpyud_acc_lh_s1>;
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332 def : T_PRR_pat <M2_mpyud_acc_ll_s1, int_hexagon_M2_mpyud_acc_ll_s1>;
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0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
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|
333
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83
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334 def : T_PRR_pat <M2_mpyud_nac_hh_s0, int_hexagon_M2_mpyud_nac_hh_s0>;
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335 def : T_PRR_pat <M2_mpyud_nac_hl_s0, int_hexagon_M2_mpyud_nac_hl_s0>;
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336 def : T_PRR_pat <M2_mpyud_nac_lh_s0, int_hexagon_M2_mpyud_nac_lh_s0>;
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337 def : T_PRR_pat <M2_mpyud_nac_ll_s0, int_hexagon_M2_mpyud_nac_ll_s0>;
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0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
338
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83
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339 def : T_PRR_pat <M2_mpyud_nac_hh_s1, int_hexagon_M2_mpyud_nac_hh_s1>;
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340 def : T_PRR_pat <M2_mpyud_nac_hl_s1, int_hexagon_M2_mpyud_nac_hl_s1>;
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341 def : T_PRR_pat <M2_mpyud_nac_lh_s1, int_hexagon_M2_mpyud_nac_lh_s1>;
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342 def : T_PRR_pat <M2_mpyud_nac_ll_s1, int_hexagon_M2_mpyud_nac_ll_s1>;
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
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343
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83
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344 // Vector complex multiply imaginary: Rdd=vcmpyi(Rss,Rtt)[:<<1]:sat
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345 def : T_PP_pat <M2_vcmpy_s1_sat_i, int_hexagon_M2_vcmpy_s1_sat_i>;
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346 def : T_PP_pat <M2_vcmpy_s0_sat_i, int_hexagon_M2_vcmpy_s0_sat_i>;
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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347
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83
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348 // Vector complex multiply real: Rdd=vcmpyr(Rss,Rtt)[:<<1]:sat
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349 def : T_PP_pat <M2_vcmpy_s1_sat_r, int_hexagon_M2_vcmpy_s1_sat_r>;
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350 def : T_PP_pat <M2_vcmpy_s0_sat_r, int_hexagon_M2_vcmpy_s0_sat_r>;
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
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351
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83
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352 // Vector dual multiply: Rdd=vdmpy(Rss,Rtt)[:<<1]:sat
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353 def : T_PP_pat <M2_vdmpys_s1, int_hexagon_M2_vdmpys_s1>;
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354 def : T_PP_pat <M2_vdmpys_s0, int_hexagon_M2_vdmpys_s0>;
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
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355
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83
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356 // Vector multiply even halfwords: Rdd=vmpyeh(Rss,Rtt)[:<<1]:sat
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357 def : T_PP_pat <M2_vmpy2es_s1, int_hexagon_M2_vmpy2es_s1>;
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358 def : T_PP_pat <M2_vmpy2es_s0, int_hexagon_M2_vmpy2es_s0>;
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
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359
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83
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360 //Rdd=vmpywoh(Rss,Rtt)[:<<1][:rnd]:sat
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361 def : T_PP_pat <M2_mmpyh_s0, int_hexagon_M2_mmpyh_s0>;
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362 def : T_PP_pat <M2_mmpyh_s1, int_hexagon_M2_mmpyh_s1>;
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363 def : T_PP_pat <M2_mmpyh_rs0, int_hexagon_M2_mmpyh_rs0>;
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364 def : T_PP_pat <M2_mmpyh_rs1, int_hexagon_M2_mmpyh_rs1>;
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0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
365
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83
|
366 //Rdd=vmpyweh(Rss,Rtt)[:<<1][:rnd]:sat
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367 def : T_PP_pat <M2_mmpyl_s0, int_hexagon_M2_mmpyl_s0>;
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368 def : T_PP_pat <M2_mmpyl_s1, int_hexagon_M2_mmpyl_s1>;
|
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369 def : T_PP_pat <M2_mmpyl_rs0, int_hexagon_M2_mmpyl_rs0>;
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370 def : T_PP_pat <M2_mmpyl_rs1, int_hexagon_M2_mmpyl_rs1>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
371
|
|
83
|
372 //Rdd=vmpywouh(Rss,Rtt)[:<<1][:rnd]:sat
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373 def : T_PP_pat <M2_mmpyuh_s0, int_hexagon_M2_mmpyuh_s0>;
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374 def : T_PP_pat <M2_mmpyuh_s1, int_hexagon_M2_mmpyuh_s1>;
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375 def : T_PP_pat <M2_mmpyuh_rs0, int_hexagon_M2_mmpyuh_rs0>;
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376 def : T_PP_pat <M2_mmpyuh_rs1, int_hexagon_M2_mmpyuh_rs1>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
377
|
|
83
|
378 //Rdd=vmpyweuh(Rss,Rtt)[:<<1][:rnd]:sat
|
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|
379 def : T_PP_pat <M2_mmpyul_s0, int_hexagon_M2_mmpyul_s0>;
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380 def : T_PP_pat <M2_mmpyul_s1, int_hexagon_M2_mmpyul_s1>;
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381 def : T_PP_pat <M2_mmpyul_rs0, int_hexagon_M2_mmpyul_rs0>;
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382 def : T_PP_pat <M2_mmpyul_rs1, int_hexagon_M2_mmpyul_rs1>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
383
|
|
83
|
384 // Vector reduce add unsigned bytes: Rdd32[+]=vrmpybu(Rss32,Rtt32)
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385 def : T_PP_pat <A2_vraddub, int_hexagon_A2_vraddub>;
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386 def : T_PPP_pat <A2_vraddub_acc, int_hexagon_A2_vraddub_acc>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
387
|
|
83
|
388 // Vector sum of absolute differences unsigned bytes: Rdd=vrsadub(Rss,Rtt)
|
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389 def : T_PP_pat <A2_vrsadub, int_hexagon_A2_vrsadub>;
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390 def : T_PPP_pat <A2_vrsadub_acc, int_hexagon_A2_vrsadub_acc>;
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391
|
|
|
392 // Vector absolute difference: Rdd=vabsdiffh(Rtt,Rss)
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|
393 def : T_PP_pat <M2_vabsdiffh, int_hexagon_M2_vabsdiffh>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
394
|
|
83
|
395 // Vector absolute difference words: Rdd=vabsdiffw(Rtt,Rss)
|
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|
396 def : T_PP_pat <M2_vabsdiffw, int_hexagon_M2_vabsdiffw>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
397
|
|
83
|
398 // Vector reduce complex multiply real or imaginary:
|
|
|
399 // Rdd[+]=vrcmpy[ir](Rss,Rtt[*])
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|
400 def : T_PP_pat <M2_vrcmpyi_s0, int_hexagon_M2_vrcmpyi_s0>;
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|
401 def : T_PP_pat <M2_vrcmpyi_s0c, int_hexagon_M2_vrcmpyi_s0c>;
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402 def : T_PPP_pat <M2_vrcmaci_s0, int_hexagon_M2_vrcmaci_s0>;
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|
403 def : T_PPP_pat <M2_vrcmaci_s0c, int_hexagon_M2_vrcmaci_s0c>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
404
|
|
83
|
405 def : T_PP_pat <M2_vrcmpyr_s0, int_hexagon_M2_vrcmpyr_s0>;
|
|
|
406 def : T_PP_pat <M2_vrcmpyr_s0c, int_hexagon_M2_vrcmpyr_s0c>;
|
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|
407 def : T_PPP_pat <M2_vrcmacr_s0, int_hexagon_M2_vrcmacr_s0>;
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|
408 def : T_PPP_pat <M2_vrcmacr_s0c, int_hexagon_M2_vrcmacr_s0c>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
409
|
|
83
|
410 // Vector reduce halfwords
|
|
|
411 // Rdd[+]=vrmpyh(Rss,Rtt)
|
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|
412 def : T_PP_pat <M2_vrmpy_s0, int_hexagon_M2_vrmpy_s0>;
|
|
|
413 def : T_PPP_pat <M2_vrmac_s0, int_hexagon_M2_vrmac_s0>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
414
|
|
83
|
415 //===----------------------------------------------------------------------===//
|
|
|
416 // Vector Multipy with accumulation
|
|
|
417 //===----------------------------------------------------------------------===//
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
418
|
|
83
|
419 // Vector multiply word by signed half with accumulation
|
|
|
420 // Rxx+=vmpyw[eo]h(Rss,Rtt)[:<<1][:rnd]:sat
|
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|
421 def : T_PPP_pat <M2_mmacls_s1, int_hexagon_M2_mmacls_s1>;
|
|
|
422 def : T_PPP_pat <M2_mmacls_s0, int_hexagon_M2_mmacls_s0>;
|
|
|
423 def : T_PPP_pat <M2_mmacls_rs1, int_hexagon_M2_mmacls_rs1>;
|
|
|
424 def : T_PPP_pat <M2_mmacls_rs0, int_hexagon_M2_mmacls_rs0>;
|
|
|
425 def : T_PPP_pat <M2_mmachs_s1, int_hexagon_M2_mmachs_s1>;
|
|
|
426 def : T_PPP_pat <M2_mmachs_s0, int_hexagon_M2_mmachs_s0>;
|
|
|
427 def : T_PPP_pat <M2_mmachs_rs1, int_hexagon_M2_mmachs_rs1>;
|
|
|
428 def : T_PPP_pat <M2_mmachs_rs0, int_hexagon_M2_mmachs_rs0>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
429
|
|
83
|
430 // Vector multiply word by unsigned half with accumulation
|
|
|
431 // Rxx+=vmpyw[eo]uh(Rss,Rtt)[:<<1][:rnd]:sat
|
|
|
432 def : T_PPP_pat <M2_mmaculs_s1, int_hexagon_M2_mmaculs_s1>;
|
|
|
433 def : T_PPP_pat <M2_mmaculs_s0, int_hexagon_M2_mmaculs_s0>;
|
|
|
434 def : T_PPP_pat <M2_mmaculs_rs1, int_hexagon_M2_mmaculs_rs1>;
|
|
|
435 def : T_PPP_pat <M2_mmaculs_rs0, int_hexagon_M2_mmaculs_rs0>;
|
|
|
436 def : T_PPP_pat <M2_mmacuhs_s1, int_hexagon_M2_mmacuhs_s1>;
|
|
|
437 def : T_PPP_pat <M2_mmacuhs_s0, int_hexagon_M2_mmacuhs_s0>;
|
|
|
438 def : T_PPP_pat <M2_mmacuhs_rs1, int_hexagon_M2_mmacuhs_rs1>;
|
|
|
439 def : T_PPP_pat <M2_mmacuhs_rs0, int_hexagon_M2_mmacuhs_rs0>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
440
|
|
83
|
441 // Vector multiply even halfwords with accumulation
|
|
|
442 // Rxx+=vmpyeh(Rss,Rtt)[:<<1][:sat]
|
|
|
443 def : T_PPP_pat <M2_vmac2es, int_hexagon_M2_vmac2es>;
|
|
|
444 def : T_PPP_pat <M2_vmac2es_s1, int_hexagon_M2_vmac2es_s1>;
|
|
|
445 def : T_PPP_pat <M2_vmac2es_s0, int_hexagon_M2_vmac2es_s0>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
446
|
|
83
|
447 // Vector dual multiply with accumulation
|
|
|
448 // Rxx+=vdmpy(Rss,Rtt)[:sat]
|
|
|
449 def : T_PPP_pat <M2_vdmacs_s1, int_hexagon_M2_vdmacs_s1>;
|
|
|
450 def : T_PPP_pat <M2_vdmacs_s0, int_hexagon_M2_vdmacs_s0>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
451
|
|
83
|
452 // Vector complex multiply real or imaginary with accumulation
|
|
|
453 // Rxx+=vcmpy[ir](Rss,Rtt):sat
|
|
|
454 def : T_PPP_pat <M2_vcmac_s0_sat_r, int_hexagon_M2_vcmac_s0_sat_r>;
|
|
|
455 def : T_PPP_pat <M2_vcmac_s0_sat_i, int_hexagon_M2_vcmac_s0_sat_i>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
456
|
|
83
|
457 //===----------------------------------------------------------------------===//
|
|
|
458 // Add/Subtract halfword
|
|
|
459 // Rd=add(Rt.L,Rs.[HL])[:sat]
|
|
|
460 // Rd=sub(Rt.L,Rs.[HL])[:sat]
|
|
|
461 // Rd=add(Rt.[LH],Rs.[HL])[:sat][:<16]
|
|
|
462 // Rd=sub(Rt.[LH],Rs.[HL])[:sat][:<16]
|
|
|
463 //===----------------------------------------------------------------------===//
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
464
|
|
83
|
465 //Rd=add(Rt.L,Rs.[LH])
|
|
|
466 def : T_RR_pat <A2_addh_l16_ll, int_hexagon_A2_addh_l16_ll>;
|
|
|
467 def : T_RR_pat <A2_addh_l16_hl, int_hexagon_A2_addh_l16_hl>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
468
|
|
83
|
469 //Rd=add(Rt.L,Rs.[LH]):sat
|
|
|
470 def : T_RR_pat <A2_addh_l16_sat_ll, int_hexagon_A2_addh_l16_sat_ll>;
|
|
|
471 def : T_RR_pat <A2_addh_l16_sat_hl, int_hexagon_A2_addh_l16_sat_hl>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
472
|
|
83
|
473 //Rd=sub(Rt.L,Rs.[LH])
|
|
|
474 def : T_RR_pat <A2_subh_l16_ll, int_hexagon_A2_subh_l16_ll>;
|
|
|
475 def : T_RR_pat <A2_subh_l16_hl, int_hexagon_A2_subh_l16_hl>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
476
|
|
83
|
477 //Rd=sub(Rt.L,Rs.[LH]):sat
|
|
|
478 def : T_RR_pat <A2_subh_l16_sat_ll, int_hexagon_A2_subh_l16_sat_ll>;
|
|
|
479 def : T_RR_pat <A2_subh_l16_sat_hl, int_hexagon_A2_subh_l16_sat_hl>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
480
|
|
83
|
481 //Rd=add(Rt.[LH],Rs.[LH]):<<16
|
|
|
482 def : T_RR_pat <A2_addh_h16_ll, int_hexagon_A2_addh_h16_ll>;
|
|
|
483 def : T_RR_pat <A2_addh_h16_lh, int_hexagon_A2_addh_h16_lh>;
|
|
|
484 def : T_RR_pat <A2_addh_h16_hl, int_hexagon_A2_addh_h16_hl>;
|
|
|
485 def : T_RR_pat <A2_addh_h16_hh, int_hexagon_A2_addh_h16_hh>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
486
|
|
83
|
487 //Rd=sub(Rt.[LH],Rs.[LH]):<<16
|
|
|
488 def : T_RR_pat <A2_subh_h16_ll, int_hexagon_A2_subh_h16_ll>;
|
|
|
489 def : T_RR_pat <A2_subh_h16_lh, int_hexagon_A2_subh_h16_lh>;
|
|
|
490 def : T_RR_pat <A2_subh_h16_hl, int_hexagon_A2_subh_h16_hl>;
|
|
|
491 def : T_RR_pat <A2_subh_h16_hh, int_hexagon_A2_subh_h16_hh>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
492
|
|
83
|
493 //Rd=add(Rt.[LH],Rs.[LH]):sat:<<16
|
|
|
494 def : T_RR_pat <A2_addh_h16_sat_ll, int_hexagon_A2_addh_h16_sat_ll>;
|
|
|
495 def : T_RR_pat <A2_addh_h16_sat_lh, int_hexagon_A2_addh_h16_sat_lh>;
|
|
|
496 def : T_RR_pat <A2_addh_h16_sat_hl, int_hexagon_A2_addh_h16_sat_hl>;
|
|
|
497 def : T_RR_pat <A2_addh_h16_sat_hh, int_hexagon_A2_addh_h16_sat_hh>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
498
|
|
83
|
499 //Rd=sub(Rt.[LH],Rs.[LH]):sat:<<16
|
|
|
500 def : T_RR_pat <A2_subh_h16_sat_ll, int_hexagon_A2_subh_h16_sat_ll>;
|
|
|
501 def : T_RR_pat <A2_subh_h16_sat_lh, int_hexagon_A2_subh_h16_sat_lh>;
|
|
|
502 def : T_RR_pat <A2_subh_h16_sat_hl, int_hexagon_A2_subh_h16_sat_hl>;
|
|
|
503 def : T_RR_pat <A2_subh_h16_sat_hh, int_hexagon_A2_subh_h16_sat_hh>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
504
|
|
83
|
505 // ALU64 / ALU / min max
|
|
|
506 def : T_RR_pat<A2_max, int_hexagon_A2_max>;
|
|
|
507 def : T_RR_pat<A2_min, int_hexagon_A2_min>;
|
|
|
508 def : T_RR_pat<A2_maxu, int_hexagon_A2_maxu>;
|
|
|
509 def : T_RR_pat<A2_minu, int_hexagon_A2_minu>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
510
|
|
83
|
511 // Shift and accumulate
|
|
|
512 def : T_RRI_pat <S2_asr_i_r_nac, int_hexagon_S2_asr_i_r_nac>;
|
|
|
513 def : T_RRI_pat <S2_lsr_i_r_nac, int_hexagon_S2_lsr_i_r_nac>;
|
|
|
514 def : T_RRI_pat <S2_asl_i_r_nac, int_hexagon_S2_asl_i_r_nac>;
|
|
|
515 def : T_RRI_pat <S2_asr_i_r_acc, int_hexagon_S2_asr_i_r_acc>;
|
|
|
516 def : T_RRI_pat <S2_lsr_i_r_acc, int_hexagon_S2_lsr_i_r_acc>;
|
|
|
517 def : T_RRI_pat <S2_asl_i_r_acc, int_hexagon_S2_asl_i_r_acc>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
518
|
|
83
|
519 def : T_RRI_pat <S2_asr_i_r_and, int_hexagon_S2_asr_i_r_and>;
|
|
|
520 def : T_RRI_pat <S2_lsr_i_r_and, int_hexagon_S2_lsr_i_r_and>;
|
|
|
521 def : T_RRI_pat <S2_asl_i_r_and, int_hexagon_S2_asl_i_r_and>;
|
|
|
522 def : T_RRI_pat <S2_asr_i_r_or, int_hexagon_S2_asr_i_r_or>;
|
|
|
523 def : T_RRI_pat <S2_lsr_i_r_or, int_hexagon_S2_lsr_i_r_or>;
|
|
|
524 def : T_RRI_pat <S2_asl_i_r_or, int_hexagon_S2_asl_i_r_or>;
|
|
|
525 def : T_RRI_pat <S2_lsr_i_r_xacc, int_hexagon_S2_lsr_i_r_xacc>;
|
|
|
526 def : T_RRI_pat <S2_asl_i_r_xacc, int_hexagon_S2_asl_i_r_xacc>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
527
|
|
83
|
528 def : T_PPI_pat <S2_asr_i_p_nac, int_hexagon_S2_asr_i_p_nac>;
|
|
|
529 def : T_PPI_pat <S2_lsr_i_p_nac, int_hexagon_S2_lsr_i_p_nac>;
|
|
|
530 def : T_PPI_pat <S2_asl_i_p_nac, int_hexagon_S2_asl_i_p_nac>;
|
|
|
531 def : T_PPI_pat <S2_asr_i_p_acc, int_hexagon_S2_asr_i_p_acc>;
|
|
|
532 def : T_PPI_pat <S2_lsr_i_p_acc, int_hexagon_S2_lsr_i_p_acc>;
|
|
|
533 def : T_PPI_pat <S2_asl_i_p_acc, int_hexagon_S2_asl_i_p_acc>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
534
|
|
83
|
535 def : T_PPI_pat <S2_asr_i_p_and, int_hexagon_S2_asr_i_p_and>;
|
|
|
536 def : T_PPI_pat <S2_lsr_i_p_and, int_hexagon_S2_lsr_i_p_and>;
|
|
|
537 def : T_PPI_pat <S2_asl_i_p_and, int_hexagon_S2_asl_i_p_and>;
|
|
|
538 def : T_PPI_pat <S2_asr_i_p_or, int_hexagon_S2_asr_i_p_or>;
|
|
|
539 def : T_PPI_pat <S2_lsr_i_p_or, int_hexagon_S2_lsr_i_p_or>;
|
|
|
540 def : T_PPI_pat <S2_asl_i_p_or, int_hexagon_S2_asl_i_p_or>;
|
|
|
541 def : T_PPI_pat <S2_lsr_i_p_xacc, int_hexagon_S2_lsr_i_p_xacc>;
|
|
|
542 def : T_PPI_pat <S2_asl_i_p_xacc, int_hexagon_S2_asl_i_p_xacc>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
543
|
|
83
|
544 def : T_RRR_pat <S2_asr_r_r_nac, int_hexagon_S2_asr_r_r_nac>;
|
|
|
545 def : T_RRR_pat <S2_lsr_r_r_nac, int_hexagon_S2_lsr_r_r_nac>;
|
|
|
546 def : T_RRR_pat <S2_asl_r_r_nac, int_hexagon_S2_asl_r_r_nac>;
|
|
|
547 def : T_RRR_pat <S2_lsl_r_r_nac, int_hexagon_S2_lsl_r_r_nac>;
|
|
|
548 def : T_RRR_pat <S2_asr_r_r_acc, int_hexagon_S2_asr_r_r_acc>;
|
|
|
549 def : T_RRR_pat <S2_lsr_r_r_acc, int_hexagon_S2_lsr_r_r_acc>;
|
|
|
550 def : T_RRR_pat <S2_asl_r_r_acc, int_hexagon_S2_asl_r_r_acc>;
|
|
|
551 def : T_RRR_pat <S2_lsl_r_r_acc, int_hexagon_S2_lsl_r_r_acc>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
552
|
|
83
|
553 def : T_RRR_pat <S2_asr_r_r_and, int_hexagon_S2_asr_r_r_and>;
|
|
|
554 def : T_RRR_pat <S2_lsr_r_r_and, int_hexagon_S2_lsr_r_r_and>;
|
|
|
555 def : T_RRR_pat <S2_asl_r_r_and, int_hexagon_S2_asl_r_r_and>;
|
|
|
556 def : T_RRR_pat <S2_lsl_r_r_and, int_hexagon_S2_lsl_r_r_and>;
|
|
|
557 def : T_RRR_pat <S2_asr_r_r_or, int_hexagon_S2_asr_r_r_or>;
|
|
|
558 def : T_RRR_pat <S2_lsr_r_r_or, int_hexagon_S2_lsr_r_r_or>;
|
|
|
559 def : T_RRR_pat <S2_asl_r_r_or, int_hexagon_S2_asl_r_r_or>;
|
|
|
560 def : T_RRR_pat <S2_lsl_r_r_or, int_hexagon_S2_lsl_r_r_or>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
561
|
|
83
|
562 def : T_PPR_pat <S2_asr_r_p_nac, int_hexagon_S2_asr_r_p_nac>;
|
|
|
563 def : T_PPR_pat <S2_lsr_r_p_nac, int_hexagon_S2_lsr_r_p_nac>;
|
|
|
564 def : T_PPR_pat <S2_asl_r_p_nac, int_hexagon_S2_asl_r_p_nac>;
|
|
|
565 def : T_PPR_pat <S2_lsl_r_p_nac, int_hexagon_S2_lsl_r_p_nac>;
|
|
|
566 def : T_PPR_pat <S2_asr_r_p_acc, int_hexagon_S2_asr_r_p_acc>;
|
|
|
567 def : T_PPR_pat <S2_lsr_r_p_acc, int_hexagon_S2_lsr_r_p_acc>;
|
|
|
568 def : T_PPR_pat <S2_asl_r_p_acc, int_hexagon_S2_asl_r_p_acc>;
|
|
|
569 def : T_PPR_pat <S2_lsl_r_p_acc, int_hexagon_S2_lsl_r_p_acc>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
570
|
|
83
|
571 def : T_PPR_pat <S2_asr_r_p_and, int_hexagon_S2_asr_r_p_and>;
|
|
|
572 def : T_PPR_pat <S2_lsr_r_p_and, int_hexagon_S2_lsr_r_p_and>;
|
|
|
573 def : T_PPR_pat <S2_asl_r_p_and, int_hexagon_S2_asl_r_p_and>;
|
|
|
574 def : T_PPR_pat <S2_lsl_r_p_and, int_hexagon_S2_lsl_r_p_and>;
|
|
|
575 def : T_PPR_pat <S2_asr_r_p_or, int_hexagon_S2_asr_r_p_or>;
|
|
|
576 def : T_PPR_pat <S2_lsr_r_p_or, int_hexagon_S2_lsr_r_p_or>;
|
|
|
577 def : T_PPR_pat <S2_asl_r_p_or, int_hexagon_S2_asl_r_p_or>;
|
|
|
578 def : T_PPR_pat <S2_lsl_r_p_or, int_hexagon_S2_lsl_r_p_or>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
579
|
|
83
|
580 def : T_RRI_pat <S2_asr_i_r_nac, int_hexagon_S2_asr_i_r_nac>;
|
|
|
581 def : T_RRI_pat <S2_lsr_i_r_nac, int_hexagon_S2_lsr_i_r_nac>;
|
|
|
582 def : T_RRI_pat <S2_asl_i_r_nac, int_hexagon_S2_asl_i_r_nac>;
|
|
|
583 def : T_RRI_pat <S2_asr_i_r_acc, int_hexagon_S2_asr_i_r_acc>;
|
|
|
584 def : T_RRI_pat <S2_lsr_i_r_acc, int_hexagon_S2_lsr_i_r_acc>;
|
|
|
585 def : T_RRI_pat <S2_asl_i_r_acc, int_hexagon_S2_asl_i_r_acc>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
586
|
|
83
|
587 def : T_RRI_pat <S2_asr_i_r_and, int_hexagon_S2_asr_i_r_and>;
|
|
|
588 def : T_RRI_pat <S2_lsr_i_r_and, int_hexagon_S2_lsr_i_r_and>;
|
|
|
589 def : T_RRI_pat <S2_asl_i_r_and, int_hexagon_S2_asl_i_r_and>;
|
|
|
590 def : T_RRI_pat <S2_asr_i_r_or, int_hexagon_S2_asr_i_r_or>;
|
|
|
591 def : T_RRI_pat <S2_lsr_i_r_or, int_hexagon_S2_lsr_i_r_or>;
|
|
|
592 def : T_RRI_pat <S2_asl_i_r_or, int_hexagon_S2_asl_i_r_or>;
|
|
|
593 def : T_RRI_pat <S2_lsr_i_r_xacc, int_hexagon_S2_lsr_i_r_xacc>;
|
|
|
594 def : T_RRI_pat <S2_asl_i_r_xacc, int_hexagon_S2_asl_i_r_xacc>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
595
|
|
83
|
596 def : T_PPI_pat <S2_asr_i_p_nac, int_hexagon_S2_asr_i_p_nac>;
|
|
|
597 def : T_PPI_pat <S2_lsr_i_p_nac, int_hexagon_S2_lsr_i_p_nac>;
|
|
|
598 def : T_PPI_pat <S2_asl_i_p_nac, int_hexagon_S2_asl_i_p_nac>;
|
|
|
599 def : T_PPI_pat <S2_asr_i_p_acc, int_hexagon_S2_asr_i_p_acc>;
|
|
|
600 def : T_PPI_pat <S2_lsr_i_p_acc, int_hexagon_S2_lsr_i_p_acc>;
|
|
|
601 def : T_PPI_pat <S2_asl_i_p_acc, int_hexagon_S2_asl_i_p_acc>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
602
|
|
83
|
603 def : T_PPI_pat <S2_asr_i_p_and, int_hexagon_S2_asr_i_p_and>;
|
|
|
604 def : T_PPI_pat <S2_lsr_i_p_and, int_hexagon_S2_lsr_i_p_and>;
|
|
|
605 def : T_PPI_pat <S2_asl_i_p_and, int_hexagon_S2_asl_i_p_and>;
|
|
|
606 def : T_PPI_pat <S2_asr_i_p_or, int_hexagon_S2_asr_i_p_or>;
|
|
|
607 def : T_PPI_pat <S2_lsr_i_p_or, int_hexagon_S2_lsr_i_p_or>;
|
|
|
608 def : T_PPI_pat <S2_asl_i_p_or, int_hexagon_S2_asl_i_p_or>;
|
|
|
609 def : T_PPI_pat <S2_lsr_i_p_xacc, int_hexagon_S2_lsr_i_p_xacc>;
|
|
|
610 def : T_PPI_pat <S2_asl_i_p_xacc, int_hexagon_S2_asl_i_p_xacc>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
611
|
|
83
|
612 def : T_RRR_pat <S2_asr_r_r_nac, int_hexagon_S2_asr_r_r_nac>;
|
|
|
613 def : T_RRR_pat <S2_lsr_r_r_nac, int_hexagon_S2_lsr_r_r_nac>;
|
|
|
614 def : T_RRR_pat <S2_asl_r_r_nac, int_hexagon_S2_asl_r_r_nac>;
|
|
|
615 def : T_RRR_pat <S2_lsl_r_r_nac, int_hexagon_S2_lsl_r_r_nac>;
|
|
|
616 def : T_RRR_pat <S2_asr_r_r_acc, int_hexagon_S2_asr_r_r_acc>;
|
|
|
617 def : T_RRR_pat <S2_lsr_r_r_acc, int_hexagon_S2_lsr_r_r_acc>;
|
|
|
618 def : T_RRR_pat <S2_asl_r_r_acc, int_hexagon_S2_asl_r_r_acc>;
|
|
|
619 def : T_RRR_pat <S2_lsl_r_r_acc, int_hexagon_S2_lsl_r_r_acc>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
620
|
|
83
|
621 def : T_RRR_pat <S2_asr_r_r_and, int_hexagon_S2_asr_r_r_and>;
|
|
|
622 def : T_RRR_pat <S2_lsr_r_r_and, int_hexagon_S2_lsr_r_r_and>;
|
|
|
623 def : T_RRR_pat <S2_asl_r_r_and, int_hexagon_S2_asl_r_r_and>;
|
|
|
624 def : T_RRR_pat <S2_lsl_r_r_and, int_hexagon_S2_lsl_r_r_and>;
|
|
|
625 def : T_RRR_pat <S2_asr_r_r_or, int_hexagon_S2_asr_r_r_or>;
|
|
|
626 def : T_RRR_pat <S2_lsr_r_r_or, int_hexagon_S2_lsr_r_r_or>;
|
|
|
627 def : T_RRR_pat <S2_asl_r_r_or, int_hexagon_S2_asl_r_r_or>;
|
|
|
628 def : T_RRR_pat <S2_lsl_r_r_or, int_hexagon_S2_lsl_r_r_or>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
629
|
|
83
|
630 def : T_PPR_pat <S2_asr_r_p_nac, int_hexagon_S2_asr_r_p_nac>;
|
|
|
631 def : T_PPR_pat <S2_lsr_r_p_nac, int_hexagon_S2_lsr_r_p_nac>;
|
|
|
632 def : T_PPR_pat <S2_asl_r_p_nac, int_hexagon_S2_asl_r_p_nac>;
|
|
|
633 def : T_PPR_pat <S2_lsl_r_p_nac, int_hexagon_S2_lsl_r_p_nac>;
|
|
|
634 def : T_PPR_pat <S2_asr_r_p_acc, int_hexagon_S2_asr_r_p_acc>;
|
|
|
635 def : T_PPR_pat <S2_lsr_r_p_acc, int_hexagon_S2_lsr_r_p_acc>;
|
|
|
636 def : T_PPR_pat <S2_asl_r_p_acc, int_hexagon_S2_asl_r_p_acc>;
|
|
|
637 def : T_PPR_pat <S2_lsl_r_p_acc, int_hexagon_S2_lsl_r_p_acc>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
638
|
|
83
|
639 def : T_PPR_pat <S2_asr_r_p_and, int_hexagon_S2_asr_r_p_and>;
|
|
|
640 def : T_PPR_pat <S2_lsr_r_p_and, int_hexagon_S2_lsr_r_p_and>;
|
|
|
641 def : T_PPR_pat <S2_asl_r_p_and, int_hexagon_S2_asl_r_p_and>;
|
|
|
642 def : T_PPR_pat <S2_lsl_r_p_and, int_hexagon_S2_lsl_r_p_and>;
|
|
|
643 def : T_PPR_pat <S2_asr_r_p_or, int_hexagon_S2_asr_r_p_or>;
|
|
|
644 def : T_PPR_pat <S2_lsr_r_p_or, int_hexagon_S2_lsr_r_p_or>;
|
|
|
645 def : T_PPR_pat <S2_asl_r_p_or, int_hexagon_S2_asl_r_p_or>;
|
|
|
646 def : T_PPR_pat <S2_lsl_r_p_or, int_hexagon_S2_lsl_r_p_or>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
647
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
648 /********************************************************************
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
649 * ALU32/ALU *
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
650 *********************************************************************/
|
|
83
|
651 def : T_RR_pat<A2_add, int_hexagon_A2_add>;
|
|
|
652 def : T_RI_pat<A2_addi, int_hexagon_A2_addi>;
|
|
|
653 def : T_RR_pat<A2_sub, int_hexagon_A2_sub>;
|
|
|
654 def : T_IR_pat<A2_subri, int_hexagon_A2_subri>;
|
|
|
655 def : T_RR_pat<A2_and, int_hexagon_A2_and>;
|
|
|
656 def : T_RI_pat<A2_andir, int_hexagon_A2_andir>;
|
|
|
657 def : T_RR_pat<A2_or, int_hexagon_A2_or>;
|
|
|
658 def : T_RI_pat<A2_orir, int_hexagon_A2_orir>;
|
|
|
659 def : T_RR_pat<A2_xor, int_hexagon_A2_xor>;
|
|
|
660 def : T_RR_pat<A2_combinew, int_hexagon_A2_combinew>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
661
|
|
83
|
662 // Assembler mapped from Rd32=not(Rs32) to Rd32=sub(#-1,Rs32)
|
|
|
663 def : Pat <(int_hexagon_A2_not (I32:$Rs)),
|
|
|
664 (A2_subri -1, IntRegs:$Rs)>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
665
|
|
83
|
666 // Assembler mapped from Rd32=neg(Rs32) to Rd32=sub(#0,Rs32)
|
|
|
667 def : Pat <(int_hexagon_A2_neg IntRegs:$Rs),
|
|
|
668 (A2_subri 0, IntRegs:$Rs)>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
669
|
|
83
|
670 // Transfer immediate
|
|
|
671 def : Pat <(int_hexagon_A2_tfril (I32:$Rs), u16_0ImmPred:$Is),
|
|
|
672 (A2_tfril IntRegs:$Rs, u16_0ImmPred:$Is)>;
|
|
|
673 def : Pat <(int_hexagon_A2_tfrih (I32:$Rs), u16_0ImmPred:$Is),
|
|
|
674 (A2_tfrih IntRegs:$Rs, u16_0ImmPred:$Is)>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
675
|
|
83
|
676 // Transfer Register/immediate.
|
|
|
677 def : T_R_pat <A2_tfr, int_hexagon_A2_tfr>;
|
|
|
678 def : T_I_pat <A2_tfrsi, int_hexagon_A2_tfrsi>;
|
|
95
|
679 def : T_I_pat <A2_tfrpi, int_hexagon_A2_tfrpi>;
|
|
83
|
680
|
|
|
681 // Assembler mapped from Rdd32=Rss32 to Rdd32=combine(Rss.H32,Rss.L32)
|
|
|
682 def : Pat<(int_hexagon_A2_tfrp DoubleRegs:$src),
|
|
|
683 (A2_combinew (HiReg DoubleRegs:$src), (LoReg DoubleRegs:$src))>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
684
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
685 /********************************************************************
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
686 * ALU32/PERM *
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
687 *********************************************************************/
|
|
83
|
688 // Combine
|
|
|
689 def: T_RR_pat<A2_combine_hh, int_hexagon_A2_combine_hh>;
|
|
|
690 def: T_RR_pat<A2_combine_hl, int_hexagon_A2_combine_hl>;
|
|
|
691 def: T_RR_pat<A2_combine_lh, int_hexagon_A2_combine_lh>;
|
|
|
692 def: T_RR_pat<A2_combine_ll, int_hexagon_A2_combine_ll>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
693
|
|
100
|
694 def: T_II_pat<A2_combineii, int_hexagon_A2_combineii, s32ImmPred, s8ImmPred>;
|
|
83
|
695
|
|
95
|
696 def: Pat<(i32 (int_hexagon_C2_mux (I32:$Rp), (I32:$Rs), (I32:$Rt))),
|
|
83
|
697 (i32 (C2_mux (C2_tfrrp IntRegs:$Rp), IntRegs:$Rs, IntRegs:$Rt))>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
698
|
|
83
|
699 // Mux
|
|
100
|
700 def : T_QRI_pat<C2_muxir, int_hexagon_C2_muxir, s32ImmPred>;
|
|
|
701 def : T_QIR_pat<C2_muxri, int_hexagon_C2_muxri, s32ImmPred>;
|
|
|
702 def : T_QII_pat<C2_muxii, int_hexagon_C2_muxii, s32ImmPred, s8ImmPred>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
703
|
|
83
|
704 // Shift halfword
|
|
|
705 def : T_R_pat<A2_aslh, int_hexagon_A2_aslh>;
|
|
|
706 def : T_R_pat<A2_asrh, int_hexagon_A2_asrh>;
|
|
|
707 def : T_R_pat<A2_asrh, int_hexagon_SI_to_SXTHI_asrh>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
708
|
|
83
|
709 // Sign/zero extend
|
|
|
710 def : T_R_pat<A2_sxth, int_hexagon_A2_sxth>;
|
|
|
711 def : T_R_pat<A2_sxtb, int_hexagon_A2_sxtb>;
|
|
|
712 def : T_R_pat<A2_zxth, int_hexagon_A2_zxth>;
|
|
|
713 def : T_R_pat<A2_zxtb, int_hexagon_A2_zxtb>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
714
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
715 /********************************************************************
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
716 * ALU32/PRED *
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
717 *********************************************************************/
|
|
83
|
718 // Compare
|
|
|
719 def : T_RR_pat<C2_cmpeq, int_hexagon_C2_cmpeq>;
|
|
|
720 def : T_RR_pat<C2_cmpgt, int_hexagon_C2_cmpgt>;
|
|
|
721 def : T_RR_pat<C2_cmpgtu, int_hexagon_C2_cmpgtu>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
722
|
|
100
|
723 def : T_RI_pat<C2_cmpeqi, int_hexagon_C2_cmpeqi, s32ImmPred>;
|
|
|
724 def : T_RI_pat<C2_cmpgti, int_hexagon_C2_cmpgti, s32ImmPred>;
|
|
|
725 def : T_RI_pat<C2_cmpgtui, int_hexagon_C2_cmpgtui, u32ImmPred>;
|
|
83
|
726
|
|
100
|
727 def : Pat <(i32 (int_hexagon_C2_cmpgei (I32:$src1), s32ImmPred:$src2)),
|
|
83
|
728 (i32 (C2_cmpgti (I32:$src1),
|
|
100
|
729 (DEC_CONST_SIGNED s32ImmPred:$src2)))>;
|
|
83
|
730
|
|
100
|
731 def : Pat <(i32 (int_hexagon_C2_cmpgeui (I32:$src1), u32ImmPred:$src2)),
|
|
83
|
732 (i32 (C2_cmpgtui (I32:$src1),
|
|
100
|
733 (DEC_CONST_UNSIGNED u32ImmPred:$src2)))>;
|
|
83
|
734
|
|
|
735 // The instruction, Pd=cmp.geu(Rs, #u8) -> Pd=cmp.eq(Rs,Rs) when #u8 == 0.
|
|
|
736 def : Pat <(i32 (int_hexagon_C2_cmpgeui (I32:$src1), 0)),
|
|
|
737 (i32 (C2_cmpeq (I32:$src1), (I32:$src1)))>;
|
|
|
738
|
|
|
739 def : Pat <(i32 (int_hexagon_C2_cmplt (I32:$src1),
|
|
|
740 (I32:$src2))),
|
|
|
741 (i32 (C2_cmpgt (I32:$src2), (I32:$src1)))>;
|
|
|
742
|
|
|
743 def : Pat <(i32 (int_hexagon_C2_cmpltu (I32:$src1),
|
|
|
744 (I32:$src2))),
|
|
|
745 (i32 (C2_cmpgtu (I32:$src2), (I32:$src1)))>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
746
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
747 /********************************************************************
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
748 * ALU32/VH *
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
749 *********************************************************************/
|
|
83
|
750 // Vector add, subtract, average halfwords
|
|
|
751 def: T_RR_pat<A2_svaddh, int_hexagon_A2_svaddh>;
|
|
|
752 def: T_RR_pat<A2_svaddhs, int_hexagon_A2_svaddhs>;
|
|
|
753 def: T_RR_pat<A2_svadduhs, int_hexagon_A2_svadduhs>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
754
|
|
83
|
755 def: T_RR_pat<A2_svsubh, int_hexagon_A2_svsubh>;
|
|
|
756 def: T_RR_pat<A2_svsubhs, int_hexagon_A2_svsubhs>;
|
|
|
757 def: T_RR_pat<A2_svsubuhs, int_hexagon_A2_svsubuhs>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
758
|
|
83
|
759 def: T_RR_pat<A2_svavgh, int_hexagon_A2_svavgh>;
|
|
|
760 def: T_RR_pat<A2_svavghs, int_hexagon_A2_svavghs>;
|
|
|
761 def: T_RR_pat<A2_svnavgh, int_hexagon_A2_svnavgh>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
762
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
763 /********************************************************************
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
764 * ALU64/ALU *
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
765 *********************************************************************/
|
|
83
|
766 def: T_RR_pat<A2_addsat, int_hexagon_A2_addsat>;
|
|
|
767 def: T_RR_pat<A2_subsat, int_hexagon_A2_subsat>;
|
|
|
768 def: T_PP_pat<A2_addp, int_hexagon_A2_addp>;
|
|
|
769 def: T_PP_pat<A2_subp, int_hexagon_A2_subp>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
770
|
|
83
|
771 def: T_PP_pat<A2_andp, int_hexagon_A2_andp>;
|
|
|
772 def: T_PP_pat<A2_orp, int_hexagon_A2_orp>;
|
|
|
773 def: T_PP_pat<A2_xorp, int_hexagon_A2_xorp>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
774
|
|
83
|
775 def: T_PP_pat<C2_cmpeqp, int_hexagon_C2_cmpeqp>;
|
|
|
776 def: T_PP_pat<C2_cmpgtp, int_hexagon_C2_cmpgtp>;
|
|
|
777 def: T_PP_pat<C2_cmpgtup, int_hexagon_C2_cmpgtup>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
778
|
|
83
|
779 def: T_PP_pat<S2_parityp, int_hexagon_S2_parityp>;
|
|
|
780 def: T_RR_pat<S2_packhl, int_hexagon_S2_packhl>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
781
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
782 /********************************************************************
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
783 * ALU64/VB *
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
784 *********************************************************************/
|
|
83
|
785 // ALU64 - Vector add
|
|
|
786 def : T_PP_pat <A2_vaddub, int_hexagon_A2_vaddub>;
|
|
|
787 def : T_PP_pat <A2_vaddubs, int_hexagon_A2_vaddubs>;
|
|
|
788 def : T_PP_pat <A2_vaddh, int_hexagon_A2_vaddh>;
|
|
|
789 def : T_PP_pat <A2_vaddhs, int_hexagon_A2_vaddhs>;
|
|
|
790 def : T_PP_pat <A2_vadduhs, int_hexagon_A2_vadduhs>;
|
|
|
791 def : T_PP_pat <A2_vaddw, int_hexagon_A2_vaddw>;
|
|
|
792 def : T_PP_pat <A2_vaddws, int_hexagon_A2_vaddws>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
793
|
|
83
|
794 // ALU64 - Vector average
|
|
|
795 def : T_PP_pat <A2_vavgub, int_hexagon_A2_vavgub>;
|
|
|
796 def : T_PP_pat <A2_vavgubr, int_hexagon_A2_vavgubr>;
|
|
|
797 def : T_PP_pat <A2_vavgh, int_hexagon_A2_vavgh>;
|
|
|
798 def : T_PP_pat <A2_vavghr, int_hexagon_A2_vavghr>;
|
|
|
799 def : T_PP_pat <A2_vavghcr, int_hexagon_A2_vavghcr>;
|
|
|
800 def : T_PP_pat <A2_vavguh, int_hexagon_A2_vavguh>;
|
|
|
801 def : T_PP_pat <A2_vavguhr, int_hexagon_A2_vavguhr>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
802
|
|
83
|
803 def : T_PP_pat <A2_vavgw, int_hexagon_A2_vavgw>;
|
|
|
804 def : T_PP_pat <A2_vavgwr, int_hexagon_A2_vavgwr>;
|
|
|
805 def : T_PP_pat <A2_vavgwcr, int_hexagon_A2_vavgwcr>;
|
|
|
806 def : T_PP_pat <A2_vavguw, int_hexagon_A2_vavguw>;
|
|
|
807 def : T_PP_pat <A2_vavguwr, int_hexagon_A2_vavguwr>;
|
|
|
808
|
|
|
809 // ALU64 - Vector negative average
|
|
|
810 def : T_PP_pat <A2_vnavgh, int_hexagon_A2_vnavgh>;
|
|
|
811 def : T_PP_pat <A2_vnavghr, int_hexagon_A2_vnavghr>;
|
|
|
812 def : T_PP_pat <A2_vnavghcr, int_hexagon_A2_vnavghcr>;
|
|
|
813 def : T_PP_pat <A2_vnavgw, int_hexagon_A2_vnavgw>;
|
|
|
814 def : T_PP_pat <A2_vnavgwr, int_hexagon_A2_vnavgwr>;
|
|
|
815 def : T_PP_pat <A2_vnavgwcr, int_hexagon_A2_vnavgwcr>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
816
|
|
83
|
817 // ALU64 - Vector max
|
|
|
818 def : T_PP_pat <A2_vmaxh, int_hexagon_A2_vmaxh>;
|
|
|
819 def : T_PP_pat <A2_vmaxw, int_hexagon_A2_vmaxw>;
|
|
|
820 def : T_PP_pat <A2_vmaxub, int_hexagon_A2_vmaxub>;
|
|
|
821 def : T_PP_pat <A2_vmaxuh, int_hexagon_A2_vmaxuh>;
|
|
|
822 def : T_PP_pat <A2_vmaxuw, int_hexagon_A2_vmaxuw>;
|
|
|
823
|
|
|
824 // ALU64 - Vector min
|
|
|
825 def : T_PP_pat <A2_vminh, int_hexagon_A2_vminh>;
|
|
|
826 def : T_PP_pat <A2_vminw, int_hexagon_A2_vminw>;
|
|
|
827 def : T_PP_pat <A2_vminub, int_hexagon_A2_vminub>;
|
|
|
828 def : T_PP_pat <A2_vminuh, int_hexagon_A2_vminuh>;
|
|
|
829 def : T_PP_pat <A2_vminuw, int_hexagon_A2_vminuw>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
830
|
|
83
|
831 // ALU64 - Vector sub
|
|
|
832 def : T_PP_pat <A2_vsubub, int_hexagon_A2_vsubub>;
|
|
|
833 def : T_PP_pat <A2_vsububs, int_hexagon_A2_vsububs>;
|
|
|
834 def : T_PP_pat <A2_vsubh, int_hexagon_A2_vsubh>;
|
|
|
835 def : T_PP_pat <A2_vsubhs, int_hexagon_A2_vsubhs>;
|
|
|
836 def : T_PP_pat <A2_vsubuhs, int_hexagon_A2_vsubuhs>;
|
|
|
837 def : T_PP_pat <A2_vsubw, int_hexagon_A2_vsubw>;
|
|
|
838 def : T_PP_pat <A2_vsubws, int_hexagon_A2_vsubws>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
839
|
|
83
|
840 // ALU64 - Vector compare bytes
|
|
|
841 def : T_PP_pat <A2_vcmpbeq, int_hexagon_A2_vcmpbeq>;
|
|
|
842 def : T_PP_pat <A4_vcmpbgt, int_hexagon_A4_vcmpbgt>;
|
|
|
843 def : T_PP_pat <A2_vcmpbgtu, int_hexagon_A2_vcmpbgtu>;
|
|
|
844
|
|
|
845 // ALU64 - Vector compare halfwords
|
|
|
846 def : T_PP_pat <A2_vcmpheq, int_hexagon_A2_vcmpheq>;
|
|
|
847 def : T_PP_pat <A2_vcmphgt, int_hexagon_A2_vcmphgt>;
|
|
|
848 def : T_PP_pat <A2_vcmphgtu, int_hexagon_A2_vcmphgtu>;
|
|
|
849
|
|
|
850 // ALU64 - Vector compare words
|
|
|
851 def : T_PP_pat <A2_vcmpweq, int_hexagon_A2_vcmpweq>;
|
|
|
852 def : T_PP_pat <A2_vcmpwgt, int_hexagon_A2_vcmpwgt>;
|
|
|
853 def : T_PP_pat <A2_vcmpwgtu, int_hexagon_A2_vcmpwgtu>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
854
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
855 // ALU64 / VB / Vector mux.
|
|
83
|
856 def : Pat<(int_hexagon_C2_vmux PredRegs:$Pu, DoubleRegs:$Rs, DoubleRegs:$Rt),
|
|
|
857 (C2_vmux PredRegs:$Pu, DoubleRegs:$Rs, DoubleRegs:$Rt)>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
858
|
|
83
|
859 // MPY - Multiply and use full result
|
|
|
860 // Rdd = mpy[u](Rs, Rt)
|
|
|
861 def : T_RR_pat <M2_dpmpyss_s0, int_hexagon_M2_dpmpyss_s0>;
|
|
|
862 def : T_RR_pat <M2_dpmpyuu_s0, int_hexagon_M2_dpmpyuu_s0>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
863
|
|
83
|
864 // Complex multiply real or imaginary
|
|
|
865 def : T_RR_pat <M2_cmpyi_s0, int_hexagon_M2_cmpyi_s0>;
|
|
|
866 def : T_RR_pat <M2_cmpyr_s0, int_hexagon_M2_cmpyr_s0>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
867
|
|
83
|
868 // Complex multiply
|
|
|
869 def : T_RR_pat <M2_cmpys_s0, int_hexagon_M2_cmpys_s0>;
|
|
|
870 def : T_RR_pat <M2_cmpysc_s0, int_hexagon_M2_cmpysc_s0>;
|
|
|
871 def : T_RR_pat <M2_cmpys_s1, int_hexagon_M2_cmpys_s1>;
|
|
|
872 def : T_RR_pat <M2_cmpysc_s1, int_hexagon_M2_cmpysc_s1>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
873
|
|
83
|
874 // Vector multiply halfwords
|
|
|
875 // Rdd=vmpyh(Rs,Rt)[:<<1]:sat
|
|
|
876 def : T_RR_pat <M2_vmpy2s_s0, int_hexagon_M2_vmpy2s_s0>;
|
|
|
877 def : T_RR_pat <M2_vmpy2s_s1, int_hexagon_M2_vmpy2s_s1>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
878
|
|
83
|
879 // Rxx[+-]= mpy[u](Rs,Rt)
|
|
|
880 def : T_PRR_pat <M2_dpmpyss_acc_s0, int_hexagon_M2_dpmpyss_acc_s0>;
|
|
|
881 def : T_PRR_pat <M2_dpmpyss_nac_s0, int_hexagon_M2_dpmpyss_nac_s0>;
|
|
|
882 def : T_PRR_pat <M2_dpmpyuu_acc_s0, int_hexagon_M2_dpmpyuu_acc_s0>;
|
|
|
883 def : T_PRR_pat <M2_dpmpyuu_nac_s0, int_hexagon_M2_dpmpyuu_nac_s0>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
884
|
|
83
|
885 // Rxx[-+]=cmpy(Rs,Rt)[:<<1]:sat
|
|
|
886 def : T_PRR_pat <M2_cmacs_s0, int_hexagon_M2_cmacs_s0>;
|
|
|
887 def : T_PRR_pat <M2_cnacs_s0, int_hexagon_M2_cnacs_s0>;
|
|
|
888 def : T_PRR_pat <M2_cmacs_s1, int_hexagon_M2_cmacs_s1>;
|
|
|
889 def : T_PRR_pat <M2_cnacs_s1, int_hexagon_M2_cnacs_s1>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
890
|
|
83
|
891 // Rxx[-+]=cmpy(Rs,Rt*)[:<<1]:sat
|
|
|
892 def : T_PRR_pat <M2_cmacsc_s0, int_hexagon_M2_cmacsc_s0>;
|
|
|
893 def : T_PRR_pat <M2_cnacsc_s0, int_hexagon_M2_cnacsc_s0>;
|
|
|
894 def : T_PRR_pat <M2_cmacsc_s1, int_hexagon_M2_cmacsc_s1>;
|
|
|
895 def : T_PRR_pat <M2_cnacsc_s1, int_hexagon_M2_cnacsc_s1>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
896
|
|
83
|
897 // Rxx+=cmpy[ir](Rs,Rt)
|
|
|
898 def : T_PRR_pat <M2_cmaci_s0, int_hexagon_M2_cmaci_s0>;
|
|
|
899 def : T_PRR_pat <M2_cmacr_s0, int_hexagon_M2_cmacr_s0>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
900
|
|
83
|
901 // Rxx+=vmpyh(Rs,Rt)[:<<1][:sat]
|
|
|
902 def : T_PRR_pat <M2_vmac2, int_hexagon_M2_vmac2>;
|
|
|
903 def : T_PRR_pat <M2_vmac2s_s0, int_hexagon_M2_vmac2s_s0>;
|
|
|
904 def : T_PRR_pat <M2_vmac2s_s1, int_hexagon_M2_vmac2s_s1>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
905
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
906 /********************************************************************
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
907 * CR *
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
908 *********************************************************************/
|
|
83
|
909 class qi_CRInst_qi_pat<InstHexagon Inst, Intrinsic IntID> :
|
|
|
910 Pat<(i32 (IntID IntRegs:$Rs)),
|
|
|
911 (i32 (C2_tfrpr (Inst (C2_tfrrp IntRegs:$Rs))))>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
912
|
|
83
|
913 class qi_CRInst_qiqi_pat<InstHexagon Inst, Intrinsic IntID> :
|
|
|
914 Pat<(i32 (IntID IntRegs:$Rs, IntRegs:$Rt)),
|
|
|
915 (i32 (C2_tfrpr (Inst (C2_tfrrp IntRegs:$Rs), (C2_tfrrp IntRegs:$Rt))))>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
916
|
|
83
|
917 def: qi_CRInst_qi_pat<C2_not, int_hexagon_C2_not>;
|
|
|
918 def: qi_CRInst_qi_pat<C2_all8, int_hexagon_C2_all8>;
|
|
|
919 def: qi_CRInst_qi_pat<C2_any8, int_hexagon_C2_any8>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
920
|
|
83
|
921 def: qi_CRInst_qiqi_pat<C2_and, int_hexagon_C2_and>;
|
|
|
922 def: qi_CRInst_qiqi_pat<C2_andn, int_hexagon_C2_andn>;
|
|
|
923 def: qi_CRInst_qiqi_pat<C2_or, int_hexagon_C2_or>;
|
|
|
924 def: qi_CRInst_qiqi_pat<C2_orn, int_hexagon_C2_orn>;
|
|
|
925 def: qi_CRInst_qiqi_pat<C2_xor, int_hexagon_C2_xor>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
926
|
|
95
|
927 // Assembler mapped from Pd4=Ps4 to Pd4=or(Ps4,Ps4)
|
|
|
928 def : Pat<(int_hexagon_C2_pxfer_map PredRegs:$src),
|
|
|
929 (C2_pxfer_map PredRegs:$src)>;
|
|
|
930
|
|
83
|
931 // Multiply 32x32 and use lower result
|
|
|
932 def : T_RRI_pat <M2_macsip, int_hexagon_M2_macsip>;
|
|
|
933 def : T_RRI_pat <M2_macsin, int_hexagon_M2_macsin>;
|
|
|
934 def : T_RRR_pat <M2_maci, int_hexagon_M2_maci>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
935
|
|
83
|
936 // Subtract and accumulate
|
|
|
937 def : T_RRR_pat <M2_subacc, int_hexagon_M2_subacc>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
938
|
|
83
|
939 // Add and accumulate
|
|
|
940 def : T_RRR_pat <M2_acci, int_hexagon_M2_acci>;
|
|
|
941 def : T_RRR_pat <M2_nacci, int_hexagon_M2_nacci>;
|
|
|
942 def : T_RRI_pat <M2_accii, int_hexagon_M2_accii>;
|
|
|
943 def : T_RRI_pat <M2_naccii, int_hexagon_M2_naccii>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
944
|
|
83
|
945 // XOR and XOR with destination
|
|
|
946 def : T_RRR_pat <M2_xor_xacc, int_hexagon_M2_xor_xacc>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
947
|
|
83
|
948 class MType_R32_pat <Intrinsic IntID, InstHexagon OutputInst> :
|
|
|
949 Pat <(IntID IntRegs:$src1, IntRegs:$src2),
|
|
|
950 (OutputInst IntRegs:$src1, IntRegs:$src2)>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
951
|
|
83
|
952 // Vector dual multiply with round and pack
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
953
|
|
83
|
954 def : Pat <(int_hexagon_M2_vdmpyrs_s0 DoubleRegs:$src1, DoubleRegs:$src2),
|
|
|
955 (M2_vdmpyrs_s0 DoubleRegs:$src1, DoubleRegs:$src2)>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
956
|
|
83
|
957 def : Pat <(int_hexagon_M2_vdmpyrs_s1 DoubleRegs:$src1, DoubleRegs:$src2),
|
|
|
958 (M2_vdmpyrs_s1 DoubleRegs:$src1, DoubleRegs:$src2)>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
959
|
|
83
|
960 // Vector multiply halfwords with round and pack
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
961
|
|
83
|
962 def : MType_R32_pat <int_hexagon_M2_vmpy2s_s0pack, M2_vmpy2s_s0pack>;
|
|
|
963 def : MType_R32_pat <int_hexagon_M2_vmpy2s_s1pack, M2_vmpy2s_s1pack>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
964
|
|
83
|
965 // Multiply and use lower result
|
|
|
966 def : MType_R32_pat <int_hexagon_M2_mpyi, M2_mpyi>;
|
|
|
967 def : T_RI_pat<M2_mpysmi, int_hexagon_M2_mpysmi>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
968
|
|
83
|
969 // Assembler mapped from Rd32=mpyui(Rs32,Rt32) to Rd32=mpyi(Rs32,Rt32)
|
|
|
970 def : MType_R32_pat <int_hexagon_M2_mpyui, M2_mpyi>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
971
|
|
83
|
972 // Multiply and use upper result
|
|
|
973 def : MType_R32_pat <int_hexagon_M2_mpy_up, M2_mpy_up>;
|
|
|
974 def : MType_R32_pat <int_hexagon_M2_mpyu_up, M2_mpyu_up>;
|
|
|
975 def : MType_R32_pat <int_hexagon_M2_hmmpyh_rs1, M2_hmmpyh_rs1>;
|
|
|
976 def : MType_R32_pat <int_hexagon_M2_hmmpyl_rs1, M2_hmmpyl_rs1>;
|
|
|
977 def : MType_R32_pat <int_hexagon_M2_dpmpyss_rnd_s0, M2_dpmpyss_rnd_s0>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
978
|
|
83
|
979 // Complex multiply with round and pack
|
|
|
980 // Rxx32+=cmpy(Rs32,[*]Rt32:<<1]:rnd:sat
|
|
|
981 def : MType_R32_pat <int_hexagon_M2_cmpyrs_s0, M2_cmpyrs_s0>;
|
|
|
982 def : MType_R32_pat <int_hexagon_M2_cmpyrs_s1, M2_cmpyrs_s1>;
|
|
|
983 def : MType_R32_pat <int_hexagon_M2_cmpyrsc_s0, M2_cmpyrsc_s0>;
|
|
|
984 def : MType_R32_pat <int_hexagon_M2_cmpyrsc_s1, M2_cmpyrsc_s1>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
985
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
986 /********************************************************************
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
987 * STYPE/ALU *
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
988 *********************************************************************/
|
|
83
|
989 def : T_P_pat <A2_absp, int_hexagon_A2_absp>;
|
|
|
990 def : T_P_pat <A2_negp, int_hexagon_A2_negp>;
|
|
|
991 def : T_P_pat <A2_notp, int_hexagon_A2_notp>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
992
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
993 /********************************************************************
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
994 * STYPE/BIT *
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
995 *********************************************************************/
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
996
|
|
83
|
997 // Count leading/trailing
|
|
|
998 def: T_R_pat<S2_cl0, int_hexagon_S2_cl0>;
|
|
|
999 def: T_P_pat<S2_cl0p, int_hexagon_S2_cl0p>;
|
|
|
1000 def: T_R_pat<S2_cl1, int_hexagon_S2_cl1>;
|
|
|
1001 def: T_P_pat<S2_cl1p, int_hexagon_S2_cl1p>;
|
|
|
1002 def: T_R_pat<S2_clb, int_hexagon_S2_clb>;
|
|
|
1003 def: T_P_pat<S2_clbp, int_hexagon_S2_clbp>;
|
|
|
1004 def: T_R_pat<S2_clbnorm, int_hexagon_S2_clbnorm>;
|
|
|
1005 def: T_R_pat<S2_ct0, int_hexagon_S2_ct0>;
|
|
|
1006 def: T_R_pat<S2_ct1, int_hexagon_S2_ct1>;
|
|
|
1007
|
|
|
1008 // Compare bit mask
|
|
|
1009 def: T_RR_pat<C2_bitsclr, int_hexagon_C2_bitsclr>;
|
|
|
1010 def: T_RI_pat<C2_bitsclri, int_hexagon_C2_bitsclri>;
|
|
|
1011 def: T_RR_pat<C2_bitsset, int_hexagon_C2_bitsset>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
1012
|
|
83
|
1013 // Vector shuffle
|
|
|
1014 def : T_PP_pat <S2_shuffeb, int_hexagon_S2_shuffeb>;
|
|
|
1015 def : T_PP_pat <S2_shuffob, int_hexagon_S2_shuffob>;
|
|
|
1016 def : T_PP_pat <S2_shuffeh, int_hexagon_S2_shuffeh>;
|
|
|
1017 def : T_PP_pat <S2_shuffoh, int_hexagon_S2_shuffoh>;
|
|
|
1018
|
|
|
1019 // Vector truncate
|
|
|
1020 def : T_PP_pat <S2_vtrunewh, int_hexagon_S2_vtrunewh>;
|
|
|
1021 def : T_PP_pat <S2_vtrunowh, int_hexagon_S2_vtrunowh>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
1022
|
|
83
|
1023 // Linear feedback-shift Iteration.
|
|
|
1024 def : T_PP_pat <S2_lfsp, int_hexagon_S2_lfsp>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
1025
|
|
83
|
1026 // Vector splice
|
|
|
1027 def : T_PPQ_pat <S2_vsplicerb, int_hexagon_S2_vsplicerb>;
|
|
|
1028 def : T_PPI_pat <S2_vspliceib, int_hexagon_S2_vspliceib>;
|
|
|
1029
|
|
|
1030 // Shift by immediate and add
|
|
|
1031 def : T_RRI_pat<S2_addasl_rrri, int_hexagon_S2_addasl_rrri>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
1032
|
|
83
|
1033 // Extract bitfield
|
|
|
1034 def : T_PII_pat<S2_extractup, int_hexagon_S2_extractup>;
|
|
|
1035 def : T_RII_pat<S2_extractu, int_hexagon_S2_extractu>;
|
|
|
1036 def : T_RP_pat <S2_extractu_rp, int_hexagon_S2_extractu_rp>;
|
|
|
1037 def : T_PP_pat <S2_extractup_rp, int_hexagon_S2_extractup_rp>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
1038
|
|
83
|
1039 // Insert bitfield
|
|
|
1040 def : Pat <(int_hexagon_S2_insert_rp IntRegs:$src1, IntRegs:$src2,
|
|
|
1041 DoubleRegs:$src3),
|
|
|
1042 (S2_insert_rp IntRegs:$src1, IntRegs:$src2, DoubleRegs:$src3)>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
1043
|
|
83
|
1044 def : Pat<(i64 (int_hexagon_S2_insertp_rp (I64:$src1),
|
|
|
1045 (I64:$src2), (I64:$src3))),
|
|
|
1046 (i64 (S2_insertp_rp (I64:$src1), (I64:$src2),
|
|
|
1047 (I64:$src3)))>;
|
|
|
1048
|
|
|
1049 def : Pat<(int_hexagon_S2_insert IntRegs:$src1, IntRegs:$src2,
|
|
|
1050 u5ImmPred:$src3, u5ImmPred:$src4),
|
|
|
1051 (S2_insert IntRegs:$src1, IntRegs:$src2,
|
|
|
1052 u5ImmPred:$src3, u5ImmPred:$src4)>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
1053
|
|
83
|
1054 def : Pat<(i64 (int_hexagon_S2_insertp (I64:$src1),
|
|
|
1055 (I64:$src2), u6ImmPred:$src3, u6ImmPred:$src4)),
|
|
|
1056 (i64 (S2_insertp (I64:$src1), (I64:$src2),
|
|
|
1057 u6ImmPred:$src3, u6ImmPred:$src4))>;
|
|
|
1058
|
|
|
1059
|
|
|
1060 // Innterleave/deinterleave
|
|
|
1061 def : T_P_pat <S2_interleave, int_hexagon_S2_interleave>;
|
|
|
1062 def : T_P_pat <S2_deinterleave, int_hexagon_S2_deinterleave>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
1063
|
|
83
|
1064 // Set/Clear/Toggle Bit
|
|
|
1065 def: T_RI_pat<S2_setbit_i, int_hexagon_S2_setbit_i>;
|
|
|
1066 def: T_RI_pat<S2_clrbit_i, int_hexagon_S2_clrbit_i>;
|
|
|
1067 def: T_RI_pat<S2_togglebit_i, int_hexagon_S2_togglebit_i>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
1068
|
|
83
|
1069 def: T_RR_pat<S2_setbit_r, int_hexagon_S2_setbit_r>;
|
|
|
1070 def: T_RR_pat<S2_clrbit_r, int_hexagon_S2_clrbit_r>;
|
|
|
1071 def: T_RR_pat<S2_togglebit_r, int_hexagon_S2_togglebit_r>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
1072
|
|
83
|
1073 // Test Bit
|
|
|
1074 def: T_RI_pat<S2_tstbit_i, int_hexagon_S2_tstbit_i>;
|
|
|
1075 def: T_RR_pat<S2_tstbit_r, int_hexagon_S2_tstbit_r>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
1076
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
1077 /********************************************************************
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
1078 * STYPE/COMPLEX *
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
1079 *********************************************************************/
|
|
83
|
1080 // Vector Complex conjugate
|
|
|
1081 def : T_P_pat <A2_vconj, int_hexagon_A2_vconj>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
1082
|
|
83
|
1083 // Vector Complex rotate
|
|
|
1084 def : T_PR_pat <S2_vcrotate, int_hexagon_S2_vcrotate>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
1085
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
1086 /********************************************************************
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
1087 * STYPE/PERM *
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
1088 *********************************************************************/
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
1089
|
|
83
|
1090 // Vector saturate without pack
|
|
|
1091 def : T_P_pat <S2_vsathb_nopack, int_hexagon_S2_vsathb_nopack>;
|
|
|
1092 def : T_P_pat <S2_vsathub_nopack, int_hexagon_S2_vsathub_nopack>;
|
|
|
1093 def : T_P_pat <S2_vsatwh_nopack, int_hexagon_S2_vsatwh_nopack>;
|
|
|
1094 def : T_P_pat <S2_vsatwuh_nopack, int_hexagon_S2_vsatwuh_nopack>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
1095
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
1096 /********************************************************************
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
1097 * STYPE/PRED *
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
1098 *********************************************************************/
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
1099
|
|
83
|
1100 // Predicate transfer
|
|
|
1101 def: Pat<(i32 (int_hexagon_C2_tfrpr (I32:$Rs))),
|
|
|
1102 (i32 (C2_tfrpr (C2_tfrrp (I32:$Rs))))>;
|
|
|
1103 def: Pat<(i32 (int_hexagon_C2_tfrrp (I32:$Rs))),
|
|
|
1104 (i32 (C2_tfrpr (C2_tfrrp (I32:$Rs))))>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
1105
|
|
83
|
1106 // Mask generate from predicate
|
|
|
1107 def: Pat<(i64 (int_hexagon_C2_mask (I32:$Rs))),
|
|
|
1108 (i64 (C2_mask (C2_tfrrp (I32:$Rs))))>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
1109
|
|
83
|
1110 // Viterbi pack even and odd predicate bits
|
|
|
1111 def: Pat<(i32 (int_hexagon_C2_vitpack (I32:$Rs), (I32:$Rt))),
|
|
|
1112 (i32 (C2_vitpack (C2_tfrrp (I32:$Rs)),
|
|
|
1113 (C2_tfrrp (I32:$Rt))))>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
1114
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
1115 /********************************************************************
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
1116 * STYPE/SHIFT *
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
1117 *********************************************************************/
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
1118
|
|
83
|
1119 def : T_PI_pat <S2_asr_i_p, int_hexagon_S2_asr_i_p>;
|
|
|
1120 def : T_PI_pat <S2_lsr_i_p, int_hexagon_S2_lsr_i_p>;
|
|
|
1121 def : T_PI_pat <S2_asl_i_p, int_hexagon_S2_asl_i_p>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
1122
|
|
83
|
1123 def : T_PR_pat <S2_asr_r_p, int_hexagon_S2_asr_r_p>;
|
|
|
1124 def : T_PR_pat <S2_lsr_r_p, int_hexagon_S2_lsr_r_p>;
|
|
|
1125 def : T_PR_pat <S2_asl_r_p, int_hexagon_S2_asl_r_p>;
|
|
|
1126 def : T_PR_pat <S2_lsl_r_p, int_hexagon_S2_lsl_r_p>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
1127
|
|
83
|
1128 def : T_RR_pat <S2_asr_r_r, int_hexagon_S2_asr_r_r>;
|
|
|
1129 def : T_RR_pat <S2_lsr_r_r, int_hexagon_S2_lsr_r_r>;
|
|
|
1130 def : T_RR_pat <S2_asl_r_r, int_hexagon_S2_asl_r_r>;
|
|
|
1131 def : T_RR_pat <S2_lsl_r_r, int_hexagon_S2_lsl_r_r>;
|
|
|
1132
|
|
|
1133 def : T_RR_pat <S2_asr_r_r_sat, int_hexagon_S2_asr_r_r_sat>;
|
|
|
1134 def : T_RR_pat <S2_asl_r_r_sat, int_hexagon_S2_asl_r_r_sat>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
1135
|
|
83
|
1136 def : T_R_pat <S2_vsxtbh, int_hexagon_S2_vsxtbh>;
|
|
|
1137 def : T_R_pat <S2_vzxtbh, int_hexagon_S2_vzxtbh>;
|
|
|
1138 def : T_R_pat <S2_vsxthw, int_hexagon_S2_vsxthw>;
|
|
|
1139 def : T_R_pat <S2_vzxthw, int_hexagon_S2_vzxthw>;
|
|
|
1140 def : T_R_pat <S2_vsplatrh, int_hexagon_S2_vsplatrh>;
|
|
|
1141 def : T_R_pat <A2_sxtw, int_hexagon_A2_sxtw>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
1142
|
|
83
|
1143 // Vector saturate and pack
|
|
|
1144 def : T_R_pat <S2_svsathb, int_hexagon_S2_svsathb>;
|
|
|
1145 def : T_R_pat <S2_svsathub, int_hexagon_S2_svsathub>;
|
|
|
1146 def : T_P_pat <S2_vsathub, int_hexagon_S2_vsathub>;
|
|
|
1147 def : T_P_pat <S2_vsatwh, int_hexagon_S2_vsatwh>;
|
|
|
1148 def : T_P_pat <S2_vsatwuh, int_hexagon_S2_vsatwuh>;
|
|
|
1149 def : T_P_pat <S2_vsathb, int_hexagon_S2_vsathb>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
1150
|
|
83
|
1151 def : T_P_pat <S2_vtrunohb, int_hexagon_S2_vtrunohb>;
|
|
|
1152 def : T_P_pat <S2_vtrunehb, int_hexagon_S2_vtrunehb>;
|
|
|
1153 def : T_P_pat <S2_vrndpackwh, int_hexagon_S2_vrndpackwh>;
|
|
|
1154 def : T_P_pat <S2_vrndpackwhs, int_hexagon_S2_vrndpackwhs>;
|
|
|
1155 def : T_R_pat <S2_brev, int_hexagon_S2_brev>;
|
|
|
1156 def : T_R_pat <S2_vsplatrb, int_hexagon_S2_vsplatrb>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
1157
|
|
83
|
1158 def : T_R_pat <A2_abs, int_hexagon_A2_abs>;
|
|
|
1159 def : T_R_pat <A2_abssat, int_hexagon_A2_abssat>;
|
|
|
1160 def : T_R_pat <A2_negsat, int_hexagon_A2_negsat>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
1161
|
|
83
|
1162 def : T_R_pat <A2_swiz, int_hexagon_A2_swiz>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
1163
|
|
83
|
1164 def : T_P_pat <A2_sat, int_hexagon_A2_sat>;
|
|
|
1165 def : T_R_pat <A2_sath, int_hexagon_A2_sath>;
|
|
|
1166 def : T_R_pat <A2_satuh, int_hexagon_A2_satuh>;
|
|
|
1167 def : T_R_pat <A2_satub, int_hexagon_A2_satub>;
|
|
|
1168 def : T_R_pat <A2_satb, int_hexagon_A2_satb>;
|
|
|
1169
|
|
|
1170 // Vector arithmetic shift right by immediate with truncate and pack.
|
|
|
1171 def : T_PI_pat<S2_asr_i_svw_trun, int_hexagon_S2_asr_i_svw_trun>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
1172
|
|
83
|
1173 def : T_RI_pat <S2_asr_i_r, int_hexagon_S2_asr_i_r>;
|
|
|
1174 def : T_RI_pat <S2_lsr_i_r, int_hexagon_S2_lsr_i_r>;
|
|
|
1175 def : T_RI_pat <S2_asl_i_r, int_hexagon_S2_asl_i_r>;
|
|
|
1176 def : T_RI_pat <S2_asr_i_r_rnd, int_hexagon_S2_asr_i_r_rnd>;
|
|
|
1177 def : T_RI_pat <S2_asr_i_r_rnd_goodsyntax,
|
|
|
1178 int_hexagon_S2_asr_i_r_rnd_goodsyntax>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
1179
|
|
83
|
1180 // Shift left by immediate with saturation.
|
|
|
1181 def : T_RI_pat <S2_asl_i_r_sat, int_hexagon_S2_asl_i_r_sat>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
1182
|
|
83
|
1183 //===----------------------------------------------------------------------===//
|
|
|
1184 // Template 'def pat' to map tableidx[bhwd] intrinsics to :raw instructions.
|
|
|
1185 //===----------------------------------------------------------------------===//
|
|
|
1186 class S2op_tableidx_pat <Intrinsic IntID, InstHexagon OutputInst,
|
|
|
1187 SDNodeXForm XformImm>
|
|
|
1188 : Pat <(IntID IntRegs:$src1, IntRegs:$src2, u4ImmPred:$src3, u5ImmPred:$src4),
|
|
|
1189 (OutputInst IntRegs:$src1, IntRegs:$src2, u4ImmPred:$src3,
|
|
|
1190 (XformImm u5ImmPred:$src4))>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
1191
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
1192
|
|
83
|
1193 // Table Index : Extract and insert bits.
|
|
|
1194 // Map to the real hardware instructions after subtracting appropriate
|
|
|
1195 // values from the 4th input operand. Please note that subtraction is not
|
|
|
1196 // needed for int_hexagon_S2_tableidxb_goodsyntax.
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
1197
|
|
83
|
1198 def : Pat <(int_hexagon_S2_tableidxb_goodsyntax IntRegs:$src1, IntRegs:$src2,
|
|
|
1199 u4ImmPred:$src3, u5ImmPred:$src4),
|
|
|
1200 (S2_tableidxb IntRegs:$src1, IntRegs:$src2,
|
|
|
1201 u4ImmPred:$src3, u5ImmPred:$src4)>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
1202
|
|
83
|
1203 def : S2op_tableidx_pat <int_hexagon_S2_tableidxh_goodsyntax, S2_tableidxh,
|
|
|
1204 DEC_CONST_SIGNED>;
|
|
|
1205 def : S2op_tableidx_pat <int_hexagon_S2_tableidxw_goodsyntax, S2_tableidxw,
|
|
|
1206 DEC2_CONST_SIGNED>;
|
|
|
1207 def : S2op_tableidx_pat <int_hexagon_S2_tableidxd_goodsyntax, S2_tableidxd,
|
|
|
1208 DEC3_CONST_SIGNED>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
1209
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
1210 /********************************************************************
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
1211 * STYPE/VH *
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
1212 *********************************************************************/
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
1213
|
|
83
|
1214 // Vector absolute value halfwords with and without saturation
|
|
|
1215 // Rdd64=vabsh(Rss64)[:sat]
|
|
|
1216 def : T_P_pat <A2_vabsh, int_hexagon_A2_vabsh>;
|
|
|
1217 def : T_P_pat <A2_vabshsat, int_hexagon_A2_vabshsat>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
1218
|
|
83
|
1219 // Vector shift halfwords by immediate
|
|
|
1220 // Rdd64=[vaslh/vasrh/vlsrh](Rss64,u4)
|
|
|
1221 def : T_PI_pat <S2_asr_i_vh, int_hexagon_S2_asr_i_vh>;
|
|
|
1222 def : T_PI_pat <S2_lsr_i_vh, int_hexagon_S2_lsr_i_vh>;
|
|
|
1223 def : T_PI_pat <S2_asl_i_vh, int_hexagon_S2_asl_i_vh>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
1224
|
|
83
|
1225 // Vector shift halfwords by register
|
|
|
1226 // Rdd64=[vaslw/vasrw/vlslw/vlsrw](Rss64,Rt32)
|
|
|
1227 def : T_PR_pat <S2_asr_r_vh, int_hexagon_S2_asr_r_vh>;
|
|
|
1228 def : T_PR_pat <S2_lsr_r_vh, int_hexagon_S2_lsr_r_vh>;
|
|
|
1229 def : T_PR_pat <S2_asl_r_vh, int_hexagon_S2_asl_r_vh>;
|
|
|
1230 def : T_PR_pat <S2_lsl_r_vh, int_hexagon_S2_lsl_r_vh>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
1231
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
1232 /********************************************************************
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
1233 * STYPE/VW *
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
1234 *********************************************************************/
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
1235
|
|
83
|
1236 // Vector absolute value words with and without saturation
|
|
|
1237 def : T_P_pat <A2_vabsw, int_hexagon_A2_vabsw>;
|
|
|
1238 def : T_P_pat <A2_vabswsat, int_hexagon_A2_vabswsat>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
1239
|
|
83
|
1240 // Vector shift words by immediate.
|
|
|
1241 // Rdd64=[vasrw/vlsrw|vaslw](Rss64,u5)
|
|
|
1242 def : T_PI_pat <S2_asr_i_vw, int_hexagon_S2_asr_i_vw>;
|
|
|
1243 def : T_PI_pat <S2_lsr_i_vw, int_hexagon_S2_lsr_i_vw>;
|
|
|
1244 def : T_PI_pat <S2_asl_i_vw, int_hexagon_S2_asl_i_vw>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
1245
|
|
83
|
1246 // Vector shift words by register.
|
|
|
1247 // Rdd64=[vasrw/vlsrw|vaslw|vlslw](Rss64,Rt32)
|
|
|
1248 def : T_PR_pat <S2_asr_r_vw, int_hexagon_S2_asr_r_vw>;
|
|
|
1249 def : T_PR_pat <S2_lsr_r_vw, int_hexagon_S2_lsr_r_vw>;
|
|
|
1250 def : T_PR_pat <S2_asl_r_vw, int_hexagon_S2_asl_r_vw>;
|
|
|
1251 def : T_PR_pat <S2_lsl_r_vw, int_hexagon_S2_lsl_r_vw>;
|
|
|
1252
|
|
|
1253 // Vector shift words with truncate and pack
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
1254
|
|
83
|
1255 def : T_PR_pat <S2_asr_r_svw_trun, int_hexagon_S2_asr_r_svw_trun>;
|
|
|
1256
|
|
|
1257 def : T_R_pat<L2_loadw_locked, int_hexagon_L2_loadw_locked>;
|
|
|
1258 def : T_R_pat<L4_loadd_locked, int_hexagon_L4_loadd_locked>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
1259
|
|
83
|
1260 def: Pat<(i32 (int_hexagon_S2_storew_locked (I32:$Rs), (I32:$Rt))),
|
|
|
1261 (i32 (C2_tfrpr (S2_storew_locked (I32:$Rs), (I32:$Rt))))>;
|
|
|
1262 def: Pat<(i32 (int_hexagon_S4_stored_locked (I32:$Rs), (I64:$Rt))),
|
|
|
1263 (i32 (C2_tfrpr (S4_stored_locked (I32:$Rs), (I64:$Rt))))>;
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
1264
|
|
95
|
1265 /********************************************************************
|
|
|
1266 * ST
|
|
|
1267 *********************************************************************/
|
|
|
1268
|
|
|
1269 class T_stb_pat <InstHexagon MI, Intrinsic IntID, PatLeaf Val>
|
|
|
1270 : Pat<(IntID I32:$Rs, Val:$Rt, I32:$Ru),
|
|
|
1271 (MI I32:$Rs, Val:$Rt, I32:$Ru)>;
|
|
|
1272
|
|
|
1273 def : T_stb_pat <S2_storerh_pbr_pseudo, int_hexagon_brev_sth, I32>;
|
|
|
1274 def : T_stb_pat <S2_storerb_pbr_pseudo, int_hexagon_brev_stb, I32>;
|
|
|
1275 def : T_stb_pat <S2_storeri_pbr_pseudo, int_hexagon_brev_stw, I32>;
|
|
|
1276 def : T_stb_pat <S2_storerf_pbr_pseudo, int_hexagon_brev_sthhi, I32>;
|
|
|
1277 def : T_stb_pat <S2_storerd_pbr_pseudo, int_hexagon_brev_std, I64>;
|
|
|
1278
|
|
|
1279 class T_stc_pat <InstHexagon MI, Intrinsic IntID, PatLeaf Imm, PatLeaf Val>
|
|
|
1280 : Pat<(IntID I32:$Rs, Val:$Rt, I32:$Ru, Imm:$s),
|
|
|
1281 (MI I32:$Rs, Val:$Rt, I32:$Ru, Imm:$s)>;
|
|
|
1282
|
|
|
1283 def: T_stc_pat<S2_storerb_pci_pseudo, int_hexagon_circ_stb, s4_0ImmPred, I32>;
|
|
|
1284 def: T_stc_pat<S2_storerh_pci_pseudo, int_hexagon_circ_sth, s4_1ImmPred, I32>;
|
|
|
1285 def: T_stc_pat<S2_storeri_pci_pseudo, int_hexagon_circ_stw, s4_2ImmPred, I32>;
|
|
|
1286 def: T_stc_pat<S2_storerd_pci_pseudo, int_hexagon_circ_std, s4_3ImmPred, I64>;
|
|
|
1287 def: T_stc_pat<S2_storerf_pci_pseudo, int_hexagon_circ_sthhi, s4_1ImmPred, I32>;
|
|
|
1288
|
0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
1289 include "HexagonIntrinsicsV3.td"
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
1290 include "HexagonIntrinsicsV4.td"
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
1291 include "HexagonIntrinsicsV5.td"
|
|
100
|
1292 include "HexagonIntrinsicsV60.td"
|
|
|
1293
|
