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annotate lib/Target/Mips/MipsISelLowering.h @ 100:7d135dc70f03 LLVM 3.9

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LLVM 3.9
author Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
date Tue, 26 Jan 2016 22:53:40 +0900
parents afa8332a0e37
children 1172e4bd9c6f
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1 //===-- MipsISelLowering.h - Mips DAG Lowering Interface --------*- C++ -*-===//
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2 //
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3 // The LLVM Compiler Infrastructure
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4 //
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5 // This file is distributed under the University of Illinois Open Source
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6 // License. See LICENSE.TXT for details.
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7 //
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8 //===----------------------------------------------------------------------===//
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9 //
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10 // This file defines the interfaces that Mips uses to lower LLVM code into a
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11 // selection DAG.
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12 //
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13 //===----------------------------------------------------------------------===//
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14
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15 #ifndef LLVM_LIB_TARGET_MIPS_MIPSISELLOWERING_H
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16 #define LLVM_LIB_TARGET_MIPS_MIPSISELLOWERING_H
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17
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18 #include "MCTargetDesc/MipsABIInfo.h"
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19 #include "MCTargetDesc/MipsBaseInfo.h"
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20 #include "Mips.h"
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21 #include "llvm/CodeGen/CallingConvLower.h"
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22 #include "llvm/CodeGen/SelectionDAG.h"
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23 #include "llvm/IR/Function.h"
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24 #include "llvm/Target/TargetLowering.h"
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25 #include <deque>
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26 #include <string>
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27
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28 namespace llvm {
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29 namespace MipsISD {
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30 enum NodeType : unsigned {
0
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31 // Start the numbering from where ISD NodeType finishes.
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32 FIRST_NUMBER = ISD::BUILTIN_OP_END,
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33
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34 // Jump and link (call)
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35 JmpLink,
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36
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37 // Tail call
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38 TailCall,
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39
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40 // Get the Higher 16 bits from a 32-bit immediate
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41 // No relation with Mips Hi register
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42 Hi,
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43
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44 // Get the Lower 16 bits from a 32-bit immediate
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45 // No relation with Mips Lo register
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46 Lo,
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47
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48 // Handle gp_rel (small data/bss sections) relocation.
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49 GPRel,
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50
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51 // Thread Pointer
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52 ThreadPointer,
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53
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54 // Floating Point Branch Conditional
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55 FPBrcond,
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56
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57 // Floating Point Compare
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58 FPCmp,
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59
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60 // Floating Point Conditional Moves
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61 CMovFP_T,
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62 CMovFP_F,
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63
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64 // FP-to-int truncation node.
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65 TruncIntFP,
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66
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67 // Return
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68 Ret,
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69
100
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70 // Interrupt, exception, error trap Return
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71 ERet,
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72
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73 // Software Exception Return.
0
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74 EH_RETURN,
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75
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76 // Node used to extract integer from accumulator.
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77 MFHI,
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78 MFLO,
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79
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80 // Node used to insert integers to accumulator.
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81 MTLOHI,
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82
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83 // Mult nodes.
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84 Mult,
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85 Multu,
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86
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87 // MAdd/Sub nodes
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88 MAdd,
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89 MAddu,
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90 MSub,
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91 MSubu,
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92
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93 // DivRem(u)
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94 DivRem,
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95 DivRemU,
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96 DivRem16,
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97 DivRemU16,
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98
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99 BuildPairF64,
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100 ExtractElementF64,
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101
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102 Wrapper,
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103
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104 DynAlloc,
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105
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106 Sync,
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107
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108 Ext,
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109 Ins,
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110
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111 // EXTR.W instrinsic nodes.
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112 EXTP,
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113 EXTPDP,
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114 EXTR_S_H,
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115 EXTR_W,
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116 EXTR_R_W,
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117 EXTR_RS_W,
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118 SHILO,
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119 MTHLIP,
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120
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121 // DPA.W intrinsic nodes.
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122 MULSAQ_S_W_PH,
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123 MAQ_S_W_PHL,
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124 MAQ_S_W_PHR,
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125 MAQ_SA_W_PHL,
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126 MAQ_SA_W_PHR,
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127 DPAU_H_QBL,
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128 DPAU_H_QBR,
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129 DPSU_H_QBL,
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130 DPSU_H_QBR,
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131 DPAQ_S_W_PH,
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132 DPSQ_S_W_PH,
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133 DPAQ_SA_L_W,
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134 DPSQ_SA_L_W,
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135 DPA_W_PH,
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136 DPS_W_PH,
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
137 DPAQX_S_W_PH,
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
138 DPAQX_SA_W_PH,
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
139 DPAX_W_PH,
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
140 DPSX_W_PH,
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
141 DPSQX_S_W_PH,
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
142 DPSQX_SA_W_PH,
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
143 MULSA_W_PH,
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
144
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
145 MULT,
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
146 MULTU,
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
147 MADD_DSP,
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
148 MADDU_DSP,
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
149 MSUB_DSP,
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
150 MSUBU_DSP,
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
151
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
152 // DSP shift nodes.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
153 SHLL_DSP,
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
154 SHRA_DSP,
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
155 SHRL_DSP,
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
156
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
157 // DSP setcc and select_cc nodes.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
158 SETCC_DSP,
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
159 SELECT_CC_DSP,
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
160
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
161 // Vector comparisons.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
162 // These take a vector and return a boolean.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
163 VALL_ZERO,
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
164 VANY_ZERO,
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
165 VALL_NONZERO,
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
166 VANY_NONZERO,
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
167
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
168 // These take a vector and return a vector bitmask.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
169 VCEQ,
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
170 VCLE_S,
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
171 VCLE_U,
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
172 VCLT_S,
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
173 VCLT_U,
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
174
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
175 // Element-wise vector max/min.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
176 VSMAX,
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
177 VSMIN,
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
178 VUMAX,
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
179 VUMIN,
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
180
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
181 // Vector Shuffle with mask as an operand
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
182 VSHF, // Generic shuffle
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
183 SHF, // 4-element set shuffle.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
184 ILVEV, // Interleave even elements
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
185 ILVOD, // Interleave odd elements
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
186 ILVL, // Interleave left elements
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
187 ILVR, // Interleave right elements
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
188 PCKEV, // Pack even elements
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
189 PCKOD, // Pack odd elements
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
190
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
191 // Vector Lane Copy
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
192 INSVE, // Copy element from one vector to another
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
193
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
194 // Combined (XOR (OR $a, $b), -1)
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
195 VNOR,
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
196
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
197 // Extended vector element extraction
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
198 VEXTRACT_SEXT_ELT,
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
199 VEXTRACT_ZEXT_ELT,
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
200
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
201 // Load/Store Left/Right nodes.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
202 LWL = ISD::FIRST_TARGET_MEMORY_OPCODE,
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
203 LWR,
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
204 SWL,
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
205 SWR,
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
206 LDL,
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
207 LDR,
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
208 SDL,
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
209 SDR
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
210 };
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
211 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
212
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
213 //===--------------------------------------------------------------------===//
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
214 // TargetLowering Implementation
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
215 //===--------------------------------------------------------------------===//
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
216 class MipsFunctionInfo;
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
217 class MipsSubtarget;
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
218 class MipsCCState;
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
219
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
220 class MipsTargetLowering : public TargetLowering {
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
221 bool isMicroMips;
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
222 public:
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
223 explicit MipsTargetLowering(const MipsTargetMachine &TM,
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
224 const MipsSubtarget &STI);
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
225
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
226 static const MipsTargetLowering *create(const MipsTargetMachine &TM,
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
227 const MipsSubtarget &STI);
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
228
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
229 /// createFastISel - This method returns a target specific FastISel object,
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
230 /// or null if the target does not support "fast" ISel.
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
231 FastISel *createFastISel(FunctionLoweringInfo &funcInfo,
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
232 const TargetLibraryInfo *libInfo) const override;
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
233
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
234 MVT getScalarShiftAmountTy(const DataLayout &, EVT) const override {
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
235 return MVT::i32;
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
236 }
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
237
100
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
238 bool isCheapToSpeculateCttz() const override;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
239 bool isCheapToSpeculateCtlz() const override;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
240
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
241 void LowerOperationWrapper(SDNode *N,
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
242 SmallVectorImpl<SDValue> &Results,
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
243 SelectionDAG &DAG) const override;
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
244
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
245 /// LowerOperation - Provide custom lowering hooks for some operations.
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
246 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
247
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
248 /// ReplaceNodeResults - Replace the results of node with an illegal result
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
249 /// type with new values built out of custom code.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
250 ///
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
251 void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue>&Results,
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
252 SelectionDAG &DAG) const override;
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
253
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
254 /// getTargetNodeName - This method returns the name of a target specific
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
255 // DAG node.
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
256 const char *getTargetNodeName(unsigned Opcode) const override;
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
257
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
258 /// getSetCCResultType - get the ISD::SETCC result ValueType
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
259 EVT getSetCCResultType(const DataLayout &DL, LLVMContext &Context,
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
260 EVT VT) const override;
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
261
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
262 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
263
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
264 MachineBasicBlock *
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
265 EmitInstrWithCustomInserter(MachineInstr *MI,
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
266 MachineBasicBlock *MBB) const override;
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
267
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
268 void HandleByVal(CCState *, unsigned &, unsigned) const override;
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
269
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
270 unsigned getRegisterByName(const char* RegName, EVT VT,
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
271 SelectionDAG &DAG) const override;
afa8332a0e37 LLVM 3.8
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272
100
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273 /// If a physical register, this returns the register that receives the
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274 /// exception address on entry to an EH pad.
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diff changeset
275 unsigned
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276 getExceptionPointerRegister(const Constant *PersonalityFn) const override {
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277 return ABI.IsN64() ? Mips::A0_64 : Mips::A0;
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278 }
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279
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280 /// If a physical register, this returns the register that receives the
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281 /// exception typeid on entry to a landing pad.
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diff changeset
282 unsigned
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diff changeset
283 getExceptionSelectorRegister(const Constant *PersonalityFn) const override {
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284 return ABI.IsN64() ? Mips::A1_64 : Mips::A1;
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285 }
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286
95
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287 /// Returns true if a cast between SrcAS and DestAS is a noop.
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288 bool isNoopAddrSpaceCast(unsigned SrcAS, unsigned DestAS) const override {
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289 // Mips doesn't have any special address spaces so we just reserve
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290 // the first 256 for software use (e.g. OpenCL) and treat casts
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291 // between them as noops.
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292 return SrcAS < 256 && DestAS < 256;
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293 }
83
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294
0
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295 protected:
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296 SDValue getGlobalReg(SelectionDAG &DAG, EVT Ty) const;
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297
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298 // This method creates the following nodes, which are necessary for
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299 // computing a local symbol's address:
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300 //
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301 // (add (load (wrapper $gp, %got(sym)), %lo(sym))
77
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diff changeset
302 template <class NodeTy>
83
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303 SDValue getAddrLocal(NodeTy *N, SDLoc DL, EVT Ty, SelectionDAG &DAG,
77
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diff changeset
304 bool IsN32OrN64) const {
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305 unsigned GOTFlag = IsN32OrN64 ? MipsII::MO_GOT_PAGE : MipsII::MO_GOT;
0
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306 SDValue GOT = DAG.getNode(MipsISD::Wrapper, DL, Ty, getGlobalReg(DAG, Ty),
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307 getTargetNode(N, Ty, DAG, GOTFlag));
95
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diff changeset
308 SDValue Load =
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309 DAG.getLoad(Ty, DL, DAG.getEntryNode(), GOT,
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310 MachinePointerInfo::getGOT(DAG.getMachineFunction()),
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311 false, false, false, 0);
77
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312 unsigned LoFlag = IsN32OrN64 ? MipsII::MO_GOT_OFST : MipsII::MO_ABS_LO;
0
95c75e76d11b LLVM 3.4
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313 SDValue Lo = DAG.getNode(MipsISD::Lo, DL, Ty,
95c75e76d11b LLVM 3.4
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diff changeset
314 getTargetNode(N, Ty, DAG, LoFlag));
95c75e76d11b LLVM 3.4
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diff changeset
315 return DAG.getNode(ISD::ADD, DL, Ty, Load, Lo);
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316 }
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diff changeset
317
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318 // This method creates the following nodes, which are necessary for
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319 // computing a global symbol's address:
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320 //
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321 // (load (wrapper $gp, %got(sym)))
83
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diff changeset
322 template <class NodeTy>
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323 SDValue getAddrGlobal(NodeTy *N, SDLoc DL, EVT Ty, SelectionDAG &DAG,
0
95c75e76d11b LLVM 3.4
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diff changeset
324 unsigned Flag, SDValue Chain,
95c75e76d11b LLVM 3.4
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parents:
diff changeset
325 const MachinePointerInfo &PtrInfo) const {
95c75e76d11b LLVM 3.4
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diff changeset
326 SDValue Tgt = DAG.getNode(MipsISD::Wrapper, DL, Ty, getGlobalReg(DAG, Ty),
95c75e76d11b LLVM 3.4
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diff changeset
327 getTargetNode(N, Ty, DAG, Flag));
95c75e76d11b LLVM 3.4
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diff changeset
328 return DAG.getLoad(Ty, DL, Chain, Tgt, PtrInfo, false, false, false, 0);
95c75e76d11b LLVM 3.4
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diff changeset
329 }
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diff changeset
330
95c75e76d11b LLVM 3.4
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diff changeset
331 // This method creates the following nodes, which are necessary for
95c75e76d11b LLVM 3.4
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parents:
diff changeset
332 // computing a global symbol's address in large-GOT mode:
95c75e76d11b LLVM 3.4
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parents:
diff changeset
333 //
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diff changeset
334 // (load (wrapper (add %hi(sym), $gp), %lo(sym)))
83
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diff changeset
335 template <class NodeTy>
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diff changeset
336 SDValue getAddrGlobalLargeGOT(NodeTy *N, SDLoc DL, EVT Ty,
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diff changeset
337 SelectionDAG &DAG, unsigned HiFlag,
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diff changeset
338 unsigned LoFlag, SDValue Chain,
0
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diff changeset
339 const MachinePointerInfo &PtrInfo) const {
83
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diff changeset
340 SDValue Hi =
60c9769439b8 LLVM 3.7
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diff changeset
341 DAG.getNode(MipsISD::Hi, DL, Ty, getTargetNode(N, Ty, DAG, HiFlag));
0
95c75e76d11b LLVM 3.4
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diff changeset
342 Hi = DAG.getNode(ISD::ADD, DL, Ty, Hi, getGlobalReg(DAG, Ty));
95c75e76d11b LLVM 3.4
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parents:
diff changeset
343 SDValue Wrapper = DAG.getNode(MipsISD::Wrapper, DL, Ty, Hi,
95c75e76d11b LLVM 3.4
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parents:
diff changeset
344 getTargetNode(N, Ty, DAG, LoFlag));
95c75e76d11b LLVM 3.4
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parents:
diff changeset
345 return DAG.getLoad(Ty, DL, Chain, Wrapper, PtrInfo, false, false, false,
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
346 0);
95c75e76d11b LLVM 3.4
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parents:
diff changeset
347 }
95c75e76d11b LLVM 3.4
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parents:
diff changeset
348
95c75e76d11b LLVM 3.4
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diff changeset
349 // This method creates the following nodes, which are necessary for
95c75e76d11b LLVM 3.4
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parents:
diff changeset
350 // computing a symbol's address in non-PIC mode:
95c75e76d11b LLVM 3.4
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parents:
diff changeset
351 //
95c75e76d11b LLVM 3.4
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diff changeset
352 // (add %hi(sym), %lo(sym))
83
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diff changeset
353 template <class NodeTy>
60c9769439b8 LLVM 3.7
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diff changeset
354 SDValue getAddrNonPIC(NodeTy *N, SDLoc DL, EVT Ty,
60c9769439b8 LLVM 3.7
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parents: 77
diff changeset
355 SelectionDAG &DAG) const {
0
95c75e76d11b LLVM 3.4
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parents:
diff changeset
356 SDValue Hi = getTargetNode(N, Ty, DAG, MipsII::MO_ABS_HI);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
357 SDValue Lo = getTargetNode(N, Ty, DAG, MipsII::MO_ABS_LO);
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
358 return DAG.getNode(ISD::ADD, DL, Ty,
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
359 DAG.getNode(MipsISD::Hi, DL, Ty, Hi),
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
360 DAG.getNode(MipsISD::Lo, DL, Ty, Lo));
95c75e76d11b LLVM 3.4
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parents:
diff changeset
361 }
95c75e76d11b LLVM 3.4
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parents:
diff changeset
362
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
363 // This method creates the following nodes, which are necessary for
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
364 // computing a symbol's address using gp-relative addressing:
60c9769439b8 LLVM 3.7
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parents: 77
diff changeset
365 //
60c9769439b8 LLVM 3.7
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diff changeset
366 // (add $gp, %gp_rel(sym))
60c9769439b8 LLVM 3.7
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parents: 77
diff changeset
367 template <class NodeTy>
60c9769439b8 LLVM 3.7
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parents: 77
diff changeset
368 SDValue getAddrGPRel(NodeTy *N, SDLoc DL, EVT Ty, SelectionDAG &DAG) const {
60c9769439b8 LLVM 3.7
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parents: 77
diff changeset
369 assert(Ty == MVT::i32);
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
370 SDValue GPRel = getTargetNode(N, Ty, DAG, MipsII::MO_GPREL);
60c9769439b8 LLVM 3.7
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parents: 77
diff changeset
371 return DAG.getNode(ISD::ADD, DL, Ty,
60c9769439b8 LLVM 3.7
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parents: 77
diff changeset
372 DAG.getRegister(Mips::GP, Ty),
60c9769439b8 LLVM 3.7
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parents: 77
diff changeset
373 DAG.getNode(MipsISD::GPRel, DL, DAG.getVTList(Ty),
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
374 GPRel));
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
375 }
60c9769439b8 LLVM 3.7
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parents: 77
diff changeset
376
0
95c75e76d11b LLVM 3.4
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parents:
diff changeset
377 /// This function fills Ops, which is the list of operands that will later
95c75e76d11b LLVM 3.4
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parents:
diff changeset
378 /// be used when a function call node is created. It also generates
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
379 /// copyToReg nodes to set up argument registers.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
380 virtual void
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
381 getOpndList(SmallVectorImpl<SDValue> &Ops,
95c75e76d11b LLVM 3.4
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parents:
diff changeset
382 std::deque< std::pair<unsigned, SDValue> > &RegsToPass,
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
383 bool IsPICCall, bool GlobalOrExternal, bool InternalLinkage,
83
60c9769439b8 LLVM 3.7
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parents: 77
diff changeset
384 bool IsCallReloc, CallLoweringInfo &CLI, SDValue Callee,
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
385 SDValue Chain) const;
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
386
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
387 protected:
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
388 SDValue lowerLOAD(SDValue Op, SelectionDAG &DAG) const;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
389 SDValue lowerSTORE(SDValue Op, SelectionDAG &DAG) const;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
390
95c75e76d11b LLVM 3.4
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parents:
diff changeset
391 // Subtarget Info
77
54457678186b LLVM 3.6
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parents: 0
diff changeset
392 const MipsSubtarget &Subtarget;
83
60c9769439b8 LLVM 3.7
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parents: 77
diff changeset
393 // Cache the ABI from the TargetMachine, we use it everywhere.
60c9769439b8 LLVM 3.7
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parents: 77
diff changeset
394 const MipsABIInfo &ABI;
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
395
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
396 private:
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
397 // Create a TargetGlobalAddress node.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
398 SDValue getTargetNode(GlobalAddressSDNode *N, EVT Ty, SelectionDAG &DAG,
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
399 unsigned Flag) const;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
400
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
401 // Create a TargetExternalSymbol node.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
402 SDValue getTargetNode(ExternalSymbolSDNode *N, EVT Ty, SelectionDAG &DAG,
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
403 unsigned Flag) const;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
404
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
405 // Create a TargetBlockAddress node.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
406 SDValue getTargetNode(BlockAddressSDNode *N, EVT Ty, SelectionDAG &DAG,
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
407 unsigned Flag) const;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
408
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
409 // Create a TargetJumpTable node.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
410 SDValue getTargetNode(JumpTableSDNode *N, EVT Ty, SelectionDAG &DAG,
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
411 unsigned Flag) const;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
412
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
413 // Create a TargetConstantPool node.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
414 SDValue getTargetNode(ConstantPoolSDNode *N, EVT Ty, SelectionDAG &DAG,
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
415 unsigned Flag) const;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
416
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
417 // Lower Operand helpers
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
418 SDValue LowerCallResult(SDValue Chain, SDValue InFlag,
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
419 CallingConv::ID CallConv, bool isVarArg,
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
420 const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl,
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
421 SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals,
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
422 TargetLowering::CallLoweringInfo &CLI) const;
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
423
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
424 // Lower Operand specifics
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
425 SDValue lowerBR_JT(SDValue Op, SelectionDAG &DAG) const;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
426 SDValue lowerBRCOND(SDValue Op, SelectionDAG &DAG) const;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
427 SDValue lowerConstantPool(SDValue Op, SelectionDAG &DAG) const;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
428 SDValue lowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
429 SDValue lowerBlockAddress(SDValue Op, SelectionDAG &DAG) const;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
430 SDValue lowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG) const;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
431 SDValue lowerJumpTable(SDValue Op, SelectionDAG &DAG) const;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
432 SDValue lowerSELECT(SDValue Op, SelectionDAG &DAG) const;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
433 SDValue lowerSETCC(SDValue Op, SelectionDAG &DAG) const;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
434 SDValue lowerVASTART(SDValue Op, SelectionDAG &DAG) const;
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
435 SDValue lowerVAARG(SDValue Op, SelectionDAG &DAG) const;
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
436 SDValue lowerFCOPYSIGN(SDValue Op, SelectionDAG &DAG) const;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
437 SDValue lowerFABS(SDValue Op, SelectionDAG &DAG) const;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
438 SDValue lowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) const;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
439 SDValue lowerRETURNADDR(SDValue Op, SelectionDAG &DAG) const;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
440 SDValue lowerEH_RETURN(SDValue Op, SelectionDAG &DAG) const;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
441 SDValue lowerATOMIC_FENCE(SDValue Op, SelectionDAG& DAG) const;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
442 SDValue lowerShiftLeftParts(SDValue Op, SelectionDAG& DAG) const;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
443 SDValue lowerShiftRightParts(SDValue Op, SelectionDAG& DAG,
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
444 bool IsSRA) const;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
445 SDValue lowerADD(SDValue Op, SelectionDAG &DAG) const;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
446 SDValue lowerFP_TO_SINT(SDValue Op, SelectionDAG &DAG) const;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
447
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
448 /// isEligibleForTailCallOptimization - Check whether the call is eligible
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
449 /// for tail call optimization.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
450 virtual bool
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
451 isEligibleForTailCallOptimization(const CCState &CCInfo,
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
452 unsigned NextStackOffset,
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
453 const MipsFunctionInfo &FI) const = 0;
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
454
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
455 /// copyByValArg - Copy argument registers which were used to pass a byval
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
456 /// argument to the stack. Create a stack frame object for the byval
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
457 /// argument.
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
458 void copyByValRegs(SDValue Chain, SDLoc DL, std::vector<SDValue> &OutChains,
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
459 SelectionDAG &DAG, const ISD::ArgFlagsTy &Flags,
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
460 SmallVectorImpl<SDValue> &InVals,
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
461 const Argument *FuncArg, unsigned FirstReg,
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
462 unsigned LastReg, const CCValAssign &VA,
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
463 MipsCCState &State) const;
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
464
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
465 /// passByValArg - Pass a byval argument in registers or on stack.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
466 void passByValArg(SDValue Chain, SDLoc DL,
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
467 std::deque<std::pair<unsigned, SDValue>> &RegsToPass,
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
468 SmallVectorImpl<SDValue> &MemOpChains, SDValue StackPtr,
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
469 MachineFrameInfo *MFI, SelectionDAG &DAG, SDValue Arg,
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
470 unsigned FirstReg, unsigned LastReg,
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
471 const ISD::ArgFlagsTy &Flags, bool isLittle,
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
472 const CCValAssign &VA) const;
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
473
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
474 /// writeVarArgRegs - Write variable function arguments passed in registers
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
475 /// to the stack. Also create a stack frame object for the first variable
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
476 /// argument.
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
477 void writeVarArgRegs(std::vector<SDValue> &OutChains, SDValue Chain,
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
478 SDLoc DL, SelectionDAG &DAG, CCState &State) const;
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
479
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
480 SDValue
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
481 LowerFormalArguments(SDValue Chain,
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
482 CallingConv::ID CallConv, bool isVarArg,
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
483 const SmallVectorImpl<ISD::InputArg> &Ins,
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
484 SDLoc dl, SelectionDAG &DAG,
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
485 SmallVectorImpl<SDValue> &InVals) const override;
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
486
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
487 SDValue passArgOnStack(SDValue StackPtr, unsigned Offset, SDValue Chain,
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
488 SDValue Arg, SDLoc DL, bool IsTailCall,
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
489 SelectionDAG &DAG) const;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
490
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
491 SDValue LowerCall(TargetLowering::CallLoweringInfo &CLI,
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
492 SmallVectorImpl<SDValue> &InVals) const override;
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
493
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
494 bool CanLowerReturn(CallingConv::ID CallConv, MachineFunction &MF,
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
495 bool isVarArg,
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
496 const SmallVectorImpl<ISD::OutputArg> &Outs,
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
497 LLVMContext &Context) const override;
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
498
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
499 SDValue LowerReturn(SDValue Chain,
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
500 CallingConv::ID CallConv, bool isVarArg,
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
501 const SmallVectorImpl<ISD::OutputArg> &Outs,
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
502 const SmallVectorImpl<SDValue> &OutVals,
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
503 SDLoc dl, SelectionDAG &DAG) const override;
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
504
100
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
505 SDValue LowerInterruptReturn(SmallVectorImpl<SDValue> &RetOps, SDLoc DL,
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
506 SelectionDAG &DAG) const;
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
diff changeset
507
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
508 bool shouldSignExtendTypeInLibCall(EVT Type, bool IsSigned) const override;
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
509
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
510 // Inline asm support
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
511 ConstraintType getConstraintType(StringRef Constraint) const override;
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
512
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
513 /// Examine constraint string and operand type and determine a weight value.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
514 /// The operand object must already have been set up with the operand type.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
515 ConstraintWeight getSingleConstraintMatchWeight(
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
516 AsmOperandInfo &info, const char *constraint) const override;
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
517
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
518 /// This function parses registers that appear in inline-asm constraints.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
519 /// It returns pair (0, 0) on failure.
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
520 std::pair<unsigned, const TargetRegisterClass *>
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
521 parseRegForInlineAsmConstraint(StringRef C, MVT VT) const;
0
95c75e76d11b LLVM 3.4
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parents:
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522
95
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diff changeset
523 std::pair<unsigned, const TargetRegisterClass *>
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parents: 83
diff changeset
524 getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
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parents: 83
diff changeset
525 StringRef Constraint, MVT VT) const override;
0
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526
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527 /// LowerAsmOperandForConstraint - Lower the specified operand into the Ops
95c75e76d11b LLVM 3.4
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528 /// vector. If it is invalid, don't add anything to Ops. If hasMemory is
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529 /// true it means one of the asm constraint of the inline asm instruction
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530 /// being processed is 'm'.
77
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parents: 0
diff changeset
531 void LowerAsmOperandForConstraint(SDValue Op,
54457678186b LLVM 3.6
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diff changeset
532 std::string &Constraint,
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diff changeset
533 std::vector<SDValue> &Ops,
54457678186b LLVM 3.6
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parents: 0
diff changeset
534 SelectionDAG &DAG) const override;
0
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535
95
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diff changeset
536 unsigned
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537 getInlineAsmMemConstraint(StringRef ConstraintCode) const override {
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538 if (ConstraintCode == "R")
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diff changeset
539 return InlineAsm::Constraint_R;
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diff changeset
540 else if (ConstraintCode == "ZC")
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diff changeset
541 return InlineAsm::Constraint_ZC;
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542 return TargetLowering::getInlineAsmMemConstraint(ConstraintCode);
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diff changeset
543 }
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diff changeset
544
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diff changeset
545 bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM,
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parents: 83
diff changeset
546 Type *Ty, unsigned AS) const override;
0
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diff changeset
547
77
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diff changeset
548 bool isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const override;
0
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diff changeset
549
77
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diff changeset
550 EVT getOptimalMemOpType(uint64_t Size, unsigned DstAlign,
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
551 unsigned SrcAlign,
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parents: 0
diff changeset
552 bool IsMemset, bool ZeroMemset,
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parents: 0
diff changeset
553 bool MemcpyStrSrc,
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parents: 0
diff changeset
554 MachineFunction &MF) const override;
0
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diff changeset
555
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556 /// isFPImmLegal - Returns true if the target can instruction select the
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diff changeset
557 /// specified FP immediate natively. If false, the legalizer will
95c75e76d11b LLVM 3.4
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parents:
diff changeset
558 /// materialize the FP immediate as a load from a constant pool.
77
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parents: 0
diff changeset
559 bool isFPImmLegal(const APFloat &Imm, EVT VT) const override;
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parents: 0
diff changeset
560
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diff changeset
561 unsigned getJumpTableEncoding() const override;
95
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diff changeset
562 bool useSoftFloat() const override;
0
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563
77
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parents: 0
diff changeset
564 /// Emit a sign-extension using sll/sra, seb, or seh appropriately.
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
565 MachineBasicBlock *emitSignExtendToI32InReg(MachineInstr *MI,
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
566 MachineBasicBlock *BB,
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parents: 0
diff changeset
567 unsigned Size, unsigned DstReg,
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parents: 0
diff changeset
568 unsigned SrcRec) const;
0
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diff changeset
569
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diff changeset
570 MachineBasicBlock *emitAtomicBinary(MachineInstr *MI, MachineBasicBlock *BB,
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parents:
diff changeset
571 unsigned Size, unsigned BinOpcode, bool Nand = false) const;
95c75e76d11b LLVM 3.4
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parents:
diff changeset
572 MachineBasicBlock *emitAtomicBinaryPartword(MachineInstr *MI,
95c75e76d11b LLVM 3.4
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parents:
diff changeset
573 MachineBasicBlock *BB, unsigned Size, unsigned BinOpcode,
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parents:
diff changeset
574 bool Nand = false) const;
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parents:
diff changeset
575 MachineBasicBlock *emitAtomicCmpSwap(MachineInstr *MI,
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parents:
diff changeset
576 MachineBasicBlock *BB, unsigned Size) const;
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parents:
diff changeset
577 MachineBasicBlock *emitAtomicCmpSwapPartword(MachineInstr *MI,
95c75e76d11b LLVM 3.4
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parents:
diff changeset
578 MachineBasicBlock *BB, unsigned Size) const;
77
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parents: 0
diff changeset
579 MachineBasicBlock *emitSEL_D(MachineInstr *MI, MachineBasicBlock *BB) const;
83
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Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
580 MachineBasicBlock *emitPseudoSELECT(MachineInstr *MI,
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
581 MachineBasicBlock *BB, bool isFPCmp,
60c9769439b8 LLVM 3.7
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parents: 77
diff changeset
582 unsigned Opc) const;
0
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parents:
diff changeset
583 };
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parents:
diff changeset
584
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parents:
diff changeset
585 /// Create MipsTargetLowering objects.
77
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parents: 0
diff changeset
586 const MipsTargetLowering *
83
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Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
587 createMips16TargetLowering(const MipsTargetMachine &TM,
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
588 const MipsSubtarget &STI);
77
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
589 const MipsTargetLowering *
83
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Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
590 createMipsSETargetLowering(const MipsTargetMachine &TM,
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
591 const MipsSubtarget &STI);
77
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
592
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
593 namespace Mips {
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
594 FastISel *createFastISel(FunctionLoweringInfo &funcInfo,
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
595 const TargetLibraryInfo *libInfo);
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
596 }
0
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
597 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
598
77
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 0
diff changeset
599 #endif