annotate test/CodeGen/AMDGPU/trunc.ll @ 100:7d135dc70f03 LLVM 3.9

LLVM 3.9
author Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
date Tue, 26 Jan 2016 22:53:40 +0900
parents afa8332a0e37
children 1172e4bd9c6f
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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1 ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs< %s | FileCheck -check-prefix=SI %s
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2 ; RUN: llc -march=r600 -mcpu=cypress < %s | FileCheck -check-prefix=EG %s
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3
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4 declare i32 @llvm.r600.read.tidig.x() nounwind readnone
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5
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6 define void @trunc_i64_to_i32_store(i32 addrspace(1)* %out, i64 %in) {
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7 ; SI-LABEL: {{^}}trunc_i64_to_i32_store:
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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8 ; SI: s_load_dword [[SLOAD:s[0-9]+]], s[0:1], 0xb
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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9 ; SI: v_mov_b32_e32 [[VLOAD:v[0-9]+]], [[SLOAD]]
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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10 ; SI: buffer_store_dword [[VLOAD]]
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11
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12 ; EG-LABEL: {{^}}trunc_i64_to_i32_store:
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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13 ; EG: MEM_RAT_CACHELESS STORE_RAW T0.X, T1.X, 1
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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14 ; EG: LSHR
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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15 ; EG-NEXT: 2(
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16
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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17 %result = trunc i64 %in to i32 store i32 %result, i32 addrspace(1)* %out, align 4
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18 ret void
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19 }
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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20
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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21 ; SI-LABEL: {{^}}trunc_load_shl_i64:
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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22 ; SI-DAG: s_load_dwordx2
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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23 ; SI-DAG: s_load_dword [[SREG:s[0-9]+]],
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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24 ; SI: s_lshl_b32 [[SHL:s[0-9]+]], [[SREG]], 2
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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25 ; SI: v_mov_b32_e32 [[VSHL:v[0-9]+]], [[SHL]]
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parents:
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26 ; SI: buffer_store_dword [[VSHL]],
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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27 define void @trunc_load_shl_i64(i32 addrspace(1)* %out, i64 %a) {
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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28 %b = shl i64 %a, 2
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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29 %result = trunc i64 %b to i32
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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30 store i32 %result, i32 addrspace(1)* %out, align 4
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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31 ret void
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32 }
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33
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34 ; SI-LABEL: {{^}}trunc_shl_i64:
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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35 ; SI: s_load_dwordx2 s{{\[}}[[LO_SREG:[0-9]+]]:{{[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0xd
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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36 ; SI: s_lshl_b64 s{{\[}}[[LO_SHL:[0-9]+]]:{{[0-9]+\]}}, s{{\[}}[[LO_SREG]]:{{[0-9]+\]}}, 2
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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37 ; SI: s_add_u32 s[[LO_SREG2:[0-9]+]], s[[LO_SHL]],
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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38 ; SI: s_addc_u32
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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39 ; SI: v_mov_b32_e32
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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40 ; SI: v_mov_b32_e32
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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41 ; SI: v_mov_b32_e32 v[[LO_VREG:[0-9]+]], s[[LO_SREG2]]
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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42 ; SI: buffer_store_dword v[[LO_VREG]],
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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43 define void @trunc_shl_i64(i64 addrspace(1)* %out2, i32 addrspace(1)* %out, i64 %a) {
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parents:
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44 %aa = add i64 %a, 234 ; Prevent shrinking store.
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parents:
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45 %b = shl i64 %aa, 2
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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46 %result = trunc i64 %b to i32
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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47 store i32 %result, i32 addrspace(1)* %out, align 4
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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48 store i64 %b, i64 addrspace(1)* %out2, align 8 ; Prevent reducing ops to 32-bits
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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49 ret void
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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50 }
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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51
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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52 ; SI-LABEL: {{^}}trunc_i32_to_i1:
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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53 ; SI: v_and_b32_e32 v{{[0-9]+}}, 1, v{{[0-9]+}}
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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54 ; SI: v_cmp_eq_i32
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55 define void @trunc_i32_to_i1(i32 addrspace(1)* %out, i32 addrspace(1)* %ptr) {
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56 %a = load i32, i32 addrspace(1)* %ptr, align 4
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57 %trunc = trunc i32 %a to i1
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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58 %result = select i1 %trunc, i32 1, i32 0
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59 store i32 %result, i32 addrspace(1)* %out, align 4
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60 ret void
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parents:
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61 }
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62
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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63 ; SI-LABEL: {{^}}sgpr_trunc_i32_to_i1:
100
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Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
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64 ; SI: s_and_b32 s{{[0-9]+}}, 1, s{{[0-9]+}}
95
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parents:
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65 ; SI: v_cmp_eq_i32
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parents:
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66 define void @sgpr_trunc_i32_to_i1(i32 addrspace(1)* %out, i32 %a) {
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67 %trunc = trunc i32 %a to i1
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68 %result = select i1 %trunc, i32 1, i32 0
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parents:
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69 store i32 %result, i32 addrspace(1)* %out, align 4
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70 ret void
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parents:
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71 }
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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72
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parents:
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73 ; SI-LABEL: {{^}}s_trunc_i64_to_i1:
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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74 ; SI: s_load_dwordx2 s{{\[}}[[SLO:[0-9]+]]:{{[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0xb
100
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Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
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75 ; SI: s_and_b32 [[MASKED:s[0-9]+]], 1, s[[SLO]]
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Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
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76 ; SI: v_cmp_eq_i32_e64 s{{\[}}[[VLO:[0-9]+]]:[[VHI:[0-9]+]]], 1, [[MASKED]]
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Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 95
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77 ; SI: v_cndmask_b32_e64 {{v[0-9]+}}, -12, 63, s{{\[}}[[VLO]]:[[VHI]]]
95
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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78 define void @s_trunc_i64_to_i1(i32 addrspace(1)* %out, i64 %x) {
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79 %trunc = trunc i64 %x to i1
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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80 %sel = select i1 %trunc, i32 63, i32 -12
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parents:
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81 store i32 %sel, i32 addrspace(1)* %out
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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82 ret void
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parents:
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83 }
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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84
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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85 ; SI-LABEL: {{^}}v_trunc_i64_to_i1:
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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86 ; SI: buffer_load_dwordx2 v{{\[}}[[VLO:[0-9]+]]:{{[0-9]+\]}}
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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87 ; SI: v_and_b32_e32 [[MASKED:v[0-9]+]], 1, v[[VLO]]
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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88 ; SI: v_cmp_eq_i32_e32 vcc, 1, [[MASKED]]
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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89 ; SI: v_cndmask_b32_e64 {{v[0-9]+}}, -12, 63, vcc
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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90 define void @v_trunc_i64_to_i1(i32 addrspace(1)* %out, i64 addrspace(1)* %in) {
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parents:
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91 %tid = call i32 @llvm.r600.read.tidig.x() nounwind readnone
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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92 %gep = getelementptr i64, i64 addrspace(1)* %in, i32 %tid
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parents:
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93 %out.gep = getelementptr i32, i32 addrspace(1)* %out, i32 %tid
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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94 %x = load i64, i64 addrspace(1)* %gep
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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95
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parents:
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96 %trunc = trunc i64 %x to i1
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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97 %sel = select i1 %trunc, i32 63, i32 -12
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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98 store i32 %sel, i32 addrspace(1)* %out.gep
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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99 ret void
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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100 }