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annotate test/CodeGen/X86/legalize-shl-vec.ll @ 100:7d135dc70f03 LLVM 3.9

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LLVM 3.9
author Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
date Tue, 26 Jan 2016 22:53:40 +0900
parents afa8332a0e37
children 1172e4bd9c6f
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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1 ; RUN: llc < %s -march=x86-64 | FileCheck %s
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2
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3 define <2 x i256> @test_shl(<2 x i256> %In) {
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4 %Amt = insertelement <2 x i256> undef, i256 -1, i32 0
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5 %Out = shl <2 x i256> %In, %Amt
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6 ret <2 x i256> %Out
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7
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8 ; CHECK-LABEL: test_shl
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9 ; CHECK: movq $0
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10 ; CHECK-NEXT: movq $0
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11 ; CHECK-NEXT: movq $0
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12 ; CHECK-NEXT: movq $0
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13 ; CHECK-NEXT: movq $0
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14 ; CHECK-NEXT: movq $0
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15 ; CHECK-NEXT: movq $0
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16 ; CHECK-NEXT: movq $0
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17 ; CHECK: retq
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18 }
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19
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20 define <2 x i256> @test_srl(<2 x i256> %In) {
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21 %Amt = insertelement <2 x i256> undef, i256 -1, i32 0
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22 %Out = lshr <2 x i256> %In, %Amt
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23 ret <2 x i256> %Out
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24
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25 ; CHECK-LABEL: test_srl
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26 ; CHECK: movq $0
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27 ; CHECK-NEXT: movq $0
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28 ; CHECK-NEXT: movq $0
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29 ; CHECK-NEXT: movq $0
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30 ; CHECK-NEXT: movq $0
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31 ; CHECK-NEXT: movq $0
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32 ; CHECK-NEXT: movq $0
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33 ; CHECK-NEXT: movq $0
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34 ; CHECK: retq
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35 }
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36
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37 define <2 x i256> @test_sra(<2 x i256> %In) {
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38 %Amt = insertelement <2 x i256> undef, i256 -1, i32 0
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39 %Out = ashr <2 x i256> %In, %Amt
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40 ret <2 x i256> %Out
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41
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42 ; CHECK-LABEL: test_sra
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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43 ; CHECK: sarq $63
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44 }