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annotate test/CodeGen/X86/vselect-2.ll @ 100:7d135dc70f03 LLVM 3.9

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LLVM 3.9
author Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
date Tue, 26 Jan 2016 22:53:40 +0900
parents 60c9769439b8
children 1172e4bd9c6f
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100
7d135dc70f03 LLVM 3.9
Miyagi Mitsuki <e135756@ie.u-ryukyu.ac.jp>
parents: 83
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1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE2
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3 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE41
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4
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5 define <4 x i32> @test1(<4 x i32> %A, <4 x i32> %B) {
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6 ; SSE2-LABEL: test1:
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7 ; SSE2: # BB#0:
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8 ; SSE2-NEXT: movsd {{.*#+}} xmm1 = xmm0[0],xmm1[1]
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9 ; SSE2-NEXT: movapd %xmm1, %xmm0
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10 ; SSE2-NEXT: retq
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11 ;
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12 ; SSE41-LABEL: test1:
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13 ; SSE41: # BB#0:
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parents: 77
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14 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4,5,6,7]
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parents: 77
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15 ; SSE41-NEXT: retq
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16 %select = select <4 x i1><i1 true, i1 true, i1 false, i1 false>, <4 x i32> %A, <4 x i32> %B
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17 ret <4 x i32> %select
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18 }
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19
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20 define <4 x i32> @test2(<4 x i32> %A, <4 x i32> %B) {
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parents: 77
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21 ; SSE2-LABEL: test2:
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22 ; SSE2: # BB#0:
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parents: 77
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23 ; SSE2-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
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24 ; SSE2-NEXT: retq
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25 ;
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26 ; SSE41-LABEL: test2:
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27 ; SSE41: # BB#0:
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parents: 77
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28 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4,5,6,7]
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parents: 77
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29 ; SSE41-NEXT: retq
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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30 %select = select <4 x i1><i1 false, i1 false, i1 true, i1 true>, <4 x i32> %A, <4 x i32> %B
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31 ret <4 x i32> %select
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32 }
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33
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34 define <4 x float> @test3(<4 x float> %A, <4 x float> %B) {
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35 ; SSE2-LABEL: test3:
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36 ; SSE2: # BB#0:
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37 ; SSE2-NEXT: movsd {{.*#+}} xmm1 = xmm0[0],xmm1[1]
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parents: 77
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38 ; SSE2-NEXT: movapd %xmm1, %xmm0
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parents: 77
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39 ; SSE2-NEXT: retq
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40 ;
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41 ; SSE41-LABEL: test3:
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Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
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42 ; SSE41: # BB#0:
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Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
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43 ; SSE41-NEXT: blendpd {{.*#+}} xmm0 = xmm0[0],xmm1[1]
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parents: 77
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44 ; SSE41-NEXT: retq
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parents:
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45 %select = select <4 x i1><i1 true, i1 true, i1 false, i1 false>, <4 x float> %A, <4 x float> %B
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46 ret <4 x float> %select
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47 }
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48
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49 define <4 x float> @test4(<4 x float> %A, <4 x float> %B) {
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Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
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50 ; SSE2-LABEL: test4:
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Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
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51 ; SSE2: # BB#0:
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parents: 77
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52 ; SSE2-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
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parents: 77
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53 ; SSE2-NEXT: retq
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parents: 77
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54 ;
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55 ; SSE41-LABEL: test4:
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Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
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56 ; SSE41: # BB#0:
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parents: 77
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57 ; SSE41-NEXT: blendpd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
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Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
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58 ; SSE41-NEXT: retq
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59 %select = select <4 x i1><i1 false, i1 false, i1 true, i1 true>, <4 x float> %A, <4 x float> %B
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60 ret <4 x float> %select
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61 }