annotate lib/Target/Hexagon/HexagonBitTracker.h @ 121:803732b1fca8

LLVM 5.0
author kono
date Fri, 27 Oct 2017 17:07:41 +0900
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1 //===- HexagonBitTracker.h --------------------------------------*- C++ -*-===//
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2 //
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3 // The LLVM Compiler Infrastructure
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4 //
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5 // This file is distributed under the University of Illinois Open Source
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6 // License. See LICENSE.TXT for details.
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7 //
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8 //===----------------------------------------------------------------------===//
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9
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10 #ifndef LLVM_LIB_TARGET_HEXAGON_HEXAGONBITTRACKER_H
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11 #define LLVM_LIB_TARGET_HEXAGON_HEXAGONBITTRACKER_H
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13 #include "BitTracker.h"
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14 #include "llvm/ADT/DenseMap.h"
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15 #include <cstdint>
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17 namespace llvm {
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18
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19 class HexagonInstrInfo;
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20 class HexagonRegisterInfo;
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21 class MachineFrameInfo;
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22 class MachineFunction;
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23 class MachineInstr;
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24 class MachineRegisterInfo;
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25
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26 struct HexagonEvaluator : public BitTracker::MachineEvaluator {
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27 using CellMapType = BitTracker::CellMapType;
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28 using RegisterRef = BitTracker::RegisterRef;
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29 using RegisterCell = BitTracker::RegisterCell;
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30 using BranchTargetList = BitTracker::BranchTargetList;
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32 HexagonEvaluator(const HexagonRegisterInfo &tri, MachineRegisterInfo &mri,
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33 const HexagonInstrInfo &tii, MachineFunction &mf);
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35 bool evaluate(const MachineInstr &MI, const CellMapType &Inputs,
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36 CellMapType &Outputs) const override;
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37 bool evaluate(const MachineInstr &BI, const CellMapType &Inputs,
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38 BranchTargetList &Targets, bool &FallsThru) const override;
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40 BitTracker::BitMask mask(unsigned Reg, unsigned Sub) const override;
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41
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42 uint16_t getPhysRegBitWidth(unsigned Reg) const override;
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43
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44 const TargetRegisterClass &composeWithSubRegIndex(
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45 const TargetRegisterClass &RC, unsigned Idx) const override;
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46
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47 MachineFunction &MF;
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48 MachineFrameInfo &MFI;
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49 const HexagonInstrInfo &TII;
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51 private:
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52 bool evaluateLoad(const MachineInstr &MI, const CellMapType &Inputs,
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53 CellMapType &Outputs) const;
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54 bool evaluateFormalCopy(const MachineInstr &MI, const CellMapType &Inputs,
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55 CellMapType &Outputs) const;
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57 unsigned getNextPhysReg(unsigned PReg, unsigned Width) const;
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58 unsigned getVirtRegFor(unsigned PReg) const;
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60 // Type of formal parameter extension.
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61 struct ExtType {
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62 enum { SExt, ZExt };
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64 ExtType() = default;
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65 ExtType(char t, uint16_t w) : Type(t), Width(w) {}
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67 char Type = 0;
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68 uint16_t Width = 0;
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69 };
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70 // Map VR -> extension type.
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71 using RegExtMap = DenseMap<unsigned, ExtType>;
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72 RegExtMap VRX;
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73 };
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75 } // end namespace llvm
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77 #endif // LLVM_LIB_TARGET_HEXAGON_HEXAGONBITTRACKER_H