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annotate test/CodeGen/Hexagon/inline-asm-vecpred128.ll @ 121:803732b1fca8

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LLVM 5.0
author kono
date Fri, 27 Oct 2017 17:07:41 +0900
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121
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1 ; RUN: llc -march=hexagon < %s | FileCheck %s
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2 ; REQUIRES: asserts
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3
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4 ; Make sure we can handle the 'q' constraint in the 128-byte mode.
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5
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6 target triple = "hexagon"
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7
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8 ; CHECK-LABEL: fred
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9 ; CHECK: if (q{{[0-3]}}) vmem
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10 define void @fred() #0 {
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11 tail call void asm sideeffect "if ($0) vmem($1) = $2;", "q,r,v,~{memory}"(<32 x i32> undef, <32 x i32>* undef, <32 x i32> undef) #0
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12 ret void
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13 }
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14
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15 attributes #0 = { nounwind "target-cpu"="hexagonv60" "target-features"="+hvx,+hvx-length128b" }