Mercurial > hg > CbC > CbC_llvm

annotate test/CodeGen/Hexagon/store-shift.ll @ 121:803732b1fca8

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LLVM 5.0
author kono
date Fri, 27 Oct 2017 17:07:41 +0900
parents 1172e4bd9c6f
children
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1 ; RUN: llc -march=hexagon < %s | FileCheck %s
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2
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3 ; CHECK-DAG: r[[BASE:[0-9]+]] = add(r1,#1000)
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4 ; CHECK-DAG: r[[IDX0:[0-9]+]] = add(r2,#5)
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5 ; CHECK-DAG: r[[IDX1:[0-9]+]] = add(r2,#6)
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6 ; CHECK-DAG: memw(r0+r[[IDX0]]<<#2) = r3
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7 ; CHECK-DAG: memw(r0+r[[IDX1]]<<#2) = r3
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8 ; CHECK-DAG: memw(r[[BASE]]+r[[IDX0]]<<#2) = r[[IDX0]]
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9 ; CHECK-DAG: memw(r[[BASE]]+r[[IDX1]]<<#2) = r[[IDX0]]
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11 target triple = "hexagon"
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12
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13 @G = external global i32, align 4
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14
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15 ; Function Attrs: norecurse nounwind
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16 define void @fred(i32* nocapture %A, [50 x i32]* nocapture %B, i32 %N, i32 %M) #0 {
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17 entry:
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18 %add = add nsw i32 %N, 5
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19 %arrayidx = getelementptr inbounds i32, i32* %A, i32 %add
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20 store i32 %M, i32* %arrayidx, align 4, !tbaa !1
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21 %add2 = add nsw i32 %N, 6
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22 %arrayidx3 = getelementptr inbounds i32, i32* %A, i32 %add2
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23 store i32 %M, i32* %arrayidx3, align 4, !tbaa !1
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24 %add4 = add nsw i32 %N, 35
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25 %arrayidx5 = getelementptr inbounds i32, i32* %A, i32 %add4
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26 store i32 %add, i32* %arrayidx5, align 4, !tbaa !1
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27 %arrayidx8 = getelementptr inbounds [50 x i32], [50 x i32]* %B, i32 %add, i32 %add
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28 store i32 %add, i32* %arrayidx8, align 4, !tbaa !1
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29 %inc = add nsw i32 %N, 6
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30 %arrayidx8.1 = getelementptr inbounds [50 x i32], [50 x i32]* %B, i32 %add, i32 %inc
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31 store i32 %add, i32* %arrayidx8.1, align 4, !tbaa !1
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32 %sub = add nsw i32 %N, 4
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33 %arrayidx10 = getelementptr inbounds [50 x i32], [50 x i32]* %B, i32 %add, i32 %sub
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34 %0 = load i32, i32* %arrayidx10, align 4, !tbaa !1
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35 %add11 = add nsw i32 %0, 1
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36 store i32 %add11, i32* %arrayidx10, align 4, !tbaa !1
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37 %1 = load i32, i32* %arrayidx, align 4, !tbaa !1
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38 %add13 = add nsw i32 %N, 25
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39 %arrayidx15 = getelementptr inbounds [50 x i32], [50 x i32]* %B, i32 %add13, i32 %add
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40 store i32 %1, i32* %arrayidx15, align 4, !tbaa !1
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41 store i32 5, i32* @G, align 4, !tbaa !1
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42 ret void
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43 }
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44
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45 attributes #0 = { norecurse nounwind "target-cpu"="hexagonv60" "target-features"="+hvx,+hvx-length64b" }
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46
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47 !1 = !{!2, !2, i64 0}
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48 !2 = !{!"int", !3, i64 0}
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49 !3 = !{!"omnipotent char", !4, i64 0}
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50 !4 = !{!"Simple C/C++ TBAA"}