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annotate test/CodeGen/Mips/cconv/arguments-hard-float.ll @ 121:803732b1fca8

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LLVM 5.0
author kono
date Fri, 27 Oct 2017 17:07:41 +0900
parents 1172e4bd9c6f
children c2174574ed3a
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
120
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1 ; RUN: llc -march=mips -relocation-model=static < %s | FileCheck --check-prefixes=ALL,SYM32,O32,O32BE %s
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2 ; RUN: llc -march=mipsel -relocation-model=static < %s | FileCheck --check-prefixes=ALL,SYM32,O32,O32LE %s
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3
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4 ; RUN-TODO: llc -march=mips64 -relocation-model=static -target-abi o32 < %s | FileCheck --check-prefixes=ALL,SYM32,O32 %s
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5 ; RUN-TODO: llc -march=mips64el -relocation-model=static -target-abi o32 < %s | FileCheck --check-prefixes=ALL,SYM32,O32 %s
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6
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7 ; RUN: llc -march=mips64 -relocation-model=static -target-abi n32 < %s | FileCheck --check-prefixes=ALL,SYM32,NEW %s
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8 ; RUN: llc -march=mips64el -relocation-model=static -target-abi n32 < %s | FileCheck --check-prefixes=ALL,SYM32,NEW %s
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9
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10 ; RUN: llc -march=mips64 -relocation-model=static -target-abi n64 < %s | FileCheck --check-prefixes=ALL,SYM64,NEW %s
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11 ; RUN: llc -march=mips64el -relocation-model=static -target-abi n64 < %s | FileCheck --check-prefixes=ALL,SYM64,NEW %s
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12
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13 ; Test the floating point arguments for all ABI's and byte orders as specified
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14 ; by section 5 of MD00305 (MIPS ABIs Described).
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15 ;
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16 ; N32/N64 are identical in this area so their checks have been combined into
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17 ; the 'NEW' prefix (the N stands for New).
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18
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19 @bytes = global [11 x i8] zeroinitializer
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20 @dwords = global [11 x i64] zeroinitializer
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21 @floats = global [11 x float] zeroinitializer
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22 @doubles = global [11 x double] zeroinitializer
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23
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24 define void @double_args(double %a, double %b, double %c, double %d, double %e,
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25 double %f, double %g, double %h, double %i) nounwind {
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26 entry:
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27 %0 = getelementptr [11 x double], [11 x double]* @doubles, i32 0, i32 1
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28 store volatile double %a, double* %0
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29 %1 = getelementptr [11 x double], [11 x double]* @doubles, i32 0, i32 2
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30 store volatile double %b, double* %1
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31 %2 = getelementptr [11 x double], [11 x double]* @doubles, i32 0, i32 3
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32 store volatile double %c, double* %2
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33 %3 = getelementptr [11 x double], [11 x double]* @doubles, i32 0, i32 4
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34 store volatile double %d, double* %3
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35 %4 = getelementptr [11 x double], [11 x double]* @doubles, i32 0, i32 5
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36 store volatile double %e, double* %4
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37 %5 = getelementptr [11 x double], [11 x double]* @doubles, i32 0, i32 6
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38 store volatile double %f, double* %5
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39 %6 = getelementptr [11 x double], [11 x double]* @doubles, i32 0, i32 7
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40 store volatile double %g, double* %6
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41 %7 = getelementptr [11 x double], [11 x double]* @doubles, i32 0, i32 8
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42 store volatile double %h, double* %7
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43 %8 = getelementptr [11 x double], [11 x double]* @doubles, i32 0, i32 9
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44 store volatile double %i, double* %8
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45 ret void
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46 }
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47
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48 ; ALL-LABEL: double_args:
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49 ; We won't test the way the global address is calculated in this test. This is
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50 ; just to get the register number for the other checks.
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51 ; SYM32-DAG: addiu [[R2:\$[0-9]+]], ${{[0-9]+}}, %lo(doubles)
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52 ; SYM64-DAG: daddiu [[R2:\$[0-9]]], ${{[0-9]+}}, %lo(doubles)
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53
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54 ; The first argument is floating point so floating point registers are used.
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55 ; The first argument is the same for O32/N32/N64 but the second argument differs
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56 ; by register
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57 ; ALL-DAG: sdc1 $f12, 8([[R2]])
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58 ; O32-DAG: sdc1 $f14, 16([[R2]])
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59 ; NEW-DAG: sdc1 $f13, 16([[R2]])
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60
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61 ; O32 has run out of argument registers and starts using the stack
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62 ; O32-DAG: ldc1 [[F1:\$f[0-9]+]], 16($sp)
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63 ; O32-DAG: sdc1 [[F1]], 24([[R2]])
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64 ; NEW-DAG: sdc1 $f14, 24([[R2]])
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65 ; O32-DAG: ldc1 [[F1:\$f[0-9]+]], 24($sp)
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66 ; O32-DAG: sdc1 [[F1]], 32([[R2]])
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67 ; NEW-DAG: sdc1 $f15, 32([[R2]])
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68 ; O32-DAG: ldc1 [[F1:\$f[0-9]+]], 32($sp)
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69 ; O32-DAG: sdc1 [[F1]], 40([[R2]])
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70 ; NEW-DAG: sdc1 $f16, 40([[R2]])
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71 ; O32-DAG: ldc1 [[F1:\$f[0-9]+]], 40($sp)
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72 ; O32-DAG: sdc1 [[F1]], 48([[R2]])
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73 ; NEW-DAG: sdc1 $f17, 48([[R2]])
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74 ; O32-DAG: ldc1 [[F1:\$f[0-9]+]], 48($sp)
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75 ; O32-DAG: sdc1 [[F1]], 56([[R2]])
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76 ; NEW-DAG: sdc1 $f18, 56([[R2]])
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77 ; O32-DAG: ldc1 [[F1:\$f[0-9]+]], 56($sp)
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78 ; O32-DAG: sdc1 [[F1]], 64([[R2]])
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79 ; NEW-DAG: sdc1 $f19, 64([[R2]])
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80
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81 ; N32/N64 have run out of registers and start using the stack too
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82 ; O32-DAG: ldc1 [[F1:\$f[0-9]+]], 64($sp)
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83 ; O32-DAG: sdc1 [[F1]], 72([[R2]])
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84 ; NEW-DAG: ldc1 [[F1:\$f[0-9]+]], 0($sp)
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85 ; NEW-DAG: sdc1 [[F1]], 72([[R2]])
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86
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87 define void @float_args(float %a, float %b, float %c, float %d, float %e,
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88 float %f, float %g, float %h, float %i) nounwind {
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89 entry:
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90 %0 = getelementptr [11 x float], [11 x float]* @floats, i32 0, i32 1
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91 store volatile float %a, float* %0
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92 %1 = getelementptr [11 x float], [11 x float]* @floats, i32 0, i32 2
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93 store volatile float %b, float* %1
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94 %2 = getelementptr [11 x float], [11 x float]* @floats, i32 0, i32 3
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95 store volatile float %c, float* %2
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96 %3 = getelementptr [11 x float], [11 x float]* @floats, i32 0, i32 4
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97 store volatile float %d, float* %3
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98 %4 = getelementptr [11 x float], [11 x float]* @floats, i32 0, i32 5
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99 store volatile float %e, float* %4
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100 %5 = getelementptr [11 x float], [11 x float]* @floats, i32 0, i32 6
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101 store volatile float %f, float* %5
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102 %6 = getelementptr [11 x float], [11 x float]* @floats, i32 0, i32 7
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103 store volatile float %g, float* %6
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104 %7 = getelementptr [11 x float], [11 x float]* @floats, i32 0, i32 8
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105 store volatile float %h, float* %7
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106 %8 = getelementptr [11 x float], [11 x float]* @floats, i32 0, i32 9
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107 store volatile float %i, float* %8
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108 ret void
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109 }
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110
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111 ; ALL-LABEL: float_args:
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112 ; We won't test the way the global address is calculated in this test. This is
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113 ; just to get the register number for the other checks.
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114 ; SYM32-DAG: addiu [[R1:\$[0-9]+]], ${{[0-9]+}}, %lo(floats)
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115 ; SYM64-DAG: daddiu [[R1:\$[0-9]]], ${{[0-9]+}}, %lo(floats)
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116
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117 ; The first argument is floating point so floating point registers are used.
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
118 ; The first argument is the same for O32/N32/N64 but the second argument differs
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
119 ; by register
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
120 ; ALL-DAG: swc1 $f12, 4([[R1]])
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
121 ; O32-DAG: swc1 $f14, 8([[R1]])
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
122 ; NEW-DAG: swc1 $f13, 8([[R1]])
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
123
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
124 ; O32 has run out of argument registers and (in theory) starts using the stack
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
125 ; I've yet to find a reference in the documentation about this but GCC uses up
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
126 ; the remaining two argument slots in the GPR's first. We'll do the same for
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
127 ; compatibility.
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
128 ; O32-DAG: sw $6, 12([[R1]])
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
129 ; NEW-DAG: swc1 $f14, 12([[R1]])
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
130 ; O32-DAG: sw $7, 16([[R1]])
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
131 ; NEW-DAG: swc1 $f15, 16([[R1]])
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
132
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
133 ; O32 is definitely out of registers now and switches to the stack.
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
134 ; O32-DAG: lwc1 [[F1:\$f[0-9]+]], 16($sp)
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
135 ; O32-DAG: swc1 [[F1]], 20([[R1]])
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
136 ; NEW-DAG: swc1 $f16, 20([[R1]])
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
137 ; O32-DAG: lwc1 [[F1:\$f[0-9]+]], 20($sp)
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
138 ; O32-DAG: swc1 [[F1]], 24([[R1]])
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
139 ; NEW-DAG: swc1 $f17, 24([[R1]])
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
140 ; O32-DAG: lwc1 [[F1:\$f[0-9]+]], 24($sp)
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
141 ; O32-DAG: swc1 [[F1]], 28([[R1]])
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
142 ; NEW-DAG: swc1 $f18, 28([[R1]])
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
143 ; O32-DAG: lwc1 [[F1:\$f[0-9]+]], 28($sp)
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
144 ; O32-DAG: swc1 [[F1]], 32([[R1]])
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
145 ; NEW-DAG: swc1 $f19, 32([[R1]])
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
146
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
147 ; N32/N64 have run out of registers and start using the stack too
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
148 ; O32-DAG: lwc1 [[F1:\$f[0-9]+]], 32($sp)
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
149 ; O32-DAG: swc1 [[F1]], 36([[R1]])
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
150 ; NEW-DAG: lwc1 [[F1:\$f[0-9]+]], 0($sp)
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
151 ; NEW-DAG: swc1 [[F1]], 36([[R1]])
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
152
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
153
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
154 define void @double_arg2(i8 %a, double %b) nounwind {
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
155 entry:
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
156 %0 = getelementptr [11 x i8], [11 x i8]* @bytes, i32 0, i32 1
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
157 store volatile i8 %a, i8* %0
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
158 %1 = getelementptr [11 x double], [11 x double]* @doubles, i32 0, i32 1
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
159 store volatile double %b, double* %1
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
160 ret void
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
161 }
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
162
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
163 ; ALL-LABEL: double_arg2:
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
164 ; We won't test the way the global address is calculated in this test. This is
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
165 ; just to get the register number for the other checks.
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
166 ; SYM32-DAG: addiu [[R1:\$[0-9]+]], ${{[0-9]+}}, %lo(bytes)
121
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
167 ; SYM64-DAG: daddiu [[R1:\$[0-9]]], ${{[0-9]+}}, %lo(bytes)
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
168 ; SYM32-DAG: addiu [[R2:\$[0-9]+]], ${{[0-9]+}}, %lo(doubles)
121
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
169 ; SYM64-DAG: daddiu [[R2:\$[0-9]]], ${{[0-9]+}}, %lo(doubles)
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
170
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
171 ; The first argument is the same in O32/N32/N64.
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
172 ; ALL-DAG: sb $4, 1([[R1]])
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
173
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
174 ; The first argument isn't floating point so floating point registers are not
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
175 ; used in O32, but N32/N64 will still use them.
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
176 ; The second slot is insufficiently aligned for double on O32 so it is skipped.
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
177 ; Also, double occupies two slots on O32 and only one for N32/N64.
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
178 ; O32LE-DAG: mtc1 $6, [[F1:\$f[0-9]*[02468]+]]
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
179 ; O32LE-DAG: mtc1 $7, [[F2:\$f[0-9]*[13579]+]]
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
180 ; O32BE-DAG: mtc1 $6, [[F2:\$f[0-9]*[13579]+]]
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
181 ; O32BE-DAG: mtc1 $7, [[F1:\$f[0-9]*[02468]+]]
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
182 ; O32-DAG: sdc1 [[F1]], 8([[R2]])
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
183 ; NEW-DAG: sdc1 $f13, 8([[R2]])
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
184
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
185 define void @float_arg2(i8 %a, float %b) nounwind {
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
186 entry:
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
187 %0 = getelementptr [11 x i8], [11 x i8]* @bytes, i32 0, i32 1
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
188 store volatile i8 %a, i8* %0
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
189 %1 = getelementptr [11 x float], [11 x float]* @floats, i32 0, i32 1
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
190 store volatile float %b, float* %1
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
191 ret void
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
192 }
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
193
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
194 ; ALL-LABEL: float_arg2:
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
195 ; We won't test the way the global address is calculated in this test. This is
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
196 ; just to get the register number for the other checks.
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
197 ; SYM32-DAG: addiu [[R1:\$[0-9]+]], ${{[0-9]+}}, %lo(bytes)
121
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
198 ; SYM64-DAG: daddiu [[R1:\$[0-9]]], ${{[0-9]+}}, %lo(bytes)
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
199 ; SYM32-DAG: addiu [[R2:\$[0-9]+]], ${{[0-9]+}}, %lo(floats)
121
803732b1fca8 LLVM 5.0
kono
parents: 120
diff changeset
200 ; SYM64-DAG: daddiu [[R2:\$[0-9]]], ${{[0-9]+}}, %lo(floats)
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
201
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
202 ; The first argument is the same in O32/N32/N64.
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
203 ; ALL-DAG: sb $4, 1([[R1]])
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
204
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
205 ; The first argument isn't floating point so floating point registers are not
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
206 ; used in O32, but N32/N64 will still use them.
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
207 ; MD00305 and GCC disagree on this one. MD00305 says that floats are treated
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
208 ; as 8-byte aligned and occupy two slots on O32. GCC is treating them as 4-byte
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
209 ; aligned and occupying one slot. We'll use GCC's definition.
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
210 ; O32-DAG: sw $5, 4([[R2]])
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
211 ; NEW-DAG: swc1 $f13, 4([[R2]])