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121
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1 ; RUN: llc < %s -mtriple=i686-- -mattr=+mmx,+sse2 | FileCheck -check-prefix=X32 %s
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2 ; RUN: llc < %s -mtriple=x86_64-- -mattr=+mmx,+sse2 | FileCheck -check-prefix=X64 %s
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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3
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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4 ;; A basic sanity check to make sure that MMX arithmetic actually compiles.
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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5 ;; First is a straight translation of the original with bitcasts as needed.
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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6
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83
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7 ; X32-LABEL: test0
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8 ; X64-LABEL: test0
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9 define void @test0(x86_mmx* %A, x86_mmx* %B) {
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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10 entry:
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95
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11 %tmp1 = load x86_mmx, x86_mmx* %A
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12 %tmp3 = load x86_mmx, x86_mmx* %B
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83
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13 %tmp1a = bitcast x86_mmx %tmp1 to <8 x i8>
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14 %tmp3a = bitcast x86_mmx %tmp3 to <8 x i8>
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15 %tmp4 = add <8 x i8> %tmp1a, %tmp3a
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16 %tmp4a = bitcast <8 x i8> %tmp4 to x86_mmx
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17 store x86_mmx %tmp4a, x86_mmx* %A
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95
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18 %tmp7 = load x86_mmx, x86_mmx* %B
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83
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19 %tmp12 = tail call x86_mmx @llvm.x86.mmx.padds.b(x86_mmx %tmp4a, x86_mmx %tmp7)
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20 store x86_mmx %tmp12, x86_mmx* %A
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95
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21 %tmp16 = load x86_mmx, x86_mmx* %B
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83
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22 %tmp21 = tail call x86_mmx @llvm.x86.mmx.paddus.b(x86_mmx %tmp12, x86_mmx %tmp16)
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23 store x86_mmx %tmp21, x86_mmx* %A
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95
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24 %tmp27 = load x86_mmx, x86_mmx* %B
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83
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25 %tmp21a = bitcast x86_mmx %tmp21 to <8 x i8>
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26 %tmp27a = bitcast x86_mmx %tmp27 to <8 x i8>
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27 %tmp28 = sub <8 x i8> %tmp21a, %tmp27a
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28 %tmp28a = bitcast <8 x i8> %tmp28 to x86_mmx
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29 store x86_mmx %tmp28a, x86_mmx* %A
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95
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30 %tmp31 = load x86_mmx, x86_mmx* %B
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83
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31 %tmp36 = tail call x86_mmx @llvm.x86.mmx.psubs.b(x86_mmx %tmp28a, x86_mmx %tmp31)
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32 store x86_mmx %tmp36, x86_mmx* %A
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95
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33 %tmp40 = load x86_mmx, x86_mmx* %B
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83
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34 %tmp45 = tail call x86_mmx @llvm.x86.mmx.psubus.b(x86_mmx %tmp36, x86_mmx %tmp40)
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35 store x86_mmx %tmp45, x86_mmx* %A
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95
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36 %tmp51 = load x86_mmx, x86_mmx* %B
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83
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37 %tmp45a = bitcast x86_mmx %tmp45 to <8 x i8>
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38 %tmp51a = bitcast x86_mmx %tmp51 to <8 x i8>
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39 %tmp52 = mul <8 x i8> %tmp45a, %tmp51a
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40 %tmp52a = bitcast <8 x i8> %tmp52 to x86_mmx
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41 store x86_mmx %tmp52a, x86_mmx* %A
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95
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42 %tmp57 = load x86_mmx, x86_mmx* %B
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83
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43 %tmp57a = bitcast x86_mmx %tmp57 to <8 x i8>
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44 %tmp58 = and <8 x i8> %tmp52, %tmp57a
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45 %tmp58a = bitcast <8 x i8> %tmp58 to x86_mmx
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46 store x86_mmx %tmp58a, x86_mmx* %A
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95
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47 %tmp63 = load x86_mmx, x86_mmx* %B
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83
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48 %tmp63a = bitcast x86_mmx %tmp63 to <8 x i8>
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49 %tmp64 = or <8 x i8> %tmp58, %tmp63a
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50 %tmp64a = bitcast <8 x i8> %tmp64 to x86_mmx
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51 store x86_mmx %tmp64a, x86_mmx* %A
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95
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52 %tmp69 = load x86_mmx, x86_mmx* %B
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83
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53 %tmp69a = bitcast x86_mmx %tmp69 to <8 x i8>
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54 %tmp64b = bitcast x86_mmx %tmp64a to <8 x i8>
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55 %tmp70 = xor <8 x i8> %tmp64b, %tmp69a
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56 %tmp70a = bitcast <8 x i8> %tmp70 to x86_mmx
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57 store x86_mmx %tmp70a, x86_mmx* %A
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58 tail call void @llvm.x86.mmx.emms()
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59 ret void
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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60 }
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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61
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83
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62 ; X32-LABEL: test1
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63 ; X64-LABEL: test1
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64 define void @test1(x86_mmx* %A, x86_mmx* %B) {
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65 entry:
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95
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66 %tmp1 = load x86_mmx, x86_mmx* %A
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67 %tmp3 = load x86_mmx, x86_mmx* %B
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83
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68 %tmp1a = bitcast x86_mmx %tmp1 to <2 x i32>
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69 %tmp3a = bitcast x86_mmx %tmp3 to <2 x i32>
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70 %tmp4 = add <2 x i32> %tmp1a, %tmp3a
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71 %tmp4a = bitcast <2 x i32> %tmp4 to x86_mmx
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72 store x86_mmx %tmp4a, x86_mmx* %A
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95
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73 %tmp9 = load x86_mmx, x86_mmx* %B
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83
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74 %tmp9a = bitcast x86_mmx %tmp9 to <2 x i32>
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75 %tmp10 = sub <2 x i32> %tmp4, %tmp9a
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76 %tmp10a = bitcast <2 x i32> %tmp4 to x86_mmx
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77 store x86_mmx %tmp10a, x86_mmx* %A
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95
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78 %tmp15 = load x86_mmx, x86_mmx* %B
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83
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79 %tmp10b = bitcast x86_mmx %tmp10a to <2 x i32>
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80 %tmp15a = bitcast x86_mmx %tmp15 to <2 x i32>
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81 %tmp16 = mul <2 x i32> %tmp10b, %tmp15a
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82 %tmp16a = bitcast <2 x i32> %tmp16 to x86_mmx
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83 store x86_mmx %tmp16a, x86_mmx* %A
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95
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84 %tmp21 = load x86_mmx, x86_mmx* %B
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83
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85 %tmp16b = bitcast x86_mmx %tmp16a to <2 x i32>
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86 %tmp21a = bitcast x86_mmx %tmp21 to <2 x i32>
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87 %tmp22 = and <2 x i32> %tmp16b, %tmp21a
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88 %tmp22a = bitcast <2 x i32> %tmp22 to x86_mmx
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89 store x86_mmx %tmp22a, x86_mmx* %A
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95
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90 %tmp27 = load x86_mmx, x86_mmx* %B
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83
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91 %tmp22b = bitcast x86_mmx %tmp22a to <2 x i32>
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92 %tmp27a = bitcast x86_mmx %tmp27 to <2 x i32>
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93 %tmp28 = or <2 x i32> %tmp22b, %tmp27a
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94 %tmp28a = bitcast <2 x i32> %tmp28 to x86_mmx
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95 store x86_mmx %tmp28a, x86_mmx* %A
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95
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96 %tmp33 = load x86_mmx, x86_mmx* %B
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83
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97 %tmp28b = bitcast x86_mmx %tmp28a to <2 x i32>
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98 %tmp33a = bitcast x86_mmx %tmp33 to <2 x i32>
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99 %tmp34 = xor <2 x i32> %tmp28b, %tmp33a
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100 %tmp34a = bitcast <2 x i32> %tmp34 to x86_mmx
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101 store x86_mmx %tmp34a, x86_mmx* %A
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102 tail call void @llvm.x86.mmx.emms( )
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103 ret void
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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104 }
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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105
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83
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106 ; X32-LABEL: test2
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107 ; X64-LABEL: test2
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108 define void @test2(x86_mmx* %A, x86_mmx* %B) {
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parents:
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109 entry:
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95
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110 %tmp1 = load x86_mmx, x86_mmx* %A
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111 %tmp3 = load x86_mmx, x86_mmx* %B
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83
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112 %tmp1a = bitcast x86_mmx %tmp1 to <4 x i16>
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113 %tmp3a = bitcast x86_mmx %tmp3 to <4 x i16>
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114 %tmp4 = add <4 x i16> %tmp1a, %tmp3a
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115 %tmp4a = bitcast <4 x i16> %tmp4 to x86_mmx
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116 store x86_mmx %tmp4a, x86_mmx* %A
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95
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117 %tmp7 = load x86_mmx, x86_mmx* %B
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83
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118 %tmp12 = tail call x86_mmx @llvm.x86.mmx.padds.w(x86_mmx %tmp4a, x86_mmx %tmp7)
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119 store x86_mmx %tmp12, x86_mmx* %A
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95
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120 %tmp16 = load x86_mmx, x86_mmx* %B
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83
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121 %tmp21 = tail call x86_mmx @llvm.x86.mmx.paddus.w(x86_mmx %tmp12, x86_mmx %tmp16)
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122 store x86_mmx %tmp21, x86_mmx* %A
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95
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123 %tmp27 = load x86_mmx, x86_mmx* %B
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83
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124 %tmp21a = bitcast x86_mmx %tmp21 to <4 x i16>
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125 %tmp27a = bitcast x86_mmx %tmp27 to <4 x i16>
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126 %tmp28 = sub <4 x i16> %tmp21a, %tmp27a
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127 %tmp28a = bitcast <4 x i16> %tmp28 to x86_mmx
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128 store x86_mmx %tmp28a, x86_mmx* %A
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95
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129 %tmp31 = load x86_mmx, x86_mmx* %B
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83
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130 %tmp36 = tail call x86_mmx @llvm.x86.mmx.psubs.w(x86_mmx %tmp28a, x86_mmx %tmp31)
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131 store x86_mmx %tmp36, x86_mmx* %A
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95
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132 %tmp40 = load x86_mmx, x86_mmx* %B
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83
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133 %tmp45 = tail call x86_mmx @llvm.x86.mmx.psubus.w(x86_mmx %tmp36, x86_mmx %tmp40)
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134 store x86_mmx %tmp45, x86_mmx* %A
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95
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135 %tmp51 = load x86_mmx, x86_mmx* %B
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83
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136 %tmp45a = bitcast x86_mmx %tmp45 to <4 x i16>
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137 %tmp51a = bitcast x86_mmx %tmp51 to <4 x i16>
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138 %tmp52 = mul <4 x i16> %tmp45a, %tmp51a
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139 %tmp52a = bitcast <4 x i16> %tmp52 to x86_mmx
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140 store x86_mmx %tmp52a, x86_mmx* %A
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95
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141 %tmp55 = load x86_mmx, x86_mmx* %B
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83
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142 %tmp60 = tail call x86_mmx @llvm.x86.mmx.pmulh.w(x86_mmx %tmp52a, x86_mmx %tmp55)
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143 store x86_mmx %tmp60, x86_mmx* %A
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95
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144 %tmp64 = load x86_mmx, x86_mmx* %B
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83
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145 %tmp69 = tail call x86_mmx @llvm.x86.mmx.pmadd.wd(x86_mmx %tmp60, x86_mmx %tmp64)
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146 %tmp70 = bitcast x86_mmx %tmp69 to x86_mmx
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147 store x86_mmx %tmp70, x86_mmx* %A
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95
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148 %tmp75 = load x86_mmx, x86_mmx* %B
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83
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149 %tmp70a = bitcast x86_mmx %tmp70 to <4 x i16>
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150 %tmp75a = bitcast x86_mmx %tmp75 to <4 x i16>
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151 %tmp76 = and <4 x i16> %tmp70a, %tmp75a
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152 %tmp76a = bitcast <4 x i16> %tmp76 to x86_mmx
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153 store x86_mmx %tmp76a, x86_mmx* %A
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95
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154 %tmp81 = load x86_mmx, x86_mmx* %B
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83
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155 %tmp76b = bitcast x86_mmx %tmp76a to <4 x i16>
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156 %tmp81a = bitcast x86_mmx %tmp81 to <4 x i16>
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157 %tmp82 = or <4 x i16> %tmp76b, %tmp81a
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158 %tmp82a = bitcast <4 x i16> %tmp82 to x86_mmx
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159 store x86_mmx %tmp82a, x86_mmx* %A
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95
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160 %tmp87 = load x86_mmx, x86_mmx* %B
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83
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161 %tmp82b = bitcast x86_mmx %tmp82a to <4 x i16>
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162 %tmp87a = bitcast x86_mmx %tmp87 to <4 x i16>
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163 %tmp88 = xor <4 x i16> %tmp82b, %tmp87a
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164 %tmp88a = bitcast <4 x i16> %tmp88 to x86_mmx
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165 store x86_mmx %tmp88a, x86_mmx* %A
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166 tail call void @llvm.x86.mmx.emms( )
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167 ret void
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168 }
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169
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170 ; X32-LABEL: test3
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171 define <1 x i64> @test3(<1 x i64>* %a, <1 x i64>* %b, i32 %count) nounwind {
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172 entry:
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173 %tmp2942 = icmp eq i32 %count, 0
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174 br i1 %tmp2942, label %bb31, label %bb26
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175
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176 bb26:
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177 ; X32: addl
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178 ; X32: adcl
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179 %i.037.0 = phi i32 [ 0, %entry ], [ %tmp25, %bb26 ]
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180 %sum.035.0 = phi <1 x i64> [ zeroinitializer, %entry ], [ %tmp22, %bb26 ]
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95
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181 %tmp13 = getelementptr <1 x i64>, <1 x i64>* %b, i32 %i.037.0
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182 %tmp14 = load <1 x i64>, <1 x i64>* %tmp13
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183 %tmp18 = getelementptr <1 x i64>, <1 x i64>* %a, i32 %i.037.0
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184 %tmp19 = load <1 x i64>, <1 x i64>* %tmp18
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83
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185 %tmp21 = add <1 x i64> %tmp19, %tmp14
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186 %tmp22 = add <1 x i64> %tmp21, %sum.035.0
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187 %tmp25 = add i32 %i.037.0, 1
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188 %tmp29 = icmp ult i32 %tmp25, %count
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189 br i1 %tmp29, label %bb26, label %bb31
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190
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191 bb31:
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192 %sum.035.1 = phi <1 x i64> [ zeroinitializer, %entry ], [ %tmp22, %bb26 ]
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193 ret <1 x i64> %sum.035.1
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
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194 }
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
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195
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83
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196 ; There are no MMX operations here, so we use XMM or i64.
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197 ; X64-LABEL: ti8
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198 define void @ti8(double %a, double %b) nounwind {
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199 entry:
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200 %tmp1 = bitcast double %a to <8 x i8>
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201 %tmp2 = bitcast double %b to <8 x i8>
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202 %tmp3 = add <8 x i8> %tmp1, %tmp2
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203 ; X64: paddb
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204 store <8 x i8> %tmp3, <8 x i8>* null
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205 ret void
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206 }
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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changeset
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207
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83
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208 ; X64-LABEL: ti16
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209 define void @ti16(double %a, double %b) nounwind {
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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210 entry:
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83
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211 %tmp1 = bitcast double %a to <4 x i16>
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212 %tmp2 = bitcast double %b to <4 x i16>
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213 %tmp3 = add <4 x i16> %tmp1, %tmp2
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214 ; X64: paddw
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215 store <4 x i16> %tmp3, <4 x i16>* null
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216 ret void
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217 }
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218
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219 ; X64-LABEL: ti32
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220 define void @ti32(double %a, double %b) nounwind {
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221 entry:
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222 %tmp1 = bitcast double %a to <2 x i32>
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223 %tmp2 = bitcast double %b to <2 x i32>
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224 %tmp3 = add <2 x i32> %tmp1, %tmp2
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225 ; X64: paddd
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226 store <2 x i32> %tmp3, <2 x i32>* null
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227 ret void
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228 }
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229
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230 ; X64-LABEL: ti64
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231 define void @ti64(double %a, double %b) nounwind {
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232 entry:
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233 %tmp1 = bitcast double %a to <1 x i64>
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234 %tmp2 = bitcast double %b to <1 x i64>
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235 %tmp3 = add <1 x i64> %tmp1, %tmp2
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236 ; X64: addq
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237 store <1 x i64> %tmp3, <1 x i64>* null
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238 ret void
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0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
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239 }
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
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240
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83
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241 ; MMX intrinsics calls get us MMX instructions.
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242 ; X64-LABEL: ti8a
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243 define void @ti8a(double %a, double %b) nounwind {
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
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244 entry:
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83
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245 %tmp1 = bitcast double %a to x86_mmx
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246 ; X64: movdq2q
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247 %tmp2 = bitcast double %b to x86_mmx
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248 ; X64: movdq2q
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249 %tmp3 = tail call x86_mmx @llvm.x86.mmx.padd.b(x86_mmx %tmp1, x86_mmx %tmp2)
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250 store x86_mmx %tmp3, x86_mmx* null
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251 ret void
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252 }
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253
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254 ; X64-LABEL: ti16a
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255 define void @ti16a(double %a, double %b) nounwind {
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256 entry:
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257 %tmp1 = bitcast double %a to x86_mmx
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258 ; X64: movdq2q
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259 %tmp2 = bitcast double %b to x86_mmx
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260 ; X64: movdq2q
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261 %tmp3 = tail call x86_mmx @llvm.x86.mmx.padd.w(x86_mmx %tmp1, x86_mmx %tmp2)
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262 store x86_mmx %tmp3, x86_mmx* null
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263 ret void
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264 }
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265
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266 ; X64-LABEL: ti32a
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267 define void @ti32a(double %a, double %b) nounwind {
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268 entry:
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269 %tmp1 = bitcast double %a to x86_mmx
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270 ; X64: movdq2q
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271 %tmp2 = bitcast double %b to x86_mmx
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272 ; X64: movdq2q
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273 %tmp3 = tail call x86_mmx @llvm.x86.mmx.padd.d(x86_mmx %tmp1, x86_mmx %tmp2)
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274 store x86_mmx %tmp3, x86_mmx* null
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275 ret void
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276 }
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277
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278 ; X64-LABEL: ti64a
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279 define void @ti64a(double %a, double %b) nounwind {
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280 entry:
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281 %tmp1 = bitcast double %a to x86_mmx
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282 ; X64: movdq2q
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283 %tmp2 = bitcast double %b to x86_mmx
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284 ; X64: movdq2q
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285 %tmp3 = tail call x86_mmx @llvm.x86.mmx.padd.q(x86_mmx %tmp1, x86_mmx %tmp2)
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286 store x86_mmx %tmp3, x86_mmx* null
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287 ret void
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288 }
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289
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290 declare x86_mmx @llvm.x86.mmx.padd.b(x86_mmx, x86_mmx)
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291 declare x86_mmx @llvm.x86.mmx.padd.w(x86_mmx, x86_mmx)
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292 declare x86_mmx @llvm.x86.mmx.padd.d(x86_mmx, x86_mmx)
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293 declare x86_mmx @llvm.x86.mmx.padd.q(x86_mmx, x86_mmx)
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294
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295 declare x86_mmx @llvm.x86.mmx.paddus.b(x86_mmx, x86_mmx)
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296 declare x86_mmx @llvm.x86.mmx.psubus.b(x86_mmx, x86_mmx)
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297 declare x86_mmx @llvm.x86.mmx.paddus.w(x86_mmx, x86_mmx)
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298 declare x86_mmx @llvm.x86.mmx.psubus.w(x86_mmx, x86_mmx)
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299 declare x86_mmx @llvm.x86.mmx.pmulh.w(x86_mmx, x86_mmx)
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300 declare x86_mmx @llvm.x86.mmx.pmadd.wd(x86_mmx, x86_mmx)
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301
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302 declare void @llvm.x86.mmx.emms()
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303
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304 declare x86_mmx @llvm.x86.mmx.padds.b(x86_mmx, x86_mmx)
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305 declare x86_mmx @llvm.x86.mmx.padds.w(x86_mmx, x86_mmx)
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306 declare x86_mmx @llvm.x86.mmx.psubs.b(x86_mmx, x86_mmx)
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307 declare x86_mmx @llvm.x86.mmx.psubs.w(x86_mmx, x86_mmx)
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308
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