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annotate test/CodeGen/X86/shl-anyext.ll @ 121:803732b1fca8

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LLVM 5.0
author kono
date Fri, 27 Oct 2017 17:07:41 +0900
parents 95c75e76d11b
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
121
803732b1fca8 LLVM 5.0
kono
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1 ; RUN: llc -mtriple=x86_64-- < %s | FileCheck %s
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2
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3 ; Codegen should be able to use a 32-bit shift instead of a 64-bit shift.
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4 ; CHECK: shll $16
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5
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6 define fastcc void @test(i32 %level, i64 %a, i64 %b, i64 %c, i64 %d, i32* %p) nounwind {
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7 if.end523: ; preds = %if.end453
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8 %conv7981749 = zext i32 %level to i64 ; <i64> [#uses=1]
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9 %and799 = shl i64 %conv7981749, 16 ; <i64> [#uses=1]
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10 %shl800 = and i64 %and799, 16711680 ; <i64> [#uses=1]
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11 %or801 = or i64 %shl800, %a ; <i64> [#uses=1]
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12 %or806 = or i64 %or801, %b ; <i64> [#uses=1]
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13 %or811 = or i64 %or806, %c ; <i64> [#uses=1]
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14 %or819 = or i64 %or811, %d ; <i64> [#uses=1]
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15 %conv820 = trunc i64 %or819 to i32 ; <i32> [#uses=1]
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16 store i32 %conv820, i32* %p
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17 ret void
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18 }
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19
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20 ; CHECK-LABEL: foo:
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21
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22 declare void @bar(i64)
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23
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24 define fastcc void @foo(i32 %t) {
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25 bb:
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26 %tmp = add i32 %t, -1 ; <i32> [#uses=1]
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27 br label %bb1
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28
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29 bb1: ; preds = %bb
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30 %tmp2 = zext i32 %tmp to i64 ; <i64> [#uses=2]
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31 %tmp3 = add i64 %tmp2, 1 ; <i64> [#uses=1]
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32 %tmp4 = xor i64 %tmp2, 536870911 ; <i64> [#uses=1]
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33 %tmp5 = and i64 %tmp3, %tmp4 ; <i64> [#uses=1]
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34 %tmp6 = shl i64 %tmp5, 3 ; <i64> [#uses=1]
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35 %tmp7 = sub i64 64, %tmp6 ; <i64> [#uses=1]
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36 %tmp8 = and i64 %tmp7, 4294967288 ; <i64> [#uses=1]
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37 %tmp9 = lshr i64 -1, %tmp8 ; <i64> [#uses=1]
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38 call void @bar(i64 %tmp9)
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39 ret void
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40 }