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annotate test/CodeGen/X86/sink-hoist.ll @ 121:803732b1fca8

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LLVM 5.0
author kono
date Fri, 27 Oct 2017 17:07:41 +0900
parents afa8332a0e37
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
121
803732b1fca8 LLVM 5.0
kono
parents: 95
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1 ; RUN: llc < %s -verify-machineinstrs -asm-verbose=false -mtriple=x86_64-unknown-linux-gnu -mcpu=nehalem -post-RA-scheduler=true -schedmodel=false | FileCheck %s
0
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2
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3 ; Currently, floating-point selects are lowered to CFG triangles.
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4 ; This means that one side of the select is always unconditionally
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5 ; evaluated, however with MachineSink we can sink the other side so
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6 ; that it's conditionally evaluated.
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7
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8 ; CHECK-LABEL: foo:
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9 ; CHECK-NEXT: testb $1, %dil
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10 ; CHECK-NEXT: jne
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11 ; CHECK-NEXT: divsd
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12 ; CHECK-NEXT: movapd
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13 ; CHECK-NEXT: ret
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14 ; CHECK: divsd
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15
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16 define double @foo(double %x, double %y, i1 %c) nounwind {
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17 %a = fdiv double %x, 3.2
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18 %b = fdiv double %y, 3.3
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19 %z = select i1 %c, double %a, double %b
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20 ret double %z
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21 }
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22
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23 ; Make sure the critical edge is broken so the divsd is sunken below
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24 ; the conditional branch.
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25 ; rdar://8454886
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26
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27 ; CHECK-LABEL: split:
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28 ; CHECK-NEXT: testb $1, %dil
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29 ; CHECK-NEXT: je
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30 ; CHECK: divsd
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31 ; CHECK: movapd
0
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32 ; CHECK: ret
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33 define double @split(double %x, double %y, i1 %c) nounwind {
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34 %a = fdiv double %x, 3.2
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35 %z = select i1 %c, double %a, double %y
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36 ret double %z
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37 }
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38
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39
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40 ; Hoist floating-point constant-pool loads out of loops.
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41
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42 ; CHECK-LABEL: bar:
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43 ; CHECK: movsd
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44 ; CHECK: align
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45 define void @bar(double* nocapture %p, i64 %n) nounwind {
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46 entry:
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47 %0 = icmp sgt i64 %n, 0
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48 br i1 %0, label %bb, label %return
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49
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50 bb:
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51 %i.03 = phi i64 [ 0, %entry ], [ %3, %bb ]
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52 %scevgep = getelementptr double, double* %p, i64 %i.03
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53 %1 = load double, double* %scevgep, align 8
0
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54 %2 = fdiv double 3.200000e+00, %1
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55 store double %2, double* %scevgep, align 8
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56 %3 = add nsw i64 %i.03, 1
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57 %exitcond = icmp eq i64 %3, %n
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58 br i1 %exitcond, label %return, label %bb
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59
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60 return:
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61 ret void
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62 }
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63
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64 ; Sink instructions with dead EFLAGS defs.
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65
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66 ; FIXME: Unfail the zzz test if we can correctly mark pregs with the kill flag.
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67 ;
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68 ; See <rdar://problem/8030636>. This test isn't valid after we made machine
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parents:
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69 ; sinking more conservative about sinking instructions that define a preg into a
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70 ; block when we don't know if the preg is killed within the current block.
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71
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72
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73 ; FIXMEHECK: zzz:
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74 ; FIXMEHECK: je
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75 ; FIXMEHECK-NEXT: orb
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76
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77 ; define zeroext i8 @zzz(i8 zeroext %a, i8 zeroext %b) nounwind readnone {
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78 ; entry:
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79 ; %tmp = zext i8 %a to i32 ; <i32> [#uses=1]
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parents:
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80 ; %tmp2 = icmp eq i8 %a, 0 ; <i1> [#uses=1]
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parents:
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81 ; %tmp3 = or i8 %b, -128 ; <i8> [#uses=1]
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parents:
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82 ; %tmp4 = and i8 %b, 127 ; <i8> [#uses=1]
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parents:
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83 ; %b_addr.0 = select i1 %tmp2, i8 %tmp4, i8 %tmp3 ; <i8> [#uses=1]
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84 ; ret i8 %b_addr.0
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85 ; }
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86
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87 ; Codegen should hoist and CSE these constants.
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parents:
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88
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89 ; CHECK-LABEL: vv:
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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90 ; CHECK: LCPI3_0(%rip), %xmm0
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parents:
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91 ; CHECK: LCPI3_1(%rip), %xmm1
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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92 ; CHECK: LCPI3_2(%rip), %xmm2
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93 ; CHECK: align
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94 ; CHECK-NOT: LCPI
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95 ; CHECK: ret
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96
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97 @_minusZero.6007 = internal constant <4 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00> ; <<4 x float>*> [#uses=0]
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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98 @twoTo23.6008 = internal constant <4 x float> <float 8.388608e+06, float 8.388608e+06, float 8.388608e+06, float 8.388608e+06> ; <<4 x float>*> [#uses=0]
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99
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100 define void @vv(float* %y, float* %x, i32* %n) nounwind ssp {
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101 entry:
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102 br label %bb60
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103
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104 bb: ; preds = %bb60
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105 %i.0 = phi i32 [ 0, %bb60 ] ; <i32> [#uses=2]
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106 %0 = bitcast float* %x_addr.0 to <4 x float>* ; <<4 x float>*> [#uses=1]
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107 %1 = load <4 x float>, <4 x float>* %0, align 16 ; <<4 x float>> [#uses=4]
0
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108 %tmp20 = bitcast <4 x float> %1 to <4 x i32> ; <<4 x i32>> [#uses=1]
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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109 %tmp22 = and <4 x i32> %tmp20, <i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647> ; <<4 x i32>> [#uses=1]
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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110 %tmp23 = bitcast <4 x i32> %tmp22 to <4 x float> ; <<4 x float>> [#uses=1]
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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111 %tmp25 = bitcast <4 x float> %1 to <4 x i32> ; <<4 x i32>> [#uses=1]
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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112 %tmp27 = and <4 x i32> %tmp25, <i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648> ; <<4 x i32>> [#uses=2]
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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113 %tmp30 = call <4 x float> @llvm.x86.sse.cmp.ps(<4 x float> %tmp23, <4 x float> <float 8.388608e+06, float 8.388608e+06, float 8.388608e+06, float 8.388608e+06>, i8 5) ; <<4 x float>> [#uses=1]
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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114 %tmp34 = bitcast <4 x float> %tmp30 to <4 x i32> ; <<4 x i32>> [#uses=1]
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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115 %tmp36 = xor <4 x i32> %tmp34, <i32 -1, i32 -1, i32 -1, i32 -1> ; <<4 x i32>> [#uses=1]
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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116 %tmp37 = and <4 x i32> %tmp36, <i32 1258291200, i32 1258291200, i32 1258291200, i32 1258291200> ; <<4 x i32>> [#uses=1]
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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117 %tmp42 = or <4 x i32> %tmp37, %tmp27 ; <<4 x i32>> [#uses=1]
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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118 %tmp43 = bitcast <4 x i32> %tmp42 to <4 x float> ; <<4 x float>> [#uses=2]
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parents:
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119 %tmp45 = fadd <4 x float> %1, %tmp43 ; <<4 x float>> [#uses=1]
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120 %tmp47 = fsub <4 x float> %tmp45, %tmp43 ; <<4 x float>> [#uses=2]
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121 %tmp49 = call <4 x float> @llvm.x86.sse.cmp.ps(<4 x float> %1, <4 x float> %tmp47, i8 1) ; <<4 x float>> [#uses=1]
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122 %2 = bitcast <4 x float> %tmp49 to <4 x i32> ; <<4 x i32>> [#uses=1]
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123 %3 = call <4 x float> @llvm.x86.sse2.cvtdq2ps(<4 x i32> %2) nounwind readnone ; <<4 x float>> [#uses=1]
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124 %tmp53 = fadd <4 x float> %tmp47, %3 ; <<4 x float>> [#uses=1]
95c75e76d11b LLVM 3.4
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125 %tmp55 = bitcast <4 x float> %tmp53 to <4 x i32> ; <<4 x i32>> [#uses=1]
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126 %tmp57 = or <4 x i32> %tmp55, %tmp27 ; <<4 x i32>> [#uses=1]
95c75e76d11b LLVM 3.4
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127 %tmp58 = bitcast <4 x i32> %tmp57 to <4 x float> ; <<4 x float>> [#uses=1]
95c75e76d11b LLVM 3.4
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128 %4 = bitcast float* %y_addr.0 to <4 x float>* ; <<4 x float>*> [#uses=1]
95c75e76d11b LLVM 3.4
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129 store <4 x float> %tmp58, <4 x float>* %4, align 16
95
afa8332a0e37 LLVM 3.8
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diff changeset
130 %5 = getelementptr float, float* %x_addr.0, i64 4 ; <float*> [#uses=1]
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diff changeset
131 %6 = getelementptr float, float* %y_addr.0, i64 4 ; <float*> [#uses=1]
0
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132 %7 = add i32 %i.0, 4 ; <i32> [#uses=1]
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diff changeset
133 %8 = load i32, i32* %n, align 4 ; <i32> [#uses=1]
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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134 %9 = icmp sgt i32 %8, %7 ; <i1> [#uses=1]
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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135 br i1 %9, label %bb60, label %return
95c75e76d11b LLVM 3.4
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diff changeset
136
95c75e76d11b LLVM 3.4
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137 bb60: ; preds = %bb, %entry
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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diff changeset
138 %x_addr.0 = phi float* [ %x, %entry ], [ %5, %bb ] ; <float*> [#uses=2]
95c75e76d11b LLVM 3.4
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parents:
diff changeset
139 %y_addr.0 = phi float* [ %y, %entry ], [ %6, %bb ] ; <float*> [#uses=2]
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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140 br label %bb
95c75e76d11b LLVM 3.4
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diff changeset
141
95c75e76d11b LLVM 3.4
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142 return: ; preds = %bb60
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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143 ret void
95c75e76d11b LLVM 3.4
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parents:
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144 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
145
95c75e76d11b LLVM 3.4
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146 declare <4 x float> @llvm.x86.sse.cmp.ps(<4 x float>, <4 x float>, i8) nounwind readnone
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147
95c75e76d11b LLVM 3.4
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148 declare <4 x float> @llvm.x86.sse2.cvtdq2ps(<4 x i32>) nounwind readnone
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149
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150 ; CodeGen should use the correct register class when extracting
95c75e76d11b LLVM 3.4
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151 ; a load from a zero-extending load for hoisting.
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152
95c75e76d11b LLVM 3.4
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153 ; CHECK-LABEL: default_get_pch_validity:
95c75e76d11b LLVM 3.4
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154 ; CHECK: movl cl_options_count(%rip), %ecx
95c75e76d11b LLVM 3.4
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155
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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156 @cl_options_count = external constant i32 ; <i32*> [#uses=2]
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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157
95c75e76d11b LLVM 3.4
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158 define void @default_get_pch_validity() nounwind {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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159 entry:
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afa8332a0e37 LLVM 3.8
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parents: 83
diff changeset
160 %tmp4 = load i32, i32* @cl_options_count, align 4 ; <i32> [#uses=1]
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
161 %tmp5 = icmp eq i32 %tmp4, 0 ; <i1> [#uses=1]
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
162 br i1 %tmp5, label %bb6, label %bb2
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
163
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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diff changeset
164 bb2: ; preds = %bb2, %entry
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
165 %i.019 = phi i64 [ 0, %entry ], [ %tmp25, %bb2 ] ; <i64> [#uses=1]
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
166 %tmp25 = add i64 %i.019, 1 ; <i64> [#uses=2]
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afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
167 %tmp11 = load i32, i32* @cl_options_count, align 4 ; <i32> [#uses=1]
0
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
168 %tmp12 = zext i32 %tmp11 to i64 ; <i64> [#uses=1]
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
169 %tmp13 = icmp ugt i64 %tmp12, %tmp25 ; <i1> [#uses=1]
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
170 br i1 %tmp13, label %bb2, label %bb6
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
171
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
172 bb6: ; preds = %bb2, %entry
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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173 ret void
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
174 }