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120
|
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
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2 ; Tests for SSE1 and below, without SSE2+.
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120
|
3 ; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=pentium3 -O3 | FileCheck %s --check-prefix=X32
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4 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=-sse2,+sse -O3 | FileCheck %s --check-prefix=X64
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0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
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5
|
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
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6 ; PR7993
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
7 ;define <4 x i32> @test3(<4 x i16> %a) nounwind {
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
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8 ; %c = sext <4 x i16> %a to <4 x i32> ; <<4 x i32>> [#uses=1]
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
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9 ; ret <4 x i32> %c
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
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10 ;}
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
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11
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
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12 ; This should not emit shuffles to populate the top 2 elements of the 4-element
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
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13 ; vector that this ends up returning.
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
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14 ; rdar://8368414
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
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15 define <2 x float> @test4(<2 x float> %A, <2 x float> %B) nounwind {
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120
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16 ; X32-LABEL: test4:
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17 ; X32: # BB#0: # %entry
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18 ; X32-NEXT: movaps %xmm0, %xmm2
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19 ; X32-NEXT: shufps {{.*#+}} xmm2 = xmm2[1,1,2,3]
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20 ; X32-NEXT: addss %xmm1, %xmm0
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21 ; X32-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1,2,3]
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22 ; X32-NEXT: subss %xmm1, %xmm2
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23 ; X32-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
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24 ; X32-NEXT: retl
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25 ;
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26 ; X64-LABEL: test4:
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27 ; X64: # BB#0: # %entry
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28 ; X64-NEXT: movaps %xmm0, %xmm2
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29 ; X64-NEXT: shufps {{.*#+}} xmm2 = xmm2[1,1,2,3]
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30 ; X64-NEXT: addss %xmm1, %xmm0
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31 ; X64-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,1,2,3]
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32 ; X64-NEXT: subss %xmm1, %xmm2
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33 ; X64-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
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34 ; X64-NEXT: retq
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0
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
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35 entry:
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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changeset
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36 %tmp7 = extractelement <2 x float> %A, i32 0
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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changeset
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37 %tmp5 = extractelement <2 x float> %A, i32 1
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
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38 %tmp3 = extractelement <2 x float> %B, i32 0
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
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39 %tmp1 = extractelement <2 x float> %B, i32 1
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
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40 %add.r = fadd float %tmp7, %tmp3
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
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41 %add.i = fsub float %tmp5, %tmp1
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
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42 %tmp11 = insertelement <2 x float> undef, float %add.r, i32 0
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
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43 %tmp9 = insertelement <2 x float> %tmp11, float %add.i, i32 1
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
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44 ret <2 x float> %tmp9
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff
changeset
|
45 }
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|
77
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46
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47 ; We used to get stuck in type legalization for this example when lowering the
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48 ; vselect. With SSE1 v4f32 is a legal type but v4i1 (or any vector integer type)
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49 ; is not. We used to ping pong between splitting the vselect for the v4i
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50 ; condition operand and widening the resulting vselect for the v4f32 result.
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51 ; PR18036
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52
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53 define <4 x float> @vselect(<4 x float>*%p, <4 x i32> %q) {
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120
|
54 ; X32-LABEL: vselect:
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55 ; X32: # BB#0: # %entry
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56 ; X32-NEXT: cmpl $0, {{[0-9]+}}(%esp)
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57 ; X32-NEXT: xorps %xmm0, %xmm0
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58 ; X32-NEXT: je .LBB1_1
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59 ; X32-NEXT: # BB#2: # %entry
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60 ; X32-NEXT: xorps %xmm1, %xmm1
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61 ; X32-NEXT: cmpl $0, {{[0-9]+}}(%esp)
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62 ; X32-NEXT: jne .LBB1_5
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121
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63 ; X32-NEXT: .LBB1_4:
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64 ; X32-NEXT: movss {{.*#+}} xmm2 = mem[0],zero,zero,zero
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65 ; X32-NEXT: cmpl $0, {{[0-9]+}}(%esp)
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66 ; X32-NEXT: jne .LBB1_8
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67 ; X32-NEXT: .LBB1_7:
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68 ; X32-NEXT: movss {{.*#+}} xmm3 = mem[0],zero,zero,zero
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69 ; X32-NEXT: cmpl $0, {{[0-9]+}}(%esp)
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70 ; X32-NEXT: unpcklps {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1]
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71 ; X32-NEXT: je .LBB1_10
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72 ; X32-NEXT: jmp .LBB1_11
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120
|
73 ; X32-NEXT: .LBB1_1:
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74 ; X32-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
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75 ; X32-NEXT: cmpl $0, {{[0-9]+}}(%esp)
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76 ; X32-NEXT: je .LBB1_4
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77 ; X32-NEXT: .LBB1_5: # %entry
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78 ; X32-NEXT: xorps %xmm2, %xmm2
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79 ; X32-NEXT: cmpl $0, {{[0-9]+}}(%esp)
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80 ; X32-NEXT: je .LBB1_7
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81 ; X32-NEXT: .LBB1_8: # %entry
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82 ; X32-NEXT: xorps %xmm3, %xmm3
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83 ; X32-NEXT: cmpl $0, {{[0-9]+}}(%esp)
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84 ; X32-NEXT: unpcklps {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1]
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85 ; X32-NEXT: jne .LBB1_11
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121
|
86 ; X32-NEXT: .LBB1_10:
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120
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87 ; X32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
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88 ; X32-NEXT: .LBB1_11: # %entry
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89 ; X32-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
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121
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90 ; X32-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0],xmm2[0]
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120
|
91 ; X32-NEXT: retl
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92 ;
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93 ; X64-LABEL: vselect:
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94 ; X64: # BB#0: # %entry
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121
|
95 ; X64-NEXT: testl %edx, %edx
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120
|
96 ; X64-NEXT: xorps %xmm0, %xmm0
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97 ; X64-NEXT: je .LBB1_1
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98 ; X64-NEXT: # BB#2: # %entry
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99 ; X64-NEXT: xorps %xmm1, %xmm1
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121
|
100 ; X64-NEXT: testl %ecx, %ecx
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120
|
101 ; X64-NEXT: jne .LBB1_5
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121
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102 ; X64-NEXT: .LBB1_4:
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103 ; X64-NEXT: movss {{.*#+}} xmm2 = mem[0],zero,zero,zero
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104 ; X64-NEXT: testl %r8d, %r8d
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105 ; X64-NEXT: jne .LBB1_8
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106 ; X64-NEXT: .LBB1_7:
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107 ; X64-NEXT: movss {{.*#+}} xmm3 = mem[0],zero,zero,zero
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108 ; X64-NEXT: testl %esi, %esi
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109 ; X64-NEXT: unpcklps {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1]
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110 ; X64-NEXT: je .LBB1_10
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111 ; X64-NEXT: jmp .LBB1_11
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120
|
112 ; X64-NEXT: .LBB1_1:
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113 ; X64-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
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121
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114 ; X64-NEXT: testl %ecx, %ecx
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120
|
115 ; X64-NEXT: je .LBB1_4
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116 ; X64-NEXT: .LBB1_5: # %entry
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117 ; X64-NEXT: xorps %xmm2, %xmm2
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118 ; X64-NEXT: testl %r8d, %r8d
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119 ; X64-NEXT: je .LBB1_7
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120 ; X64-NEXT: .LBB1_8: # %entry
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121 ; X64-NEXT: xorps %xmm3, %xmm3
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122 ; X64-NEXT: testl %esi, %esi
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123 ; X64-NEXT: unpcklps {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1]
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124 ; X64-NEXT: jne .LBB1_11
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121
|
125 ; X64-NEXT: .LBB1_10:
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|
120
|
126 ; X64-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
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127 ; X64-NEXT: .LBB1_11: # %entry
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|
128 ; X64-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
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121
|
129 ; X64-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0],xmm2[0]
|
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120
|
130 ; X64-NEXT: retq
|
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77
|
131 entry:
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132 %a1 = icmp eq <4 x i32> %q, zeroinitializer
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133 %a14 = select <4 x i1> %a1, <4 x float> <float 1.000000e+00, float 2.000000e+00, float 3.000000e+00, float 4.000000e+0> , <4 x float> zeroinitializer
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134 ret <4 x float> %a14
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|
|
135 }
|
|
120
|
136
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|
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137 ; v4i32 isn't legal for SSE1, but this should be cmpps.
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138
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139 define <4 x float> @PR28044(<4 x float> %a0, <4 x float> %a1) nounwind {
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|
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140 ; X32-LABEL: PR28044:
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|
141 ; X32: # BB#0:
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|
|
142 ; X32-NEXT: cmpeqps %xmm1, %xmm0
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|
|
143 ; X32-NEXT: retl
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144 ;
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145 ; X64-LABEL: PR28044:
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|
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146 ; X64: # BB#0:
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|
|
147 ; X64-NEXT: cmpeqps %xmm1, %xmm0
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|
|
148 ; X64-NEXT: retq
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149 %cmp = fcmp oeq <4 x float> %a0, %a1
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150 %sext = sext <4 x i1> %cmp to <4 x i32>
|
|
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151 %res = bitcast <4 x i32> %sext to <4 x float>
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152 ret <4 x float> %res
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153 }
|
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154
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155 ; Don't crash trying to do the impossible: an integer vector comparison doesn't exist, so we must scalarize.
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156 ; https://llvm.org/bugs/show_bug.cgi?id=30512
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157
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|
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158 define <4 x i32> @PR30512(<4 x i32> %x, <4 x i32> %y) nounwind {
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|
|
159 ; X32-LABEL: PR30512:
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|
160 ; X32: # BB#0:
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|
161 ; X32-NEXT: pushl %ebp
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|
162 ; X32-NEXT: pushl %ebx
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163 ; X32-NEXT: pushl %edi
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|
164 ; X32-NEXT: pushl %esi
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|
165 ; X32-NEXT: movl {{[0-9]+}}(%esp), %ebp
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|
166 ; X32-NEXT: movl {{[0-9]+}}(%esp), %esi
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|
167 ; X32-NEXT: movl {{[0-9]+}}(%esp), %edi
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|
168 ; X32-NEXT: movl {{[0-9]+}}(%esp), %ebx
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169 ; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
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|
170 ; X32-NEXT: xorl %ecx, %ecx
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|
171 ; X32-NEXT: cmpl {{[0-9]+}}(%esp), %edx
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172 ; X32-NEXT: sete %cl
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173 ; X32-NEXT: xorl %edx, %edx
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174 ; X32-NEXT: cmpl {{[0-9]+}}(%esp), %ebx
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175 ; X32-NEXT: sete %dl
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|
176 ; X32-NEXT: xorl %ebx, %ebx
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|
177 ; X32-NEXT: cmpl {{[0-9]+}}(%esp), %edi
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178 ; X32-NEXT: sete %bl
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179 ; X32-NEXT: xorl %eax, %eax
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|
180 ; X32-NEXT: cmpl {{[0-9]+}}(%esp), %esi
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181 ; X32-NEXT: sete %al
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|
182 ; X32-NEXT: movl %eax, 12(%ebp)
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|
183 ; X32-NEXT: movl %ebx, 8(%ebp)
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184 ; X32-NEXT: movl %edx, 4(%ebp)
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185 ; X32-NEXT: movl %ecx, (%ebp)
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186 ; X32-NEXT: movl %ebp, %eax
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187 ; X32-NEXT: popl %esi
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|
188 ; X32-NEXT: popl %edi
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|
|
189 ; X32-NEXT: popl %ebx
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|
190 ; X32-NEXT: popl %ebp
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|
191 ; X32-NEXT: retl $4
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192 ;
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193 ; X64-LABEL: PR30512:
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194 ; X64: # BB#0:
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195 ; X64-NEXT: xorl %eax, %eax
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|
196 ; X64-NEXT: cmpl %r9d, %esi
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197 ; X64-NEXT: sete %al
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|
198 ; X64-NEXT: xorl %esi, %esi
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|
199 ; X64-NEXT: cmpl {{[0-9]+}}(%rsp), %edx
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|
200 ; X64-NEXT: sete %sil
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|
201 ; X64-NEXT: xorl %edx, %edx
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|
202 ; X64-NEXT: cmpl {{[0-9]+}}(%rsp), %ecx
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203 ; X64-NEXT: sete %dl
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|
204 ; X64-NEXT: xorl %ecx, %ecx
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|
205 ; X64-NEXT: cmpl {{[0-9]+}}(%rsp), %r8d
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|
206 ; X64-NEXT: sete %cl
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|
207 ; X64-NEXT: movl %ecx, 12(%rdi)
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|
208 ; X64-NEXT: movl %edx, 8(%rdi)
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|
209 ; X64-NEXT: movl %esi, 4(%rdi)
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|
210 ; X64-NEXT: movl %eax, (%rdi)
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|
211 ; X64-NEXT: movq %rdi, %rax
|
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|
212 ; X64-NEXT: retq
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|
213 %cmp = icmp eq <4 x i32> %x, %y
|
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|
214 %zext = zext <4 x i1> %cmp to <4 x i32>
|
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|
215 ret <4 x i32> %zext
|
|
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216 }
|
|
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217
|
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121
|
218 ; Fragile test warning - we need to induce the generation of a vselect
|
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|
219 ; post-legalization to cause the crash seen in:
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|
220 ; https://llvm.org/bugs/show_bug.cgi?id=31672
|
|
|
221 ; Is there a way to do that without an unsafe/fast sqrt intrinsic call?
|
|
|
222 ; Also, although the goal for adding this test is to prove that we
|
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|
223 ; don't crash, I have no idea what this code is doing, so I'm keeping
|
|
|
224 ; the full codegen checks in case there's motivation to improve this.
|
|
|
225
|
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|
226 define <2 x float> @PR31672() #0 {
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|
227 ; X32-LABEL: PR31672:
|
|
|
228 ; X32: # BB#0:
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|
|
229 ; X32-NEXT: pushl %ebp
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|
|
230 ; X32-NEXT: movl %esp, %ebp
|
|
|
231 ; X32-NEXT: andl $-16, %esp
|
|
|
232 ; X32-NEXT: subl $80, %esp
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|
233 ; X32-NEXT: xorps %xmm0, %xmm0
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|
|
234 ; X32-NEXT: movaps {{.*#+}} xmm1 = <42,3,u,u>
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|
|
235 ; X32-NEXT: movaps %xmm1, %xmm2
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|
236 ; X32-NEXT: cmpeqps %xmm0, %xmm2
|
|
|
237 ; X32-NEXT: movaps %xmm2, {{[0-9]+}}(%esp)
|
|
|
238 ; X32-NEXT: movaps %xmm0, {{[0-9]+}}(%esp)
|
|
|
239 ; X32-NEXT: rsqrtps %xmm1, %xmm0
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|
|
240 ; X32-NEXT: mulps %xmm0, %xmm1
|
|
|
241 ; X32-NEXT: mulps %xmm0, %xmm1
|
|
|
242 ; X32-NEXT: addps {{\.LCPI.*}}, %xmm1
|
|
|
243 ; X32-NEXT: mulps {{\.LCPI.*}}, %xmm0
|
|
|
244 ; X32-NEXT: mulps %xmm1, %xmm0
|
|
|
245 ; X32-NEXT: movaps %xmm0, {{[0-9]+}}(%esp)
|
|
|
246 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
|
|
|
247 ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
|
|
|
248 ; X32-NEXT: andl %eax, %ecx
|
|
|
249 ; X32-NEXT: notl %eax
|
|
|
250 ; X32-NEXT: andl {{[0-9]+}}(%esp), %eax
|
|
|
251 ; X32-NEXT: orl %ecx, %eax
|
|
|
252 ; X32-NEXT: movl %eax, (%esp)
|
|
|
253 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
|
|
|
254 ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
|
|
|
255 ; X32-NEXT: andl %eax, %ecx
|
|
|
256 ; X32-NEXT: notl %eax
|
|
|
257 ; X32-NEXT: andl {{[0-9]+}}(%esp), %eax
|
|
|
258 ; X32-NEXT: orl %ecx, %eax
|
|
|
259 ; X32-NEXT: movl %eax, {{[0-9]+}}(%esp)
|
|
|
260 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
|
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261 ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
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262 ; X32-NEXT: movl {{[0-9]+}}(%esp), %edx
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263 ; X32-NEXT: andl %ecx, %edx
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264 ; X32-NEXT: notl %ecx
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265 ; X32-NEXT: andl {{[0-9]+}}(%esp), %ecx
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266 ; X32-NEXT: orl %edx, %ecx
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267 ; X32-NEXT: movl %ecx, {{[0-9]+}}(%esp)
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268 ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
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269 ; X32-NEXT: andl %eax, %ecx
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270 ; X32-NEXT: notl %eax
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271 ; X32-NEXT: andl {{[0-9]+}}(%esp), %eax
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272 ; X32-NEXT: orl %ecx, %eax
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273 ; X32-NEXT: movl %eax, {{[0-9]+}}(%esp)
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274 ; X32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
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275 ; X32-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
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276 ; X32-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
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277 ; X32-NEXT: movss {{.*#+}} xmm2 = mem[0],zero,zero,zero
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278 ; X32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
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279 ; X32-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
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280 ; X32-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0]
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281 ; X32-NEXT: movl %ebp, %esp
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282 ; X32-NEXT: popl %ebp
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283 ; X32-NEXT: retl
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284 ;
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285 ; X64-LABEL: PR31672:
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286 ; X64: # BB#0:
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287 ; X64-NEXT: xorps %xmm0, %xmm0
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288 ; X64-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp)
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289 ; X64-NEXT: movaps {{.*#+}} xmm1 = <42,3,u,u>
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290 ; X64-NEXT: cmpeqps %xmm1, %xmm0
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291 ; X64-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp)
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292 ; X64-NEXT: rsqrtps %xmm1, %xmm0
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293 ; X64-NEXT: mulps %xmm0, %xmm1
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294 ; X64-NEXT: mulps %xmm0, %xmm1
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295 ; X64-NEXT: addps {{.*}}(%rip), %xmm1
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296 ; X64-NEXT: mulps {{.*}}(%rip), %xmm0
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297 ; X64-NEXT: mulps %xmm1, %xmm0
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298 ; X64-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp)
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299 ; X64-NEXT: movq -{{[0-9]+}}(%rsp), %r8
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300 ; X64-NEXT: movq -{{[0-9]+}}(%rsp), %rsi
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301 ; X64-NEXT: movq -{{[0-9]+}}(%rsp), %r9
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302 ; X64-NEXT: movq -{{[0-9]+}}(%rsp), %rdi
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303 ; X64-NEXT: movl %esi, %eax
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304 ; X64-NEXT: andl %edi, %eax
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305 ; X64-NEXT: movl %edi, %ecx
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306 ; X64-NEXT: notl %ecx
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307 ; X64-NEXT: movq -{{[0-9]+}}(%rsp), %r10
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308 ; X64-NEXT: movq -{{[0-9]+}}(%rsp), %rdx
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309 ; X64-NEXT: andl %edx, %ecx
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310 ; X64-NEXT: orl %eax, %ecx
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311 ; X64-NEXT: movl %ecx, -{{[0-9]+}}(%rsp)
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312 ; X64-NEXT: shrq $32, %rsi
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313 ; X64-NEXT: shrq $32, %rdi
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314 ; X64-NEXT: andl %edi, %esi
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315 ; X64-NEXT: notl %edi
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316 ; X64-NEXT: shrq $32, %rdx
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317 ; X64-NEXT: andl %edi, %edx
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318 ; X64-NEXT: orl %esi, %edx
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319 ; X64-NEXT: movl %edx, -{{[0-9]+}}(%rsp)
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320 ; X64-NEXT: movl %r8d, %eax
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321 ; X64-NEXT: andl %r9d, %eax
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322 ; X64-NEXT: movl %r9d, %ecx
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323 ; X64-NEXT: notl %ecx
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324 ; X64-NEXT: andl %r10d, %ecx
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325 ; X64-NEXT: orl %eax, %ecx
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326 ; X64-NEXT: movl %ecx, -{{[0-9]+}}(%rsp)
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327 ; X64-NEXT: shrq $32, %r8
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328 ; X64-NEXT: shrq $32, %r9
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329 ; X64-NEXT: andl %r9d, %r8d
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330 ; X64-NEXT: notl %r9d
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331 ; X64-NEXT: shrq $32, %r10
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332 ; X64-NEXT: andl %r9d, %r10d
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333 ; X64-NEXT: orl %r8d, %r10d
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334 ; X64-NEXT: movl %r10d, -{{[0-9]+}}(%rsp)
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335 ; X64-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
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336 ; X64-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
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337 ; X64-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
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338 ; X64-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
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339 ; X64-NEXT: movss {{.*#+}} xmm2 = mem[0],zero,zero,zero
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340 ; X64-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
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341 ; X64-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0]
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342 ; X64-NEXT: retq
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343 %t0 = call fast <2 x float> @llvm.sqrt.v2f32(<2 x float> <float 42.0, float 3.0>)
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344 ret <2 x float> %t0
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345 }
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346
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347 declare <2 x float> @llvm.sqrt.v2f32(<2 x float>) #1
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348
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349 attributes #0 = { nounwind "unsafe-fp-math"="true" }
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350
|
