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annotate lib/Target/Mips/MipsSubtarget.cpp @ 0:95c75e76d11b LLVM3.4

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LLVM 3.4
author Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
date Thu, 12 Dec 2013 13:56:28 +0900
parents
children e4204d083e25
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1 //===-- MipsSubtarget.cpp - Mips Subtarget Information --------------------===//
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2 //
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3 // The LLVM Compiler Infrastructure
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4 //
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5 // This file is distributed under the University of Illinois Open Source
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6 // License. See LICENSE.TXT for details.
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7 //
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8 //===----------------------------------------------------------------------===//
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9 //
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10 // This file implements the Mips specific subclass of TargetSubtargetInfo.
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11 //
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12 //===----------------------------------------------------------------------===//
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13
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14 #define DEBUG_TYPE "mips-subtarget"
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15
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16 #include "MipsMachineFunction.h"
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17 #include "MipsSubtarget.h"
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18 #include "MipsTargetMachine.h"
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19 #include "Mips.h"
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20 #include "MipsRegisterInfo.h"
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21 #include "llvm/IR/Attributes.h"
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22 #include "llvm/IR/Function.h"
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23 #include "llvm/Support/CommandLine.h"
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24 #include "llvm/Support/Debug.h"
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25 #include "llvm/Support/TargetRegistry.h"
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26 #include "llvm/Support/raw_ostream.h"
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27
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28 #define GET_SUBTARGETINFO_TARGET_DESC
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29 #define GET_SUBTARGETINFO_CTOR
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30 #include "MipsGenSubtargetInfo.inc"
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31
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32
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33 using namespace llvm;
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34
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35 // FIXME: Maybe this should be on by default when Mips16 is specified
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36 //
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37 static cl::opt<bool> Mixed16_32(
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38 "mips-mixed-16-32",
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39 cl::init(false),
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40 cl::desc("Allow for a mixture of Mips16 "
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41 "and Mips32 code in a single source file"),
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42 cl::Hidden);
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43
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44 static cl::opt<bool> Mips_Os16(
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45 "mips-os16",
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46 cl::init(false),
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47 cl::desc("Compile all functions that don' use "
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48 "floating point as Mips 16"),
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49 cl::Hidden);
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50
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51 static cl::opt<bool>
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52 Mips16HardFloat("mips16-hard-float", cl::NotHidden,
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53 cl::desc("MIPS: mips16 hard float enable."),
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54 cl::init(false));
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55
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56 static cl::opt<bool>
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57 Mips16ConstantIslands(
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58 "mips16-constant-islands", cl::Hidden,
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59 cl::desc("MIPS: mips16 constant islands enable. experimental feature"),
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60 cl::init(false));
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61
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62 void MipsSubtarget::anchor() { }
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63
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64 MipsSubtarget::MipsSubtarget(const std::string &TT, const std::string &CPU,
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65 const std::string &FS, bool little,
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66 Reloc::Model _RM, MipsTargetMachine *_TM) :
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67 MipsGenSubtargetInfo(TT, CPU, FS),
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68 MipsArchVersion(Mips32), MipsABI(UnknownABI), IsLittle(little),
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69 IsSingleFloat(false), IsFP64bit(false), IsGP64bit(false), HasVFPU(false),
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70 IsLinux(true), HasSEInReg(false), HasCondMov(false), HasSwap(false),
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71 HasBitCount(false), HasFPIdx(false),
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72 InMips16Mode(false), InMips16HardFloat(Mips16HardFloat),
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73 InMicroMipsMode(false), HasDSP(false), HasDSPR2(false),
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74 AllowMixed16_32(Mixed16_32 | Mips_Os16), Os16(Mips_Os16), HasMSA(false),
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75 RM(_RM), OverrideMode(NoOverride), TM(_TM)
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76 {
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77 std::string CPUName = CPU;
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78 if (CPUName.empty())
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79 CPUName = "mips32";
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80
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81 // Parse features string.
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82 ParseSubtargetFeatures(CPUName, FS);
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83
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84 PreviousInMips16Mode = InMips16Mode;
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85
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86 // Initialize scheduling itinerary for the specified CPU.
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87 InstrItins = getInstrItineraryForCPU(CPUName);
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88
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89 // Set MipsABI if it hasn't been set yet.
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90 if (MipsABI == UnknownABI)
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91 MipsABI = hasMips64() ? N64 : O32;
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92
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93 // Check if Architecture and ABI are compatible.
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94 assert(((!hasMips64() && (isABI_O32() || isABI_EABI())) ||
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95 (hasMips64() && (isABI_N32() || isABI_N64()))) &&
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96 "Invalid Arch & ABI pair.");
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97
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98 if (hasMSA() && !isFP64bit())
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99 report_fatal_error("MSA requires a 64-bit FPU register file (FR=1 mode). "
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100 "See -mattr=+fp64.",
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101 false);
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102
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103 // Is the target system Linux ?
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104 if (TT.find("linux") == std::string::npos)
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105 IsLinux = false;
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106
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107 // Set UseSmallSection.
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108 UseSmallSection = !IsLinux && (RM == Reloc::Static);
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109 // set some subtarget specific features
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110 if (inMips16Mode())
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111 HasBitCount=false;
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112 }
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113
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114 bool
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115 MipsSubtarget::enablePostRAScheduler(CodeGenOpt::Level OptLevel,
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116 TargetSubtargetInfo::AntiDepBreakMode &Mode,
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117 RegClassVector &CriticalPathRCs) const {
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118 Mode = TargetSubtargetInfo::ANTIDEP_NONE;
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119 CriticalPathRCs.clear();
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120 CriticalPathRCs.push_back(hasMips64() ?
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121 &Mips::GPR64RegClass : &Mips::GPR32RegClass);
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122 return OptLevel >= CodeGenOpt::Aggressive;
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123 }
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124
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125 //FIXME: This logic for reseting the subtarget along with
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126 // the helper classes can probably be simplified but there are a lot of
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127 // cases so we will defer rewriting this to later.
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128 //
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129 void MipsSubtarget::resetSubtarget(MachineFunction *MF) {
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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130 bool ChangeToMips16 = false, ChangeToNoMips16 = false;
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131 DEBUG(dbgs() << "resetSubtargetFeatures" << "\n");
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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132 AttributeSet FnAttrs = MF->getFunction()->getAttributes();
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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diff changeset
133 ChangeToMips16 = FnAttrs.hasAttribute(AttributeSet::FunctionIndex,
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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134 "mips16");
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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diff changeset
135 ChangeToNoMips16 = FnAttrs.hasAttribute(AttributeSet::FunctionIndex,
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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diff changeset
136 "nomips16");
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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diff changeset
137 assert (!(ChangeToMips16 & ChangeToNoMips16) &&
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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diff changeset
138 "mips16 and nomips16 specified on the same function");
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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diff changeset
139 if (ChangeToMips16) {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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diff changeset
140 if (PreviousInMips16Mode)
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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diff changeset
141 return;
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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diff changeset
142 OverrideMode = Mips16Override;
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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diff changeset
143 PreviousInMips16Mode = true;
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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diff changeset
144 TM->setHelperClassesMips16();
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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diff changeset
145 return;
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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diff changeset
146 } else if (ChangeToNoMips16) {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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diff changeset
147 if (!PreviousInMips16Mode)
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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diff changeset
148 return;
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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diff changeset
149 OverrideMode = NoMips16Override;
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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diff changeset
150 PreviousInMips16Mode = false;
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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diff changeset
151 TM->setHelperClassesMipsSE();
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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diff changeset
152 return;
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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diff changeset
153 } else {
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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diff changeset
154 if (OverrideMode == NoOverride)
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
155 return;
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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diff changeset
156 OverrideMode = NoOverride;
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
157 DEBUG(dbgs() << "back to default" << "\n");
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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diff changeset
158 if (inMips16Mode() && !PreviousInMips16Mode) {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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diff changeset
159 TM->setHelperClassesMips16();
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
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diff changeset
160 PreviousInMips16Mode = true;
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
161 } else if (!inMips16Mode() && PreviousInMips16Mode) {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
162 TM->setHelperClassesMipsSE();
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
163 PreviousInMips16Mode = false;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
164 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
165 return;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
166 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
167 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
168
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
169 bool MipsSubtarget::mipsSEUsesSoftFloat() const {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
170 return TM->Options.UseSoftFloat && !InMips16HardFloat;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
171 }
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
172
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
173 bool MipsSubtarget::useConstantIslands() {
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
174 DEBUG(dbgs() << "use constant islands " << Mips16ConstantIslands << "\n");
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
175 return Mips16ConstantIslands;
95c75e76d11b LLVM 3.4
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
176 }