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annotate lib/Target/Sparc/Disassembler/SparcDisassembler.cpp @ 95:afa8332a0e37 LLVM3.8

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LLVM 3.8
author Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
date Tue, 13 Oct 2015 17:48:58 +0900
parents 60c9769439b8
children 1172e4bd9c6f
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1 //===- SparcDisassembler.cpp - Disassembler for Sparc -----------*- C++ -*-===//
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2 //
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3 // The LLVM Compiler Infrastructure
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4 //
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5 // This file is distributed under the University of Illinois Open Source
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6 // License. See LICENSE.TXT for details.
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7 //
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8 //===----------------------------------------------------------------------===//
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9 //
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10 // This file is part of the Sparc Disassembler.
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11 //
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12 //===----------------------------------------------------------------------===//
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13
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14 #include "Sparc.h"
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15 #include "SparcRegisterInfo.h"
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16 #include "SparcSubtarget.h"
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17 #include "llvm/MC/MCDisassembler.h"
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18 #include "llvm/MC/MCFixedLenDisassembler.h"
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19 #include "llvm/MC/MCInst.h"
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20 #include "llvm/MC/MCContext.h"
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21 #include "llvm/MC/MCAsmInfo.h"
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22 #include "llvm/Support/TargetRegistry.h"
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23
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24 using namespace llvm;
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25
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26 #define DEBUG_TYPE "sparc-disassembler"
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27
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28 typedef MCDisassembler::DecodeStatus DecodeStatus;
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29
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30 namespace {
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31
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32 /// A disassembler class for Sparc.
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33 class SparcDisassembler : public MCDisassembler {
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34 public:
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35 SparcDisassembler(const MCSubtargetInfo &STI, MCContext &Ctx)
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36 : MCDisassembler(STI, Ctx) {}
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37 virtual ~SparcDisassembler() {}
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38
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39 DecodeStatus getInstruction(MCInst &Instr, uint64_t &Size,
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40 ArrayRef<uint8_t> Bytes, uint64_t Address,
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41 raw_ostream &VStream,
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42 raw_ostream &CStream) const override;
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43 };
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44 }
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45
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46 namespace llvm {
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47 extern Target TheSparcTarget, TheSparcV9Target, TheSparcelTarget;
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48 }
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49
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50 static MCDisassembler *createSparcDisassembler(const Target &T,
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51 const MCSubtargetInfo &STI,
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52 MCContext &Ctx) {
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53 return new SparcDisassembler(STI, Ctx);
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54 }
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55
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56
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57 extern "C" void LLVMInitializeSparcDisassembler() {
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58 // Register the disassembler.
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59 TargetRegistry::RegisterMCDisassembler(TheSparcTarget,
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60 createSparcDisassembler);
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61 TargetRegistry::RegisterMCDisassembler(TheSparcV9Target,
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62 createSparcDisassembler);
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63 TargetRegistry::RegisterMCDisassembler(TheSparcelTarget,
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64 createSparcDisassembler);
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65 }
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66
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67 static const unsigned IntRegDecoderTable[] = {
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68 SP::G0, SP::G1, SP::G2, SP::G3,
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69 SP::G4, SP::G5, SP::G6, SP::G7,
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70 SP::O0, SP::O1, SP::O2, SP::O3,
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71 SP::O4, SP::O5, SP::O6, SP::O7,
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72 SP::L0, SP::L1, SP::L2, SP::L3,
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73 SP::L4, SP::L5, SP::L6, SP::L7,
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74 SP::I0, SP::I1, SP::I2, SP::I3,
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75 SP::I4, SP::I5, SP::I6, SP::I7 };
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76
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77 static const unsigned FPRegDecoderTable[] = {
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78 SP::F0, SP::F1, SP::F2, SP::F3,
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79 SP::F4, SP::F5, SP::F6, SP::F7,
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80 SP::F8, SP::F9, SP::F10, SP::F11,
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81 SP::F12, SP::F13, SP::F14, SP::F15,
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82 SP::F16, SP::F17, SP::F18, SP::F19,
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83 SP::F20, SP::F21, SP::F22, SP::F23,
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84 SP::F24, SP::F25, SP::F26, SP::F27,
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85 SP::F28, SP::F29, SP::F30, SP::F31 };
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86
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87 static const unsigned DFPRegDecoderTable[] = {
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88 SP::D0, SP::D16, SP::D1, SP::D17,
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89 SP::D2, SP::D18, SP::D3, SP::D19,
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90 SP::D4, SP::D20, SP::D5, SP::D21,
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91 SP::D6, SP::D22, SP::D7, SP::D23,
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92 SP::D8, SP::D24, SP::D9, SP::D25,
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93 SP::D10, SP::D26, SP::D11, SP::D27,
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94 SP::D12, SP::D28, SP::D13, SP::D29,
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95 SP::D14, SP::D30, SP::D15, SP::D31 };
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96
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97 static const unsigned QFPRegDecoderTable[] = {
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98 SP::Q0, SP::Q8, ~0U, ~0U,
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99 SP::Q1, SP::Q9, ~0U, ~0U,
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100 SP::Q2, SP::Q10, ~0U, ~0U,
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101 SP::Q3, SP::Q11, ~0U, ~0U,
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102 SP::Q4, SP::Q12, ~0U, ~0U,
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103 SP::Q5, SP::Q13, ~0U, ~0U,
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104 SP::Q6, SP::Q14, ~0U, ~0U,
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105 SP::Q7, SP::Q15, ~0U, ~0U } ;
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106
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107 static const unsigned FCCRegDecoderTable[] = {
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108 SP::FCC0, SP::FCC1, SP::FCC2, SP::FCC3 };
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109
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110 static const unsigned ASRRegDecoderTable[] = {
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111 SP::Y, SP::ASR1, SP::ASR2, SP::ASR3,
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112 SP::ASR4, SP::ASR5, SP::ASR6, SP::ASR7,
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113 SP::ASR8, SP::ASR9, SP::ASR10, SP::ASR11,
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114 SP::ASR12, SP::ASR13, SP::ASR14, SP::ASR15,
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115 SP::ASR16, SP::ASR17, SP::ASR18, SP::ASR19,
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116 SP::ASR20, SP::ASR21, SP::ASR22, SP::ASR23,
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117 SP::ASR24, SP::ASR25, SP::ASR26, SP::ASR27,
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118 SP::ASR28, SP::ASR29, SP::ASR30, SP::ASR31};
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119
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120 static const unsigned PRRegDecoderTable[] = {
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121 SP::TPC, SP::TNPC, SP::TSTATE, SP::TT, SP::TICK, SP::TBA, SP::PSTATE,
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122 SP::TL, SP::PIL, SP::CWP, SP::CANSAVE, SP::CANRESTORE, SP::CLEANWIN,
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123 SP::OTHERWIN, SP::WSTATE
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124 };
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125
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126 static const uint16_t IntPairDecoderTable[] = {
afa8332a0e37 LLVM 3.8
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parents: 83
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127 SP::G0_G1, SP::G2_G3, SP::G4_G5, SP::G6_G7,
afa8332a0e37 LLVM 3.8
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parents: 83
diff changeset
128 SP::O0_O1, SP::O2_O3, SP::O4_O5, SP::O6_O7,
afa8332a0e37 LLVM 3.8
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parents: 83
diff changeset
129 SP::L0_L1, SP::L2_L3, SP::L4_L5, SP::L6_L7,
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diff changeset
130 SP::I0_I1, SP::I2_I3, SP::I4_I5, SP::I6_I7,
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parents: 83
diff changeset
131 };
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diff changeset
132
77
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diff changeset
133 static DecodeStatus DecodeIntRegsRegisterClass(MCInst &Inst,
54457678186b LLVM 3.6
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parents:
diff changeset
134 unsigned RegNo,
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
135 uint64_t Address,
54457678186b LLVM 3.6
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parents:
diff changeset
136 const void *Decoder) {
54457678186b LLVM 3.6
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parents:
diff changeset
137 if (RegNo > 31)
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
138 return MCDisassembler::Fail;
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parents:
diff changeset
139 unsigned Reg = IntRegDecoderTable[RegNo];
95
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diff changeset
140 Inst.addOperand(MCOperand::createReg(Reg));
77
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141 return MCDisassembler::Success;
54457678186b LLVM 3.6
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parents:
diff changeset
142 }
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parents:
diff changeset
143
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parents:
diff changeset
144 static DecodeStatus DecodeI64RegsRegisterClass(MCInst &Inst,
54457678186b LLVM 3.6
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parents:
diff changeset
145 unsigned RegNo,
54457678186b LLVM 3.6
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parents:
diff changeset
146 uint64_t Address,
54457678186b LLVM 3.6
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parents:
diff changeset
147 const void *Decoder) {
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parents:
diff changeset
148 if (RegNo > 31)
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parents:
diff changeset
149 return MCDisassembler::Fail;
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parents:
diff changeset
150 unsigned Reg = IntRegDecoderTable[RegNo];
95
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parents: 83
diff changeset
151 Inst.addOperand(MCOperand::createReg(Reg));
77
54457678186b LLVM 3.6
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152 return MCDisassembler::Success;
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diff changeset
153 }
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parents:
diff changeset
154
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parents:
diff changeset
155
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parents:
diff changeset
156 static DecodeStatus DecodeFPRegsRegisterClass(MCInst &Inst,
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parents:
diff changeset
157 unsigned RegNo,
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parents:
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158 uint64_t Address,
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parents:
diff changeset
159 const void *Decoder) {
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parents:
diff changeset
160 if (RegNo > 31)
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
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161 return MCDisassembler::Fail;
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parents:
diff changeset
162 unsigned Reg = FPRegDecoderTable[RegNo];
95
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parents: 83
diff changeset
163 Inst.addOperand(MCOperand::createReg(Reg));
77
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164 return MCDisassembler::Success;
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parents:
diff changeset
165 }
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parents:
diff changeset
166
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parents:
diff changeset
167
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diff changeset
168 static DecodeStatus DecodeDFPRegsRegisterClass(MCInst &Inst,
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parents:
diff changeset
169 unsigned RegNo,
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parents:
diff changeset
170 uint64_t Address,
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parents:
diff changeset
171 const void *Decoder) {
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parents:
diff changeset
172 if (RegNo > 31)
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
173 return MCDisassembler::Fail;
54457678186b LLVM 3.6
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parents:
diff changeset
174 unsigned Reg = DFPRegDecoderTable[RegNo];
95
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parents: 83
diff changeset
175 Inst.addOperand(MCOperand::createReg(Reg));
77
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176 return MCDisassembler::Success;
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parents:
diff changeset
177 }
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parents:
diff changeset
178
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diff changeset
179
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parents:
diff changeset
180 static DecodeStatus DecodeQFPRegsRegisterClass(MCInst &Inst,
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parents:
diff changeset
181 unsigned RegNo,
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parents:
diff changeset
182 uint64_t Address,
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parents:
diff changeset
183 const void *Decoder) {
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parents:
diff changeset
184 if (RegNo > 31)
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parents:
diff changeset
185 return MCDisassembler::Fail;
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parents:
diff changeset
186
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parents:
diff changeset
187 unsigned Reg = QFPRegDecoderTable[RegNo];
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parents:
diff changeset
188 if (Reg == ~0U)
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parents:
diff changeset
189 return MCDisassembler::Fail;
95
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parents: 83
diff changeset
190 Inst.addOperand(MCOperand::createReg(Reg));
77
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parents:
diff changeset
191 return MCDisassembler::Success;
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parents:
diff changeset
192 }
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
193
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
194 static DecodeStatus DecodeFCCRegsRegisterClass(MCInst &Inst, unsigned RegNo,
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parents:
diff changeset
195 uint64_t Address,
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parents:
diff changeset
196 const void *Decoder) {
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parents:
diff changeset
197 if (RegNo > 3)
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parents:
diff changeset
198 return MCDisassembler::Fail;
95
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diff changeset
199 Inst.addOperand(MCOperand::createReg(FCCRegDecoderTable[RegNo]));
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parents: 83
diff changeset
200 return MCDisassembler::Success;
afa8332a0e37 LLVM 3.8
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parents: 83
diff changeset
201 }
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parents: 83
diff changeset
202
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parents: 83
diff changeset
203 static DecodeStatus DecodeASRRegsRegisterClass(MCInst &Inst, unsigned RegNo,
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
204 uint64_t Address,
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Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
205 const void *Decoder) {
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parents: 83
diff changeset
206 if (RegNo > 31)
afa8332a0e37 LLVM 3.8
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parents: 83
diff changeset
207 return MCDisassembler::Fail;
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
208 Inst.addOperand(MCOperand::createReg(ASRRegDecoderTable[RegNo]));
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
209 return MCDisassembler::Success;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
210 }
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
211
95
afa8332a0e37 LLVM 3.8
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parents: 83
diff changeset
212 static DecodeStatus DecodePRRegsRegisterClass(MCInst &Inst, unsigned RegNo,
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
213 uint64_t Address,
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
214 const void *Decoder) {
afa8332a0e37 LLVM 3.8
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parents: 83
diff changeset
215 if (RegNo >= array_lengthof(PRRegDecoderTable))
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
216 return MCDisassembler::Fail;
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
217 Inst.addOperand(MCOperand::createReg(PRRegDecoderTable[RegNo]));
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
218 return MCDisassembler::Success;
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
219 }
afa8332a0e37 LLVM 3.8
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parents: 83
diff changeset
220
afa8332a0e37 LLVM 3.8
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parents: 83
diff changeset
221 static DecodeStatus DecodeIntPairRegisterClass(MCInst &Inst, unsigned RegNo,
afa8332a0e37 LLVM 3.8
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parents: 83
diff changeset
222 uint64_t Address, const void *Decoder) {
afa8332a0e37 LLVM 3.8
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parents: 83
diff changeset
223 DecodeStatus S = MCDisassembler::Success;
afa8332a0e37 LLVM 3.8
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parents: 83
diff changeset
224
afa8332a0e37 LLVM 3.8
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parents: 83
diff changeset
225 if (RegNo > 31)
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
226 return MCDisassembler::Fail;
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
227
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
228 if ((RegNo & 1))
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
229 S = MCDisassembler::SoftFail;
afa8332a0e37 LLVM 3.8
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parents: 83
diff changeset
230
afa8332a0e37 LLVM 3.8
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parents: 83
diff changeset
231 unsigned RegisterPair = IntPairDecoderTable[RegNo/2];
afa8332a0e37 LLVM 3.8
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parents: 83
diff changeset
232 Inst.addOperand(MCOperand::createReg(RegisterPair));
afa8332a0e37 LLVM 3.8
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parents: 83
diff changeset
233 return S;
afa8332a0e37 LLVM 3.8
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parents: 83
diff changeset
234 }
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
235
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
236 static DecodeStatus DecodeLoadInt(MCInst &Inst, unsigned insn, uint64_t Address,
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
237 const void *Decoder);
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
238 static DecodeStatus DecodeLoadIntPair(MCInst &Inst, unsigned insn, uint64_t Address,
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
239 const void *Decoder);
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
240 static DecodeStatus DecodeLoadFP(MCInst &Inst, unsigned insn, uint64_t Address,
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
241 const void *Decoder);
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
242 static DecodeStatus DecodeLoadDFP(MCInst &Inst, unsigned insn, uint64_t Address,
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
243 const void *Decoder);
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
244 static DecodeStatus DecodeLoadQFP(MCInst &Inst, unsigned insn, uint64_t Address,
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
245 const void *Decoder);
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
246 static DecodeStatus DecodeStoreInt(MCInst &Inst, unsigned insn,
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
247 uint64_t Address, const void *Decoder);
95
afa8332a0e37 LLVM 3.8
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parents: 83
diff changeset
248 static DecodeStatus DecodeStoreIntPair(MCInst &Inst, unsigned insn,
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
249 uint64_t Address, const void *Decoder);
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
250 static DecodeStatus DecodeStoreFP(MCInst &Inst, unsigned insn,
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
251 uint64_t Address, const void *Decoder);
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
252 static DecodeStatus DecodeStoreDFP(MCInst &Inst, unsigned insn,
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
253 uint64_t Address, const void *Decoder);
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
254 static DecodeStatus DecodeStoreQFP(MCInst &Inst, unsigned insn,
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
255 uint64_t Address, const void *Decoder);
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
256 static DecodeStatus DecodeCall(MCInst &Inst, unsigned insn,
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
257 uint64_t Address, const void *Decoder);
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
258 static DecodeStatus DecodeSIMM13(MCInst &Inst, unsigned insn,
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
259 uint64_t Address, const void *Decoder);
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
260 static DecodeStatus DecodeJMPL(MCInst &Inst, unsigned insn, uint64_t Address,
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
261 const void *Decoder);
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
262 static DecodeStatus DecodeReturn(MCInst &MI, unsigned insn, uint64_t Address,
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
263 const void *Decoder);
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
264 static DecodeStatus DecodeSWAP(MCInst &Inst, unsigned insn, uint64_t Address,
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
265 const void *Decoder);
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
266
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
267 #include "SparcGenDisassemblerTables.inc"
54457678186b LLVM 3.6
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parents:
diff changeset
268
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
269 /// Read four bytes from the ArrayRef and return 32 bit word.
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
270 static DecodeStatus readInstruction32(ArrayRef<uint8_t> Bytes, uint64_t Address,
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
271 uint64_t &Size, uint32_t &Insn,
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
272 bool IsLittleEndian) {
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
273 // We want to read exactly 4 Bytes of data.
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
274 if (Bytes.size() < 4) {
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
275 Size = 0;
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
276 return MCDisassembler::Fail;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
277 }
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
278
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
279 Insn = IsLittleEndian
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
280 ? (Bytes[0] << 0) | (Bytes[1] << 8) | (Bytes[2] << 16) |
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
281 (Bytes[3] << 24)
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
282 : (Bytes[3] << 0) | (Bytes[2] << 8) | (Bytes[1] << 16) |
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
283 (Bytes[0] << 24);
77
54457678186b LLVM 3.6
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parents:
diff changeset
284
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
285 return MCDisassembler::Success;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
286 }
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
287
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
288 DecodeStatus SparcDisassembler::getInstruction(MCInst &Instr, uint64_t &Size,
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
289 ArrayRef<uint8_t> Bytes,
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
290 uint64_t Address,
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
291 raw_ostream &VStream,
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
292 raw_ostream &CStream) const {
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
293 uint32_t Insn;
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
294 bool isLittleEndian = getContext().getAsmInfo()->isLittleEndian();
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
295 DecodeStatus Result =
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
296 readInstruction32(Bytes, Address, Size, Insn, isLittleEndian);
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
297 if (Result == MCDisassembler::Fail)
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
298 return MCDisassembler::Fail;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
299
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
300 // Calling the auto-generated decoder function.
83
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
301 Result =
60c9769439b8 LLVM 3.7
Tatsuki IHA <e125716@ie.u-ryukyu.ac.jp>
parents: 77
diff changeset
302 decodeInstruction(DecoderTableSparc32, Instr, Insn, Address, this, STI);
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
303
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
304 if (Result != MCDisassembler::Fail) {
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
305 Size = 4;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
306 return Result;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
307 }
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
308
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
309 return MCDisassembler::Fail;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
310 }
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
311
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
312
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
313 typedef DecodeStatus (*DecodeFunc)(MCInst &MI, unsigned insn, uint64_t Address,
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
314 const void *Decoder);
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
315
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
316 static DecodeStatus DecodeMem(MCInst &MI, unsigned insn, uint64_t Address,
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
317 const void *Decoder,
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
318 bool isLoad, DecodeFunc DecodeRD) {
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
319 unsigned rd = fieldFromInstruction(insn, 25, 5);
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
320 unsigned rs1 = fieldFromInstruction(insn, 14, 5);
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
321 bool isImm = fieldFromInstruction(insn, 13, 1);
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
322 bool hasAsi = fieldFromInstruction(insn, 23, 1); // (in op3 field)
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
323 unsigned asi = fieldFromInstruction(insn, 5, 8);
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
324 unsigned rs2 = 0;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
325 unsigned simm13 = 0;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
326 if (isImm)
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
327 simm13 = SignExtend32<13>(fieldFromInstruction(insn, 0, 13));
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
328 else
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
329 rs2 = fieldFromInstruction(insn, 0, 5);
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
330
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
331 DecodeStatus status;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
332 if (isLoad) {
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
333 status = DecodeRD(MI, rd, Address, Decoder);
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
334 if (status != MCDisassembler::Success)
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
335 return status;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
336 }
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
337
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
338 // Decode rs1.
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
339 status = DecodeIntRegsRegisterClass(MI, rs1, Address, Decoder);
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
340 if (status != MCDisassembler::Success)
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
341 return status;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
342
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
343 // Decode imm|rs2.
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
344 if (isImm)
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
345 MI.addOperand(MCOperand::createImm(simm13));
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
346 else {
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
347 status = DecodeIntRegsRegisterClass(MI, rs2, Address, Decoder);
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
348 if (status != MCDisassembler::Success)
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
349 return status;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
350 }
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
351
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
352 if (hasAsi)
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
353 MI.addOperand(MCOperand::createImm(asi));
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
354
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
355 if (!isLoad) {
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
356 status = DecodeRD(MI, rd, Address, Decoder);
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
357 if (status != MCDisassembler::Success)
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
358 return status;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
359 }
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
360 return MCDisassembler::Success;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
361 }
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
362
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
363 static DecodeStatus DecodeLoadInt(MCInst &Inst, unsigned insn, uint64_t Address,
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
364 const void *Decoder) {
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
365 return DecodeMem(Inst, insn, Address, Decoder, true,
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
366 DecodeIntRegsRegisterClass);
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
367 }
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
368
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
369 static DecodeStatus DecodeLoadIntPair(MCInst &Inst, unsigned insn, uint64_t Address,
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
370 const void *Decoder) {
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
371 return DecodeMem(Inst, insn, Address, Decoder, true,
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
372 DecodeIntPairRegisterClass);
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
373 }
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
374
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
375 static DecodeStatus DecodeLoadFP(MCInst &Inst, unsigned insn, uint64_t Address,
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
376 const void *Decoder) {
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
377 return DecodeMem(Inst, insn, Address, Decoder, true,
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
378 DecodeFPRegsRegisterClass);
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
379 }
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
380
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
381 static DecodeStatus DecodeLoadDFP(MCInst &Inst, unsigned insn, uint64_t Address,
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
382 const void *Decoder) {
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
383 return DecodeMem(Inst, insn, Address, Decoder, true,
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
384 DecodeDFPRegsRegisterClass);
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
385 }
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
386
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
387 static DecodeStatus DecodeLoadQFP(MCInst &Inst, unsigned insn, uint64_t Address,
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
388 const void *Decoder) {
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
389 return DecodeMem(Inst, insn, Address, Decoder, true,
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
390 DecodeQFPRegsRegisterClass);
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
391 }
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
392
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
393 static DecodeStatus DecodeStoreInt(MCInst &Inst, unsigned insn,
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
394 uint64_t Address, const void *Decoder) {
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
395 return DecodeMem(Inst, insn, Address, Decoder, false,
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
396 DecodeIntRegsRegisterClass);
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
397 }
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
398
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
399 static DecodeStatus DecodeStoreIntPair(MCInst &Inst, unsigned insn,
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
400 uint64_t Address, const void *Decoder) {
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
401 return DecodeMem(Inst, insn, Address, Decoder, false,
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
402 DecodeIntPairRegisterClass);
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
403 }
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
404
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
405 static DecodeStatus DecodeStoreFP(MCInst &Inst, unsigned insn, uint64_t Address,
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
406 const void *Decoder) {
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
407 return DecodeMem(Inst, insn, Address, Decoder, false,
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
408 DecodeFPRegsRegisterClass);
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
409 }
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
410
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
411 static DecodeStatus DecodeStoreDFP(MCInst &Inst, unsigned insn,
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
412 uint64_t Address, const void *Decoder) {
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
413 return DecodeMem(Inst, insn, Address, Decoder, false,
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
414 DecodeDFPRegsRegisterClass);
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
415 }
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
416
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
417 static DecodeStatus DecodeStoreQFP(MCInst &Inst, unsigned insn,
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
418 uint64_t Address, const void *Decoder) {
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
419 return DecodeMem(Inst, insn, Address, Decoder, false,
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
420 DecodeQFPRegsRegisterClass);
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
421 }
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
422
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
423 static bool tryAddingSymbolicOperand(int64_t Value, bool isBranch,
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
424 uint64_t Address, uint64_t Offset,
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
425 uint64_t Width, MCInst &MI,
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
426 const void *Decoder) {
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
427 const MCDisassembler *Dis = static_cast<const MCDisassembler*>(Decoder);
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
428 return Dis->tryAddingSymbolicOperand(MI, Value, Address, isBranch,
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
429 Offset, Width);
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
430 }
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
431
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
432 static DecodeStatus DecodeCall(MCInst &MI, unsigned insn,
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
433 uint64_t Address, const void *Decoder) {
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
434 unsigned tgt = fieldFromInstruction(insn, 0, 30);
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
435 tgt <<= 2;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
436 if (!tryAddingSymbolicOperand(tgt+Address, false, Address,
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
437 0, 30, MI, Decoder))
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
438 MI.addOperand(MCOperand::createImm(tgt));
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
439 return MCDisassembler::Success;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
440 }
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
441
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
442 static DecodeStatus DecodeSIMM13(MCInst &MI, unsigned insn,
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
443 uint64_t Address, const void *Decoder) {
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
444 unsigned tgt = SignExtend32<13>(fieldFromInstruction(insn, 0, 13));
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
445 MI.addOperand(MCOperand::createImm(tgt));
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
446 return MCDisassembler::Success;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
447 }
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
448
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
449 static DecodeStatus DecodeJMPL(MCInst &MI, unsigned insn, uint64_t Address,
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
450 const void *Decoder) {
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
451
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
452 unsigned rd = fieldFromInstruction(insn, 25, 5);
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
453 unsigned rs1 = fieldFromInstruction(insn, 14, 5);
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
454 unsigned isImm = fieldFromInstruction(insn, 13, 1);
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
455 unsigned rs2 = 0;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
456 unsigned simm13 = 0;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
457 if (isImm)
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
458 simm13 = SignExtend32<13>(fieldFromInstruction(insn, 0, 13));
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
459 else
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
460 rs2 = fieldFromInstruction(insn, 0, 5);
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
461
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
462 // Decode RD.
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
463 DecodeStatus status = DecodeIntRegsRegisterClass(MI, rd, Address, Decoder);
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
464 if (status != MCDisassembler::Success)
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
465 return status;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
466
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
467 // Decode RS1.
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
468 status = DecodeIntRegsRegisterClass(MI, rs1, Address, Decoder);
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
469 if (status != MCDisassembler::Success)
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
470 return status;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
471
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
472 // Decode RS1 | SIMM13.
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
473 if (isImm)
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
474 MI.addOperand(MCOperand::createImm(simm13));
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
475 else {
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
476 status = DecodeIntRegsRegisterClass(MI, rs2, Address, Decoder);
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
477 if (status != MCDisassembler::Success)
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
478 return status;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
479 }
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
480 return MCDisassembler::Success;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
481 }
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
482
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
483 static DecodeStatus DecodeReturn(MCInst &MI, unsigned insn, uint64_t Address,
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
484 const void *Decoder) {
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
485
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
486 unsigned rs1 = fieldFromInstruction(insn, 14, 5);
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
487 unsigned isImm = fieldFromInstruction(insn, 13, 1);
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
488 unsigned rs2 = 0;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
489 unsigned simm13 = 0;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
490 if (isImm)
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
491 simm13 = SignExtend32<13>(fieldFromInstruction(insn, 0, 13));
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
492 else
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
493 rs2 = fieldFromInstruction(insn, 0, 5);
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
494
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
495 // Decode RS1.
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
496 DecodeStatus status = DecodeIntRegsRegisterClass(MI, rs1, Address, Decoder);
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
497 if (status != MCDisassembler::Success)
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
498 return status;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
499
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
500 // Decode RS2 | SIMM13.
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
501 if (isImm)
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
502 MI.addOperand(MCOperand::createImm(simm13));
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
503 else {
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
504 status = DecodeIntRegsRegisterClass(MI, rs2, Address, Decoder);
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
505 if (status != MCDisassembler::Success)
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
506 return status;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
507 }
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
508 return MCDisassembler::Success;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
509 }
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
510
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
511 static DecodeStatus DecodeSWAP(MCInst &MI, unsigned insn, uint64_t Address,
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
512 const void *Decoder) {
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
513
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
514 unsigned rd = fieldFromInstruction(insn, 25, 5);
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
515 unsigned rs1 = fieldFromInstruction(insn, 14, 5);
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
516 unsigned isImm = fieldFromInstruction(insn, 13, 1);
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
517 bool hasAsi = fieldFromInstruction(insn, 23, 1); // (in op3 field)
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
518 unsigned asi = fieldFromInstruction(insn, 5, 8);
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
519 unsigned rs2 = 0;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
520 unsigned simm13 = 0;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
521 if (isImm)
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
522 simm13 = SignExtend32<13>(fieldFromInstruction(insn, 0, 13));
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
523 else
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
524 rs2 = fieldFromInstruction(insn, 0, 5);
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
525
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
526 // Decode RD.
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
527 DecodeStatus status = DecodeIntRegsRegisterClass(MI, rd, Address, Decoder);
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
528 if (status != MCDisassembler::Success)
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
529 return status;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
530
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
531 // Decode RS1.
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
532 status = DecodeIntRegsRegisterClass(MI, rs1, Address, Decoder);
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
533 if (status != MCDisassembler::Success)
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
534 return status;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
535
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
536 // Decode RS1 | SIMM13.
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
537 if (isImm)
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
538 MI.addOperand(MCOperand::createImm(simm13));
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
539 else {
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
540 status = DecodeIntRegsRegisterClass(MI, rs2, Address, Decoder);
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
541 if (status != MCDisassembler::Success)
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
542 return status;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
543 }
95
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
544
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
545 if (hasAsi)
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
546 MI.addOperand(MCOperand::createImm(asi));
afa8332a0e37 LLVM 3.8
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents: 83
diff changeset
547
77
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
548 return MCDisassembler::Success;
54457678186b LLVM 3.6
Kaito Tokumori <e105711@ie.u-ryukyu.ac.jp>
parents:
diff changeset
549 }