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95
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1 ; RUN: llc -mtriple=aarch64-apple-darwin -fast-isel -fast-isel-abort=1 -verify-machineinstrs < %s | FileCheck %s
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83
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2
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95
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3 ; CHECK-LABEL: test_or
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83
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4 ; CHECK: cbnz w0, {{LBB[0-9]+_2}}
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5 ; CHECK: cbz w1, {{LBB[0-9]+_1}}
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6 define i64 @test_or(i32 %a, i32 %b) {
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7 bb1:
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8 %0 = icmp eq i32 %a, 0
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9 %1 = icmp eq i32 %b, 0
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10 %or.cond = or i1 %0, %1
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11 br i1 %or.cond, label %bb3, label %bb4, !prof !0
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12
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13 bb3:
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14 ret i64 0
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15
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16 bb4:
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17 %2 = call i64 @bar()
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18 ret i64 %2
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19 }
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20
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95
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21 ; CHECK-LABEL: test_and
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83
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22 ; CHECK: cbz w0, {{LBB[0-9]+_2}}
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23 ; CHECK: cbnz w1, {{LBB[0-9]+_3}}
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24 define i64 @test_and(i32 %a, i32 %b) {
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25 bb1:
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26 %0 = icmp ne i32 %a, 0
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27 %1 = icmp ne i32 %b, 0
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28 %or.cond = and i1 %0, %1
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29 br i1 %or.cond, label %bb4, label %bb3, !prof !1
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30
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31 bb3:
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32 ret i64 0
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33
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34 bb4:
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35 %2 = call i64 @bar()
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36 ret i64 %2
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37 }
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38
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95
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39 ; If the branch is unpredictable, don't add another branch.
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40
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41 ; CHECK-LABEL: test_or_unpredictable
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42 ; CHECK: cmp w0, #0
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43 ; CHECK-NEXT: cset w8, eq
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44 ; CHECK-NEXT: cmp w1, #0
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45 ; CHECK-NEXT: cset w9, eq
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46 ; CHECK-NEXT: orr w8, w8, w9
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47 ; CHECK-NEXT: and w8, w8, #0x1
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48 ; CHECK-NEXT: cmp w8, #0
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49 ; CHECK-NEXT: b.ne
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50 define i64 @test_or_unpredictable(i32 %a, i32 %b) {
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51 bb1:
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52 %0 = icmp eq i32 %a, 0
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53 %1 = icmp eq i32 %b, 0
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54 %or.cond = or i1 %0, %1
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55 br i1 %or.cond, label %bb3, label %bb4, !unpredictable !2
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56
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57 bb3:
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58 ret i64 0
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59
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60 bb4:
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61 %2 = call i64 @bar()
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62 ret i64 %2
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63 }
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64
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65 ; CHECK-LABEL: test_and_unpredictable
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66 ; CHECK: cmp w0, #0
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67 ; CHECK-NEXT: cset w8, ne
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68 ; CHECK-NEXT: cmp w1, #0
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69 ; CHECK-NEXT: cset w9, ne
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70 ; CHECK-NEXT: and w8, w8, w9
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71 ; CHECK-NEXT: and w8, w8, #0x1
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72 ; CHECK-NEXT: cmp w8, #0
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73 ; CHECK-NEXT: b.eq
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74 define i64 @test_and_unpredictable(i32 %a, i32 %b) {
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75 bb1:
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76 %0 = icmp ne i32 %a, 0
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77 %1 = icmp ne i32 %b, 0
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78 %or.cond = and i1 %0, %1
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79 br i1 %or.cond, label %bb4, label %bb3, !unpredictable !2
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80
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81 bb3:
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82 ret i64 0
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83
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84 bb4:
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85 %2 = call i64 @bar()
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86 ret i64 %2
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87 }
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88
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83
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89 declare i64 @bar()
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90
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91 !0 = !{!"branch_weights", i32 5128, i32 32}
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92 !1 = !{!"branch_weights", i32 1024, i32 4136}
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95
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93 !2 = !{}
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94
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